1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021 BayLibre, SAS.
4 * Author: Fabien Parent <fparent@baylibre.com>
9 #include <dt-bindings/gpio/gpio.h>
10 #include "mt8183.dtsi"
11 #include "mt6358.dtsi"
14 model = "Pumpkin MT8183";
15 compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183";
22 device_type = "memory";
23 reg = <0 0x40000000 0 0x80000000>;
27 stdout-path = "serial0:921600n8";
35 scp_mem_reserved: scp_mem_region@50000000 {
36 compatible = "shared-dma-pool";
37 reg = <0 0x50000000 0 0x2900000>;
43 compatible = "gpio-leds";
47 gpios = <&pio 155 GPIO_ACTIVE_HIGH>;
48 default-state = "off";
53 gpios = <&pio 156 GPIO_ACTIVE_HIGH>;
54 default-state = "off";
59 compatible = "murata,ncp03wf104";
60 pullup-uv = <1800000>;
61 pullup-ohm = <390000>;
63 io-channels = <&auxadc 0>;
72 mali-supply = <&mt6358_vgpu_reg>;
73 sram-supply = <&mt6358_vsram_gpu_reg>;
77 pinctrl-names = "default";
78 pinctrl-0 = <&i2c_pins_0>;
80 clock-frequency = <100000>;
84 pinctrl-names = "default";
85 pinctrl-0 = <&i2c_pins_1>;
87 clock-frequency = <100000>;
91 pinctrl-names = "default";
92 pinctrl-0 = <&i2c_pins_2>;
94 clock-frequency = <100000>;
98 pinctrl-names = "default";
99 pinctrl-0 = <&i2c_pins_3>;
101 clock-frequency = <100000>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&i2c_pins_4>;
108 clock-frequency = <100000>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&i2c_pins_5>;
115 clock-frequency = <100000>;
119 pinctrl-names = "default";
120 pinctrl-0 = <&i2c6_pins>;
122 clock-frequency = <100000>;
127 pinctrl-names = "default", "state_uhs";
128 pinctrl-0 = <&mmc0_pins_default>;
129 pinctrl-1 = <&mmc0_pins_uhs>;
131 max-frequency = <200000000>;
138 hs400-ds-delay = <0x12814>;
139 vmmc-supply = <&mt6358_vemc_reg>;
140 vqmmc-supply = <&mt6358_vio18_reg>;
141 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
142 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
148 pinctrl-names = "default", "state_uhs";
149 pinctrl-0 = <&mmc1_pins_default>;
150 pinctrl-1 = <&mmc1_pins_uhs>;
152 max-frequency = <200000000>;
159 vmmc-supply = <&mt6358_vmch_reg>;
160 vqmmc-supply = <&mt6358_vmc_reg>;
161 keep-power-in-suspend;
169 pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
170 <PINMUX_GPIO83__FUNC_SCL0>;
171 mediatek,pull-up-adv = <3>;
172 mediatek,drive-strength-adv = <00>;
178 pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
179 <PINMUX_GPIO84__FUNC_SCL1>;
180 mediatek,pull-up-adv = <3>;
181 mediatek,drive-strength-adv = <00>;
187 pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
188 <PINMUX_GPIO104__FUNC_SDA2>;
189 mediatek,pull-up-adv = <3>;
190 mediatek,drive-strength-adv = <00>;
196 pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
197 <PINMUX_GPIO51__FUNC_SDA3>;
198 mediatek,pull-up-adv = <3>;
199 mediatek,drive-strength-adv = <00>;
205 pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
206 <PINMUX_GPIO106__FUNC_SDA4>;
207 mediatek,pull-up-adv = <3>;
208 mediatek,drive-strength-adv = <00>;
214 pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
215 <PINMUX_GPIO49__FUNC_SDA5>;
216 mediatek,pull-up-adv = <3>;
217 mediatek,drive-strength-adv = <00>;
223 pinmux = <PINMUX_GPIO113__FUNC_SCL6>,
224 <PINMUX_GPIO114__FUNC_SDA6>;
225 mediatek,pull-up-adv = <3>;
229 mmc0_pins_default: mmc0-pins-default {
231 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
232 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
233 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
234 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
235 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
236 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
237 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
238 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
239 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
241 drive-strength = <MTK_DRIVE_14mA>;
242 mediatek,pull-up-adv = <01>;
246 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
247 drive-strength = <MTK_DRIVE_14mA>;
248 mediatek,pull-down-adv = <10>;
252 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
253 drive-strength = <MTK_DRIVE_14mA>;
254 mediatek,pull-down-adv = <01>;
258 mmc0_pins_uhs: mmc0-pins-uhs {
260 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
261 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
262 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
263 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
264 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
265 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
266 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
267 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
268 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
270 drive-strength = <MTK_DRIVE_14mA>;
271 mediatek,pull-up-adv = <01>;
275 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
276 drive-strength = <MTK_DRIVE_14mA>;
277 mediatek,pull-down-adv = <10>;
281 pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
282 drive-strength = <MTK_DRIVE_14mA>;
283 mediatek,pull-down-adv = <10>;
287 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
288 drive-strength = <MTK_DRIVE_14mA>;
289 mediatek,pull-up-adv = <01>;
293 mmc1_pins_default: mmc1-pins-default {
295 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
296 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
297 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
298 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
299 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
301 mediatek,pull-up-adv = <10>;
305 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
307 mediatek,pull-down-adv = <10>;
311 pinmux = <PINMUX_GPIO178__FUNC_GPIO178>;
316 mmc1_pins_uhs: mmc1-pins-uhs {
318 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
319 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
320 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
321 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
322 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
323 drive-strength = <MTK_DRIVE_6mA>;
325 mediatek,pull-up-adv = <10>;
329 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
330 drive-strength = <MTK_DRIVE_8mA>;
331 mediatek,pull-down-adv = <10>;
338 domain-supply = <&mt6358_vgpu_reg>;
342 proc-supply = <&mt6358_vproc12_reg>;
346 proc-supply = <&mt6358_vproc12_reg>;
350 proc-supply = <&mt6358_vproc12_reg>;
354 proc-supply = <&mt6358_vproc12_reg>;
358 proc-supply = <&mt6358_vproc11_reg>;
362 proc-supply = <&mt6358_vproc11_reg>;
366 proc-supply = <&mt6358_vproc11_reg>;
370 proc-supply = <&mt6358_vproc11_reg>;