1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (c) 2018 MediaTek Inc.
4 * Author: Ben Ho <ben.ho@mediatek.com>
5 * Erin Lo <erin.lo@mediatek.com>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include "mt8183.dtsi"
11 #include "mt6358.dtsi"
19 stdout-path = "serial0:115200n8";
22 backlight_lcd0: backlight_lcd0 {
23 compatible = "pwm-backlight";
24 pwms = <&pwm0 0 500000>;
25 power-supply = <&bl_pp5000>;
26 enable-gpios = <&pio 176 0>;
27 brightness-levels = <0 1023>;
28 num-interpolated-steps = <1023>;
29 default-brightness-level = <576>;
34 device_type = "memory";
35 reg = <0 0x40000000 0 0x80000000>;
39 compatible = "fixed-clock";
41 clock-frequency = <32768>;
42 clock-output-names = "clk32k";
45 it6505_pp18_reg: regulator0 {
46 compatible = "regulator-fixed";
47 regulator-name = "it6505_pp18";
48 regulator-min-microvolt = <1800000>;
49 regulator-max-microvolt = <1800000>;
54 lcd_pp3300: regulator1 {
55 compatible = "regulator-fixed";
56 regulator-name = "lcd_pp3300";
57 regulator-min-microvolt = <3300000>;
58 regulator-max-microvolt = <3300000>;
63 bl_pp5000: regulator2 {
64 compatible = "regulator-fixed";
65 regulator-name = "bl_pp5000";
66 regulator-min-microvolt = <5000000>;
67 regulator-max-microvolt = <5000000>;
72 mmc1_fixed_power: regulator3 {
73 compatible = "regulator-fixed";
74 regulator-name = "mmc1_power";
75 regulator-min-microvolt = <3300000>;
76 regulator-max-microvolt = <3300000>;
79 mmc1_fixed_io: regulator4 {
80 compatible = "regulator-fixed";
81 regulator-name = "mmc1_io";
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <1800000>;
86 pp1800_alw: regulator5 {
87 compatible = "regulator-fixed";
88 regulator-name = "pp1800_alw";
91 regulator-min-microvolt = <1800000>;
92 regulator-max-microvolt = <1800000>;
95 pp3300_alw: regulator6 {
96 compatible = "regulator-fixed";
97 regulator-name = "pp3300_alw";
100 regulator-min-microvolt = <3300000>;
101 regulator-max-microvolt = <3300000>;
104 reserved_memory: reserved-memory {
105 #address-cells = <2>;
109 scp_mem_reserved: scp_mem_region {
110 compatible = "shared-dma-pool";
111 reg = <0 0x50000000 0 0x2900000>;
117 compatible = "maxim,max98357a";
118 sdmode-gpios = <&pio 175 0>;
122 compatible = "linux,bt-sco";
125 wifi_pwrseq: wifi-pwrseq {
126 compatible = "mmc-pwrseq-simple";
127 pinctrl-names = "default";
128 pinctrl-0 = <&wifi_pins_pwrseq>;
130 /* Toggle WIFI_ENABLE to reset the chip. */
131 reset-gpios = <&pio 119 1>;
134 wifi_wakeup: wifi-wakeup {
135 compatible = "gpio-keys";
136 pinctrl-names = "default";
137 pinctrl-0 = <&wifi_pins_wakeup>;
140 label = "Wake on WiFi";
141 gpios = <&pio 113 GPIO_ACTIVE_HIGH>;
142 linux,code = <KEY_WAKEUP>;
147 tboard_thermistor1: thermal-sensor1 {
148 compatible = "generic-adc-thermal";
149 #thermal-sensor-cells = <0>;
150 io-channels = <&auxadc 0>;
151 io-channel-names = "sensor-channel";
152 temperature-lookup-table = < (-5000) 4241
181 tboard_thermistor2: thermal-sensor2 {
182 compatible = "generic-adc-thermal";
183 #thermal-sensor-cells = <0>;
184 io-channels = <&auxadc 1>;
185 io-channel-names = "sensor-channel";
186 temperature-lookup-table = < (-5000) 4241
221 proc-supply = <&mt6358_vproc12_reg>;
225 proc-supply = <&mt6358_vproc12_reg>;
229 proc-supply = <&mt6358_vproc12_reg>;
233 proc-supply = <&mt6358_vproc12_reg>;
237 proc-supply = <&mt6358_vproc11_reg>;
241 proc-supply = <&mt6358_vproc11_reg>;
245 proc-supply = <&mt6358_vproc11_reg>;
249 proc-supply = <&mt6358_vproc11_reg>;
254 #address-cells = <1>;
257 /* compatible will be set in board dts */
259 enable-gpios = <&pio 45 0>;
260 pinctrl-names = "default";
261 pinctrl-0 = <&panel_pins_default>;
262 avdd-supply = <&ppvarn_lcd>;
263 avee-supply = <&ppvarp_lcd>;
264 pp1800-supply = <&pp1800_lcd>;
265 backlight = <&backlight_lcd0>;
268 remote-endpoint = <&dsi_out>;
276 remote-endpoint = <&panel_in>;
283 pinctrl-names = "default";
284 pinctrl-0 = <&i2c0_pins>;
286 clock-frequency = <400000>;
287 #address-cells = <1>;
292 pinctrl-names = "default";
293 pinctrl-0 = <&i2c1_pins>;
295 clock-frequency = <100000>;
299 pinctrl-names = "default";
300 pinctrl-0 = <&i2c3_pins>;
302 clock-frequency = <100000>;
303 #address-cells = <1>;
308 pinctrl-names = "default";
309 pinctrl-0 = <&i2c5_pins>;
311 clock-frequency = <100000>;
312 #address-cells = <1>;
317 pinctrl-names = "default";
318 pinctrl-0 = <&i2c6_pins>;
320 clock-frequency = <100000>;
329 pinctrl-names = "default", "state_uhs";
330 pinctrl-0 = <&mmc0_pins_default>;
331 pinctrl-1 = <&mmc0_pins_uhs>;
333 max-frequency = <200000000>;
340 hs400-ds-delay = <0x12814>;
341 vmmc-supply = <&mt6358_vemc_reg>;
342 vqmmc-supply = <&mt6358_vio18_reg>;
343 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
344 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
350 pinctrl-names = "default", "state_uhs";
351 pinctrl-0 = <&mmc1_pins_default>;
352 pinctrl-1 = <&mmc1_pins_uhs>;
353 vmmc-supply = <&mmc1_fixed_power>;
354 vqmmc-supply = <&mmc1_fixed_io>;
355 mmc-pwrseq = <&wifi_pwrseq>;
357 max-frequency = <200000000>;
362 keep-power-in-suspend;
368 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
369 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
370 #address-cells = <1>;
373 qca_wifi: qca-wifi@1 {
374 compatible = "qcom,ath10k";
384 Avdd-supply = <&mt6358_vaud28_reg>;
388 regulator-min-microvolt = <2700000>;
389 regulator-max-microvolt = <2700000>;
393 regulator-min-microvolt = <2700000>;
394 regulator-max-microvolt = <2700000>;
400 pinmux = <PINMUX_GPIO120__FUNC_GPIO120>;
405 ec_ap_int_odl: ec_ap_int_odl {
407 pinmux = <PINMUX_GPIO151__FUNC_GPIO151>;
413 h1_int_od_l: h1_int_od_l {
415 pinmux = <PINMUX_GPIO153__FUNC_GPIO153>;
422 pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
423 <PINMUX_GPIO83__FUNC_SCL0>;
424 mediatek,pull-up-adv = <3>;
425 mediatek,drive-strength-adv = <00>;
431 pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
432 <PINMUX_GPIO84__FUNC_SCL1>;
433 mediatek,pull-up-adv = <3>;
434 mediatek,drive-strength-adv = <00>;
440 pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
441 <PINMUX_GPIO104__FUNC_SDA2>;
443 mediatek,drive-strength-adv = <00>;
449 pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
450 <PINMUX_GPIO51__FUNC_SDA3>;
451 mediatek,pull-up-adv = <3>;
452 mediatek,drive-strength-adv = <00>;
458 pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
459 <PINMUX_GPIO106__FUNC_SDA4>;
461 mediatek,drive-strength-adv = <00>;
467 pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
468 <PINMUX_GPIO49__FUNC_SDA5>;
469 mediatek,pull-up-adv = <3>;
470 mediatek,drive-strength-adv = <00>;
476 pinmux = <PINMUX_GPIO11__FUNC_SCL6>,
477 <PINMUX_GPIO12__FUNC_SDA6>;
482 mmc0_pins_default: mmc0-pins-default {
484 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
485 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
486 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
487 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
488 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
489 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
490 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
491 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
492 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
494 drive-strength = <MTK_DRIVE_14mA>;
495 mediatek,pull-up-adv = <01>;
499 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
500 drive-strength = <MTK_DRIVE_14mA>;
501 mediatek,pull-down-adv = <10>;
505 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
506 drive-strength = <MTK_DRIVE_14mA>;
507 mediatek,pull-down-adv = <01>;
511 mmc0_pins_uhs: mmc0-pins-uhs {
513 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
514 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
515 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
516 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
517 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
518 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
519 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
520 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
521 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
523 drive-strength = <MTK_DRIVE_14mA>;
524 mediatek,pull-up-adv = <01>;
528 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
529 drive-strength = <MTK_DRIVE_14mA>;
530 mediatek,pull-down-adv = <10>;
534 pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
535 drive-strength = <MTK_DRIVE_14mA>;
536 mediatek,pull-down-adv = <10>;
540 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
541 drive-strength = <MTK_DRIVE_14mA>;
542 mediatek,pull-up-adv = <01>;
546 mmc1_pins_default: mmc1-pins-default {
548 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
549 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
550 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
551 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
552 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
554 mediatek,pull-up-adv = <10>;
558 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
560 mediatek,pull-down-adv = <10>;
564 mmc1_pins_uhs: mmc1-pins-uhs {
566 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
567 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
568 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
569 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
570 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
571 drive-strength = <MTK_DRIVE_6mA>;
573 mediatek,pull-up-adv = <10>;
577 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
578 drive-strength = <MTK_DRIVE_8mA>;
579 mediatek,pull-down-adv = <10>;
584 panel_pins_default: panel_pins_default {
586 pinmux = <PINMUX_GPIO45__FUNC_GPIO45>;
592 pwm0_pin_default: pwm0_pin_default {
594 pinmux = <PINMUX_GPIO176__FUNC_GPIO176>;
599 pinmux = <PINMUX_GPIO43__FUNC_DISP_PWM>;
605 pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>,
606 <PINMUX_GPIO112__FUNC_TP_UTXD1_AO>;
612 pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
613 <PINMUX_GPIO86__FUNC_GPIO86>,
614 <PINMUX_GPIO87__FUNC_SPI0_MO>,
615 <PINMUX_GPIO88__FUNC_SPI0_CLK>;
622 pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
623 <PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
624 <PINMUX_GPIO163__FUNC_SPI1_A_MO>,
625 <PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
632 pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
633 <PINMUX_GPIO1__FUNC_SPI2_MO>,
634 <PINMUX_GPIO2__FUNC_SPI2_CLK>;
638 pinmux = <PINMUX_GPIO94__FUNC_SPI2_MI>;
639 mediatek,pull-down-adv = <00>;
645 pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
646 <PINMUX_GPIO22__FUNC_SPI3_CSB>,
647 <PINMUX_GPIO23__FUNC_SPI3_MO>,
648 <PINMUX_GPIO24__FUNC_SPI3_CLK>;
655 pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
656 <PINMUX_GPIO18__FUNC_SPI4_CSB>,
657 <PINMUX_GPIO19__FUNC_SPI4_MO>,
658 <PINMUX_GPIO20__FUNC_SPI4_CLK>;
665 pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
666 <PINMUX_GPIO14__FUNC_SPI5_CSB>,
667 <PINMUX_GPIO15__FUNC_SPI5_MO>,
668 <PINMUX_GPIO16__FUNC_SPI5_CLK>;
673 uart0_pins_default: uart0-pins-default {
675 pinmux = <PINMUX_GPIO95__FUNC_URXD0>;
680 pinmux = <PINMUX_GPIO96__FUNC_UTXD0>;
684 uart1_pins_default: uart1-pins-default {
686 pinmux = <PINMUX_GPIO121__FUNC_URXD1>;
691 pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
694 pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
698 pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
703 uart1_pins_sleep: uart1-pins-sleep {
705 pinmux = <PINMUX_GPIO121__FUNC_GPIO121>;
710 pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
713 pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
717 pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
722 wifi_pins_pwrseq: wifi-pins-pwrseq {
724 pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
729 wifi_pins_wakeup: wifi-pins-wakeup {
731 pinmux = <PINMUX_GPIO113__FUNC_GPIO113>;
739 pinctrl-names = "default";
740 pinctrl-0 = <&pwm0_pin_default>;
745 pinctrl-names = "default";
746 pinctrl-0 = <&scp_pins>;
749 compatible = "google,cros-ec-rpmsg";
750 mtk,rpmsg-name = "cros-ec-rpmsg";
755 domain-supply = <&mt6358_vgpu_reg>;
763 pinctrl-names = "default";
764 pinctrl-0 = <&spi0_pins>;
765 mediatek,pad-select = <0>;
767 cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
770 compatible = "google,cr50";
772 spi-max-frequency = <1000000>;
773 pinctrl-names = "default";
774 pinctrl-0 = <&h1_int_od_l>;
775 interrupt-parent = <&pio>;
776 interrupts = <153 IRQ_TYPE_EDGE_RISING>;
781 pinctrl-names = "default";
782 pinctrl-0 = <&spi1_pins>;
783 mediatek,pad-select = <0>;
786 w25q64dw: spi-flash@0 {
787 compatible = "winbond,w25q64dw", "jedec,spi-nor";
789 spi-max-frequency = <25000000>;
794 pinctrl-names = "default";
795 pinctrl-0 = <&spi2_pins>;
796 mediatek,pad-select = <0>;
800 compatible = "google,cros-ec-spi";
802 spi-max-frequency = <3000000>;
803 interrupt-parent = <&pio>;
804 interrupts = <151 IRQ_TYPE_LEVEL_LOW>;
805 pinctrl-names = "default";
806 pinctrl-0 = <&ec_ap_int_odl>;
808 i2c_tunnel: i2c-tunnel {
809 compatible = "google,cros-ec-i2c-tunnel";
810 google,remote-bus = <1>;
811 #address-cells = <1>;
815 usbc_extcon: extcon0 {
816 compatible = "google,extcon-usbc-cros-ec";
817 google,usb-port-id = <0>;
823 pinctrl-names = "default";
824 pinctrl-0 = <&spi3_pins>;
825 mediatek,pad-select = <0>;
830 pinctrl-names = "default";
831 pinctrl-0 = <&spi4_pins>;
832 mediatek,pad-select = <0>;
837 pinctrl-names = "default";
838 pinctrl-0 = <&spi5_pins>;
839 mediatek,pad-select = <0>;
846 vusb33-supply = <&mt6358_vusb_reg>;
855 pinctrl-names = "default";
856 pinctrl-0 = <&uart0_pins_default>;
861 pinctrl-names = "default", "sleep";
862 pinctrl-0 = <&uart1_pins_default>;
863 pinctrl-1 = <&uart1_pins_sleep>;
865 interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
866 <&pio 121 IRQ_TYPE_EDGE_FALLING>;
868 bluetooth: bluetooth {
869 pinctrl-names = "default";
870 pinctrl-0 = <&bt_pins>;
872 compatible = "qcom,qca6174-bt";
873 enable-gpios = <&pio 120 0>;
875 firmware-name = "nvm_00440302_i2s.bin";
880 #address-cells = <1>;
882 vusb33-supply = <&mt6358_vusb_reg>;
886 compatible = "usb5e3,610";
891 #include <arm/cros-ec-keyboard.dtsi>
892 #include <arm/cros-ec-sbs.dtsi>