1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (c) 2018 MediaTek Inc.
4 * Author: Ben Ho <ben.ho@mediatek.com>
5 * Erin Lo <erin.lo@mediatek.com>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include "mt8183.dtsi"
11 #include "mt6358.dtsi"
19 stdout-path = "serial0:115200n8";
22 backlight_lcd0: backlight_lcd0 {
23 compatible = "pwm-backlight";
24 pwms = <&pwm0 0 500000>;
25 power-supply = <&bl_pp5000>;
26 enable-gpios = <&pio 176 0>;
27 brightness-levels = <0 1023>;
28 num-interpolated-steps = <1023>;
29 default-brightness-level = <576>;
34 device_type = "memory";
35 reg = <0 0x40000000 0 0x80000000>;
39 compatible = "fixed-clock";
41 clock-frequency = <32768>;
42 clock-output-names = "clk32k";
45 it6505_pp18_reg: regulator0 {
46 compatible = "regulator-fixed";
47 regulator-name = "it6505_pp18";
48 regulator-min-microvolt = <1800000>;
49 regulator-max-microvolt = <1800000>;
54 lcd_pp3300: regulator1 {
55 compatible = "regulator-fixed";
56 regulator-name = "lcd_pp3300";
57 regulator-min-microvolt = <3300000>;
58 regulator-max-microvolt = <3300000>;
63 bl_pp5000: regulator2 {
64 compatible = "regulator-fixed";
65 regulator-name = "bl_pp5000";
66 regulator-min-microvolt = <5000000>;
67 regulator-max-microvolt = <5000000>;
72 mmc1_fixed_power: regulator3 {
73 compatible = "regulator-fixed";
74 regulator-name = "mmc1_power";
75 regulator-min-microvolt = <3300000>;
76 regulator-max-microvolt = <3300000>;
79 mmc1_fixed_io: regulator4 {
80 compatible = "regulator-fixed";
81 regulator-name = "mmc1_io";
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <1800000>;
86 pp1800_alw: regulator5 {
87 compatible = "regulator-fixed";
88 regulator-name = "pp1800_alw";
91 regulator-min-microvolt = <1800000>;
92 regulator-max-microvolt = <1800000>;
95 pp3300_alw: regulator6 {
96 compatible = "regulator-fixed";
97 regulator-name = "pp3300_alw";
100 regulator-min-microvolt = <3300000>;
101 regulator-max-microvolt = <3300000>;
104 reserved_memory: reserved-memory {
105 #address-cells = <2>;
109 scp_mem_reserved: scp_mem_region {
110 compatible = "shared-dma-pool";
111 reg = <0 0x50000000 0 0x2900000>;
117 compatible = "maxim,max98357a";
118 sdmode-gpios = <&pio 175 0>;
122 compatible = "linux,bt-sco";
125 wifi_pwrseq: wifi-pwrseq {
126 compatible = "mmc-pwrseq-simple";
127 pinctrl-names = "default";
128 pinctrl-0 = <&wifi_pins_pwrseq>;
130 /* Toggle WIFI_ENABLE to reset the chip. */
131 reset-gpios = <&pio 119 1>;
134 wifi_wakeup: wifi-wakeup {
135 compatible = "gpio-keys";
136 pinctrl-names = "default";
137 pinctrl-0 = <&wifi_pins_wakeup>;
140 label = "Wake on WiFi";
141 gpios = <&pio 113 GPIO_ACTIVE_HIGH>;
142 linux,code = <KEY_WAKEUP>;
147 tboard_thermistor1: thermal-sensor1 {
148 compatible = "generic-adc-thermal";
149 #thermal-sensor-cells = <0>;
150 io-channels = <&auxadc 0>;
151 io-channel-names = "sensor-channel";
152 temperature-lookup-table = < (-5000) 4241
181 tboard_thermistor2: thermal-sensor2 {
182 compatible = "generic-adc-thermal";
183 #thermal-sensor-cells = <0>;
184 io-channels = <&auxadc 1>;
185 io-channel-names = "sensor-channel";
186 temperature-lookup-table = < (-5000) 4241
221 proc-supply = <&mt6358_vproc12_reg>;
225 proc-supply = <&mt6358_vproc12_reg>;
229 proc-supply = <&mt6358_vproc12_reg>;
233 proc-supply = <&mt6358_vproc12_reg>;
237 proc-supply = <&mt6358_vproc11_reg>;
241 proc-supply = <&mt6358_vproc11_reg>;
245 proc-supply = <&mt6358_vproc11_reg>;
249 proc-supply = <&mt6358_vproc11_reg>;
254 #address-cells = <1>;
257 /* compatible will be set in board dts */
259 enable-gpios = <&pio 45 0>;
260 pinctrl-names = "default";
261 pinctrl-0 = <&panel_pins_default>;
262 avdd-supply = <&ppvarn_lcd>;
263 avee-supply = <&ppvarp_lcd>;
264 pp1800-supply = <&pp1800_lcd>;
265 backlight = <&backlight_lcd0>;
268 remote-endpoint = <&dsi_out>;
276 remote-endpoint = <&panel_in>;
283 mali-supply = <&mt6358_vgpu_reg>;
284 sram-supply = <&mt6358_vsram_gpu_reg>;
288 pinctrl-names = "default";
289 pinctrl-0 = <&i2c0_pins>;
291 clock-frequency = <400000>;
292 #address-cells = <1>;
297 pinctrl-names = "default";
298 pinctrl-0 = <&i2c1_pins>;
300 clock-frequency = <100000>;
304 pinctrl-names = "default";
305 pinctrl-0 = <&i2c3_pins>;
307 clock-frequency = <100000>;
308 #address-cells = <1>;
313 pinctrl-names = "default";
314 pinctrl-0 = <&i2c5_pins>;
316 clock-frequency = <100000>;
317 #address-cells = <1>;
322 pinctrl-names = "default";
323 pinctrl-0 = <&i2c6_pins>;
325 clock-frequency = <100000>;
334 pinctrl-names = "default", "state_uhs";
335 pinctrl-0 = <&mmc0_pins_default>;
336 pinctrl-1 = <&mmc0_pins_uhs>;
338 max-frequency = <200000000>;
345 hs400-ds-delay = <0x12814>;
346 vmmc-supply = <&mt6358_vemc_reg>;
347 vqmmc-supply = <&mt6358_vio18_reg>;
348 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
349 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
355 pinctrl-names = "default", "state_uhs";
356 pinctrl-0 = <&mmc1_pins_default>;
357 pinctrl-1 = <&mmc1_pins_uhs>;
358 vmmc-supply = <&mmc1_fixed_power>;
359 vqmmc-supply = <&mmc1_fixed_io>;
360 mmc-pwrseq = <&wifi_pwrseq>;
362 max-frequency = <200000000>;
367 keep-power-in-suspend;
373 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
374 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
375 #address-cells = <1>;
378 qca_wifi: qca-wifi@1 {
379 compatible = "qcom,ath10k";
389 Avdd-supply = <&mt6358_vaud28_reg>;
393 regulator-min-microvolt = <2700000>;
394 regulator-max-microvolt = <2700000>;
398 regulator-min-microvolt = <2700000>;
399 regulator-max-microvolt = <2700000>;
405 pinmux = <PINMUX_GPIO120__FUNC_GPIO120>;
410 ec_ap_int_odl: ec_ap_int_odl {
412 pinmux = <PINMUX_GPIO151__FUNC_GPIO151>;
418 h1_int_od_l: h1_int_od_l {
420 pinmux = <PINMUX_GPIO153__FUNC_GPIO153>;
427 pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
428 <PINMUX_GPIO83__FUNC_SCL0>;
429 mediatek,pull-up-adv = <3>;
430 mediatek,drive-strength-adv = <00>;
436 pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
437 <PINMUX_GPIO84__FUNC_SCL1>;
438 mediatek,pull-up-adv = <3>;
439 mediatek,drive-strength-adv = <00>;
445 pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
446 <PINMUX_GPIO104__FUNC_SDA2>;
448 mediatek,drive-strength-adv = <00>;
454 pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
455 <PINMUX_GPIO51__FUNC_SDA3>;
456 mediatek,pull-up-adv = <3>;
457 mediatek,drive-strength-adv = <00>;
463 pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
464 <PINMUX_GPIO106__FUNC_SDA4>;
466 mediatek,drive-strength-adv = <00>;
472 pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
473 <PINMUX_GPIO49__FUNC_SDA5>;
474 mediatek,pull-up-adv = <3>;
475 mediatek,drive-strength-adv = <00>;
481 pinmux = <PINMUX_GPIO11__FUNC_SCL6>,
482 <PINMUX_GPIO12__FUNC_SDA6>;
487 mmc0_pins_default: mmc0-pins-default {
489 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
490 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
491 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
492 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
493 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
494 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
495 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
496 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
497 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
499 drive-strength = <MTK_DRIVE_14mA>;
500 mediatek,pull-up-adv = <01>;
504 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
505 drive-strength = <MTK_DRIVE_14mA>;
506 mediatek,pull-down-adv = <10>;
510 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
511 drive-strength = <MTK_DRIVE_14mA>;
512 mediatek,pull-down-adv = <01>;
516 mmc0_pins_uhs: mmc0-pins-uhs {
518 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
519 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
520 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
521 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
522 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
523 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
524 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
525 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
526 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
528 drive-strength = <MTK_DRIVE_14mA>;
529 mediatek,pull-up-adv = <01>;
533 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
534 drive-strength = <MTK_DRIVE_14mA>;
535 mediatek,pull-down-adv = <10>;
539 pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
540 drive-strength = <MTK_DRIVE_14mA>;
541 mediatek,pull-down-adv = <10>;
545 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
546 drive-strength = <MTK_DRIVE_14mA>;
547 mediatek,pull-up-adv = <01>;
551 mmc1_pins_default: mmc1-pins-default {
553 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
554 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
555 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
556 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
557 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
559 mediatek,pull-up-adv = <10>;
563 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
565 mediatek,pull-down-adv = <10>;
569 mmc1_pins_uhs: mmc1-pins-uhs {
571 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
572 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
573 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
574 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
575 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
576 drive-strength = <MTK_DRIVE_6mA>;
578 mediatek,pull-up-adv = <10>;
582 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
583 drive-strength = <MTK_DRIVE_8mA>;
584 mediatek,pull-down-adv = <10>;
589 panel_pins_default: panel_pins_default {
591 pinmux = <PINMUX_GPIO45__FUNC_GPIO45>;
597 pwm0_pin_default: pwm0_pin_default {
599 pinmux = <PINMUX_GPIO176__FUNC_GPIO176>;
604 pinmux = <PINMUX_GPIO43__FUNC_DISP_PWM>;
610 pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>,
611 <PINMUX_GPIO112__FUNC_TP_UTXD1_AO>;
617 pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
618 <PINMUX_GPIO86__FUNC_GPIO86>,
619 <PINMUX_GPIO87__FUNC_SPI0_MO>,
620 <PINMUX_GPIO88__FUNC_SPI0_CLK>;
627 pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
628 <PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
629 <PINMUX_GPIO163__FUNC_SPI1_A_MO>,
630 <PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
637 pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
638 <PINMUX_GPIO1__FUNC_SPI2_MO>,
639 <PINMUX_GPIO2__FUNC_SPI2_CLK>;
643 pinmux = <PINMUX_GPIO94__FUNC_SPI2_MI>;
644 mediatek,pull-down-adv = <00>;
650 pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
651 <PINMUX_GPIO22__FUNC_SPI3_CSB>,
652 <PINMUX_GPIO23__FUNC_SPI3_MO>,
653 <PINMUX_GPIO24__FUNC_SPI3_CLK>;
660 pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
661 <PINMUX_GPIO18__FUNC_SPI4_CSB>,
662 <PINMUX_GPIO19__FUNC_SPI4_MO>,
663 <PINMUX_GPIO20__FUNC_SPI4_CLK>;
670 pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
671 <PINMUX_GPIO14__FUNC_SPI5_CSB>,
672 <PINMUX_GPIO15__FUNC_SPI5_MO>,
673 <PINMUX_GPIO16__FUNC_SPI5_CLK>;
678 uart0_pins_default: uart0-pins-default {
680 pinmux = <PINMUX_GPIO95__FUNC_URXD0>;
685 pinmux = <PINMUX_GPIO96__FUNC_UTXD0>;
689 uart1_pins_default: uart1-pins-default {
691 pinmux = <PINMUX_GPIO121__FUNC_URXD1>;
696 pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
699 pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
703 pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
708 uart1_pins_sleep: uart1-pins-sleep {
710 pinmux = <PINMUX_GPIO121__FUNC_GPIO121>;
715 pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
718 pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
722 pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
727 wifi_pins_pwrseq: wifi-pins-pwrseq {
729 pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
734 wifi_pins_wakeup: wifi-pins-wakeup {
736 pinmux = <PINMUX_GPIO113__FUNC_GPIO113>;
744 pinctrl-names = "default";
745 pinctrl-0 = <&pwm0_pin_default>;
750 pinctrl-names = "default";
751 pinctrl-0 = <&scp_pins>;
754 compatible = "google,cros-ec-rpmsg";
755 mtk,rpmsg-name = "cros-ec-rpmsg";
760 domain-supply = <&mt6358_vgpu_reg>;
768 pinctrl-names = "default";
769 pinctrl-0 = <&spi0_pins>;
770 mediatek,pad-select = <0>;
772 cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
775 compatible = "google,cr50";
777 spi-max-frequency = <1000000>;
778 pinctrl-names = "default";
779 pinctrl-0 = <&h1_int_od_l>;
780 interrupt-parent = <&pio>;
781 interrupts = <153 IRQ_TYPE_EDGE_RISING>;
786 pinctrl-names = "default";
787 pinctrl-0 = <&spi1_pins>;
788 mediatek,pad-select = <0>;
791 w25q64dw: spi-flash@0 {
792 compatible = "winbond,w25q64dw", "jedec,spi-nor";
794 spi-max-frequency = <25000000>;
799 pinctrl-names = "default";
800 pinctrl-0 = <&spi2_pins>;
801 mediatek,pad-select = <0>;
805 compatible = "google,cros-ec-spi";
807 spi-max-frequency = <3000000>;
808 interrupt-parent = <&pio>;
809 interrupts = <151 IRQ_TYPE_LEVEL_LOW>;
810 pinctrl-names = "default";
811 pinctrl-0 = <&ec_ap_int_odl>;
813 i2c_tunnel: i2c-tunnel {
814 compatible = "google,cros-ec-i2c-tunnel";
815 google,remote-bus = <1>;
816 #address-cells = <1>;
820 usbc_extcon: extcon0 {
821 compatible = "google,extcon-usbc-cros-ec";
822 google,usb-port-id = <0>;
826 compatible = "google,cros-cbas";
832 pinctrl-names = "default";
833 pinctrl-0 = <&spi3_pins>;
834 mediatek,pad-select = <0>;
839 pinctrl-names = "default";
840 pinctrl-0 = <&spi4_pins>;
841 mediatek,pad-select = <0>;
846 pinctrl-names = "default";
847 pinctrl-0 = <&spi5_pins>;
848 mediatek,pad-select = <0>;
855 vusb33-supply = <&mt6358_vusb_reg>;
861 polling-delay = <1000>; /* milliseconds */
862 polling-delay-passive = <0>; /* milliseconds */
863 thermal-sensors = <&tboard_thermistor1>;
867 polling-delay = <1000>; /* milliseconds */
868 polling-delay-passive = <0>; /* milliseconds */
869 thermal-sensors = <&tboard_thermistor2>;
878 pinctrl-names = "default";
879 pinctrl-0 = <&uart0_pins_default>;
884 pinctrl-names = "default", "sleep";
885 pinctrl-0 = <&uart1_pins_default>;
886 pinctrl-1 = <&uart1_pins_sleep>;
888 interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
889 <&pio 121 IRQ_TYPE_EDGE_FALLING>;
891 bluetooth: bluetooth {
892 pinctrl-names = "default";
893 pinctrl-0 = <&bt_pins>;
895 compatible = "qcom,qca6174-bt";
896 enable-gpios = <&pio 120 0>;
898 firmware-name = "nvm_00440302_i2s.bin";
903 #address-cells = <1>;
905 vusb33-supply = <&mt6358_vusb_reg>;
909 compatible = "usb5e3,610";
914 #include <arm/cros-ec-keyboard.dtsi>
915 #include <arm/cros-ec-sbs.dtsi>