1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2016 MediaTek Inc.
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/regulator/dlg,da9211-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include "mt8173.dtsi"
14 device_type = "memory";
15 reg = <0 0x40000000 0 0x80000000>;
18 backlight: backlight {
19 compatible = "pwm-backlight";
20 pwms = <&pwm0 0 1000000>;
21 power-supply = <&bl_fixed_reg>;
22 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&disp_pwm0_pins>;
29 bl_fixed_reg: fixedregulator2 {
30 compatible = "regulator-fixed";
31 regulator-name = "bl_fixed";
32 regulator-min-microvolt = <1800000>;
33 regulator-max-microvolt = <1800000>;
34 startup-delay-us = <1000>;
36 gpio = <&pio 32 GPIO_ACTIVE_HIGH>;
37 pinctrl-names = "default";
38 pinctrl-0 = <&bl_fixed_pins>;
42 stdout-path = "serial0:115200n8";
45 gpio_keys: gpio-keys {
46 compatible = "gpio-keys";
47 pinctrl-names = "default";
48 pinctrl-0 = <&gpio_keys_pins>;
52 gpios = <&pio 69 GPIO_ACTIVE_LOW>;
53 linux,code = <SW_LID>;
54 linux,input-type = <EV_SW>;
60 gpios = <&pio 14 GPIO_ACTIVE_HIGH>;
61 linux,code = <KEY_POWER>;
62 debounce-interval = <30>;
67 label = "Tablet_mode";
68 gpios = <&pio 121 GPIO_ACTIVE_HIGH>;
69 linux,code = <SW_TABLET_MODE>;
70 linux,input-type = <EV_SW>;
75 label = "Volume_down";
76 gpios = <&pio 123 GPIO_ACTIVE_LOW>;
77 linux,code = <KEY_VOLUMEDOWN>;
82 gpios = <&pio 124 GPIO_ACTIVE_LOW>;
83 linux,code = <KEY_VOLUMEUP>;
88 compatible = "lg,lp120up1";
89 power-supply = <&panel_fixed_3v3>;
90 ddc-i2c-bus = <&i2c0>;
91 backlight = <&backlight>;
95 remote-endpoint = <&ps8640_out>;
100 panel_fixed_3v3: regulator1 {
101 compatible = "regulator-fixed";
102 regulator-name = "PANEL_3V3";
103 regulator-min-microvolt = <3300000>;
104 regulator-max-microvolt = <3300000>;
106 gpio = <&pio 41 GPIO_ACTIVE_HIGH>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&panel_fixed_pins>;
111 ps8640_fixed_1v2: regulator2 {
112 compatible = "regulator-fixed";
113 regulator-name = "PS8640_1V2";
114 regulator-min-microvolt = <1200000>;
115 regulator-max-microvolt = <1200000>;
116 regulator-enable-ramp-delay = <2000>;
119 gpio = <&pio 30 GPIO_ACTIVE_HIGH>;
120 pinctrl-names = "default";
121 pinctrl-0 = <&ps8640_fixed_pins>;
124 sdio_fixed_3v3: fixedregulator0 {
125 compatible = "regulator-fixed";
126 regulator-name = "3V3";
127 regulator-min-microvolt = <3300000>;
128 regulator-max-microvolt = <3300000>;
129 gpio = <&pio 85 GPIO_ACTIVE_HIGH>;
130 pinctrl-names = "default";
131 pinctrl-0 = <&sdio_fixed_3v3_pins>;
135 compatible = "mediatek,mt8173-rt5650";
136 mediatek,audio-codec = <&rt5650 &hdmi0>;
137 mediatek,platform = <&afe>;
138 pinctrl-names = "default";
139 pinctrl-0 = <&aud_i2s2>;
143 sound-dai = <&rt5650 1>;
148 compatible = "hdmi-connector";
151 ddc-i2c-bus = <&hdmiddc0>;
154 hdmi_connector_in: endpoint {
155 remote-endpoint = <&hdmi0_out>;
166 proc-supply = <&mt6397_vpca15_reg>;
170 proc-supply = <&mt6397_vpca15_reg>;
174 proc-supply = <&da9211_vcpu_reg>;
175 sram-supply = <&mt6397_vsramca7_reg>;
179 proc-supply = <&da9211_vcpu_reg>;
180 sram-supply = <&mt6397_vsramca7_reg>;
184 sustainable-power = <4500>; /* milliwatts */
186 threshold: trip-point0 {
187 temperature = <60000>;
190 target: trip-point1 {
191 temperature = <65000>;
201 remote-endpoint = <&ps8640_in>;
217 hdmi0_out: endpoint {
218 remote-endpoint = <&hdmi_connector_in>;
226 mediatek,ibias = <0xc>;
232 rt5650: audio-codec@1a {
233 compatible = "realtek,rt5650";
235 avdd-supply = <&mt6397_vgp1_reg>;
236 cpvdd-supply = <&mt6397_vcama_reg>;
237 interrupt-parent = <&pio>;
238 interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
239 pinctrl-names = "default";
240 pinctrl-0 = <&rt5650_irq>;
241 #sound-dai-cells = <1>;
242 realtek,dmic1-data-pin = <2>;
243 realtek,jd-mode = <2>;
246 ps8640: edp-bridge@8 {
247 compatible = "parade,ps8640";
249 powerdown-gpios = <&pio 127 GPIO_ACTIVE_LOW>;
250 reset-gpios = <&pio 115 GPIO_ACTIVE_LOW>;
251 pinctrl-names = "default";
252 pinctrl-0 = <&ps8640_pins>;
253 vdd12-supply = <&ps8640_fixed_1v2>;
254 vdd33-supply = <&mt6397_vgp2_reg>;
257 #address-cells = <1>;
263 ps8640_in: endpoint {
264 remote-endpoint = <&dsi0_out>;
271 ps8640_out: endpoint {
272 remote-endpoint = <&panel_in>;
280 clock-frequency = <1500000>;
284 compatible = "dlg,da9211";
286 interrupt-parent = <&pio>;
287 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
290 da9211_vcpu_reg: BUCKA {
291 regulator-name = "VBUCKA";
292 regulator-min-microvolt = < 700000>;
293 regulator-max-microvolt = <1310000>;
294 regulator-min-microamp = <2000000>;
295 regulator-max-microamp = <4400000>;
296 regulator-ramp-delay = <10000>;
298 regulator-allowed-modes = <DA9211_BUCK_MODE_SYNC
299 DA9211_BUCK_MODE_AUTO>;
302 da9211_vgpu_reg: BUCKB {
303 regulator-name = "VBUCKB";
304 regulator-min-microvolt = < 700000>;
305 regulator-max-microvolt = <1310000>;
306 regulator-min-microamp = <2000000>;
307 regulator-max-microamp = <3000000>;
308 regulator-ramp-delay = <10000>;
318 compatible = "infineon,slb9645tt";
320 powered-while-suspended;
325 clock-frequency = <400000>;
328 touchscreen: touchscreen@10 {
329 compatible = "elan,ekth3500";
331 interrupt-parent = <&pio>;
332 interrupts = <88 IRQ_TYPE_LEVEL_LOW>;
337 clock-frequency = <400000>;
339 pinctrl-names = "default";
340 pinctrl-0 = <&trackpad_irq>;
342 trackpad: trackpad@15 {
343 compatible = "elan,ekth3000";
344 interrupt-parent = <&pio>;
345 interrupts = <117 IRQ_TYPE_LEVEL_LOW>;
347 vcc-supply = <&mt6397_vgp6_reg>;
358 pinctrl-names = "default", "state_uhs";
359 pinctrl-0 = <&mmc0_pins_default>;
360 pinctrl-1 = <&mmc0_pins_uhs>;
362 max-frequency = <200000000>;
367 hs400-ds-delay = <0x14015>;
368 mediatek,hs200-cmd-int-delay=<30>;
369 mediatek,hs400-cmd-int-delay=<14>;
370 mediatek,hs400-cmd-resp-sel-rising;
371 vmmc-supply = <&mt6397_vemc_3v3_reg>;
372 vqmmc-supply = <&mt6397_vio18_reg>;
373 assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
374 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
380 pinctrl-names = "default", "state_uhs";
381 pinctrl-0 = <&mmc1_pins_default>;
382 pinctrl-1 = <&mmc1_pins_uhs>;
384 max-frequency = <200000000>;
388 cd-gpios = <&pio 1 GPIO_ACTIVE_LOW>;
389 vmmc-supply = <&mt6397_vmch_reg>;
390 vqmmc-supply = <&mt6397_vmc_reg>;
395 pinctrl-names = "default", "state_uhs";
396 pinctrl-0 = <&mmc3_pins_default>;
397 pinctrl-1 = <&mmc3_pins_uhs>;
399 max-frequency = <200000000>;
403 keep-power-in-suspend;
406 vmmc-supply = <&sdio_fixed_3v3>;
407 vqmmc-supply = <&mt6397_vgp3_reg>;
411 #address-cells = <1>;
415 compatible = "marvell,sd8897-bt";
417 interrupt-parent = <&pio>;
418 interrupts = <119 IRQ_TYPE_LEVEL_LOW>;
419 marvell,wakeup-pin = /bits/ 16 <0x0d>;
420 marvell,wakeup-gap-ms = /bits/ 16 <0x64>;
424 compatible = "marvell,sd8897";
426 interrupt-parent = <&pio>;
427 interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
428 marvell,wakeup-pin = <3>;
434 pinctrl-names = "default";
435 pinctrl-0 = <&nor_gpio1_pins>;
438 compatible = "jedec,spi-nor";
440 spi-max-frequency = <50000000>;
445 gpio-line-names = "EC_INT_1V8",
450 * AP_FLASH_WP_L is crossystem ABI. Schematics
459 "WRAP_EVENT_S_EINT10",
481 "PANEL_LCD_POWER_EN",
492 "SOC_I2C2_1V8_SDA_400K",
493 "SOC_I2C2_1V8_SCL_400K",
494 "SOC_I2C0_1V8_SDA_400K",
495 "SOC_I2C0_1V8_SCL_400K",
542 "TOUCHSCREEN_RESET_R",
543 "PLATFORM_PROCHOT_L",
555 "SOC_I2C3_1V8_SDA_400K",
556 "SOC_I2C3_1V8_SCL_400K",
564 "PS8640_SYSRSTN_1V8",
565 "APIN_MAX98090_DOUT2",
574 "SOC_I2C1_1V8_SDA_1M",
575 "SOC_I2C1_1V8_SCL_1M",
580 "APOUT_MAX98090_DIN",
581 "APIN_MAX98090_DOUT",
582 "SOC_I2C4_1V8_SDA_400K",
583 "SOC_I2C4_1V8_SCL_400K";
587 pinmux = <MT8173_PIN_128_I2S0_LRCK__FUNC_I2S1_WS>,
588 <MT8173_PIN_129_I2S0_BCK__FUNC_I2S1_BCK>,
589 <MT8173_PIN_130_I2S0_MCK__FUNC_I2S1_MCK>,
590 <MT8173_PIN_131_I2S0_DATA0__FUNC_I2S1_DO_1>,
591 <MT8173_PIN_12_EINT12__FUNC_I2S2_WS>,
592 <MT8173_PIN_13_EINT13__FUNC_I2S2_BCK>,
593 <MT8173_PIN_132_I2S0_DATA1__FUNC_I2S2_DI_2>;
598 bl_fixed_pins: bl_fixed_pins {
600 pinmux = <MT8173_PIN_32_UTXD2__FUNC_GPIO32>;
605 bt_wake_pins: bt_wake_pins {
607 pinmux = <MT8173_PIN_119_KPROW0__FUNC_GPIO119>;
612 disp_pwm0_pins: disp_pwm0_pins {
614 pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
619 gpio_keys_pins: gpio_keys_pins {
621 pinmux = <MT8173_PIN_123_KPCOL1__FUNC_GPIO123>,
622 <MT8173_PIN_124_KPCOL2__FUNC_GPIO124>;
627 pinmux = <MT8173_PIN_121_KPROW2__FUNC_GPIO121>;
632 hdmi_mux_pins: hdmi_mux_pins {
634 pinmux = <MT8173_PIN_36_DAISYNC__FUNC_GPIO36>;
640 pinmux = <MT8173_PIN_15_EINT15__FUNC_GPIO15>;
645 mmc0_pins_default: mmc0default {
647 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
648 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
649 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
650 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
651 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
652 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
653 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
654 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
655 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
660 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
665 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
670 mmc1_pins_default: mmc1default {
672 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
673 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
674 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
675 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
676 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
678 drive-strength = <MTK_DRIVE_4mA>;
679 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
683 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
685 drive-strength = <MTK_DRIVE_4mA>;
689 pinmux = <MT8173_PIN_1_EINT1__FUNC_GPIO1>;
694 mmc3_pins_default: mmc3default {
696 pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
697 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
698 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
699 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
701 drive-strength = <MTK_DRIVE_8mA>;
702 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
706 pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
708 drive-strength = <MTK_DRIVE_8mA>;
709 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
713 pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
715 drive-strength = <MTK_DRIVE_8mA>;
719 mmc0_pins_uhs: mmc0 {
721 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
722 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
723 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
724 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
725 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
726 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
727 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
728 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
729 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
731 drive-strength = <MTK_DRIVE_6mA>;
732 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
736 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
737 drive-strength = <MTK_DRIVE_6mA>;
738 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
742 pinmux = <MT8173_PIN_67_MSDC0_DSL__FUNC_MSDC0_DSL>;
743 drive-strength = <MTK_DRIVE_10mA>;
744 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
748 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
753 mmc1_pins_uhs: mmc1 {
755 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
756 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
757 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
758 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
759 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
761 drive-strength = <MTK_DRIVE_6mA>;
762 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
766 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
767 drive-strength = <MTK_DRIVE_8mA>;
768 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
772 mmc3_pins_uhs: mmc3 {
774 pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
775 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
776 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
777 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
779 drive-strength = <MTK_DRIVE_8mA>;
780 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
784 pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
786 drive-strength = <MTK_DRIVE_8mA>;
787 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
791 pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
792 drive-strength = <MTK_DRIVE_8mA>;
793 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
797 nor_gpio1_pins: nor {
799 pinmux = <MT8173_PIN_6_EINT6__FUNC_SFCS0>,
800 <MT8173_PIN_7_EINT7__FUNC_SFHOLD>,
801 <MT8173_PIN_8_EINT8__FUNC_SFIN>;
803 drive-strength = <MTK_DRIVE_4mA>;
808 pinmux = <MT8173_PIN_5_EINT5__FUNC_SFOUT>;
809 drive-strength = <MTK_DRIVE_4mA>;
814 pinmux = <MT8173_PIN_9_EINT9__FUNC_SFCK>;
816 drive-strength = <MTK_DRIVE_4mA>;
821 panel_fixed_pins: panel_fixed_pins {
823 pinmux = <MT8173_PIN_41_CMMCLK__FUNC_GPIO41>;
827 ps8640_pins: ps8640_pins {
829 pinmux = <MT8173_PIN_92_PCM_CLK__FUNC_GPIO92>,
830 <MT8173_PIN_115_URTS0__FUNC_GPIO115>,
831 <MT8173_PIN_127_LCM_RST__FUNC_GPIO127>;
835 ps8640_fixed_pins: ps8640_fixed_pins {
837 pinmux = <MT8173_PIN_30_URTS2__FUNC_GPIO30>;
841 rt5650_irq: rt5650_irq {
843 pinmux = <MT8173_PIN_3_EINT3__FUNC_GPIO3>;
848 sdio_fixed_3v3_pins: sdio_fixed_3v3_pins {
850 pinmux = <MT8173_PIN_85_AUD_DAT_MOSI__FUNC_GPIO85>;
857 pinmux = <MT8173_PIN_0_EINT0__FUNC_GPIO0>;
862 pinmux = <MT8173_PIN_102_MSDC2_DAT2__FUNC_SPI_CK_1_>,
863 <MT8173_PIN_103_MSDC2_DAT3__FUNC_SPI_MI_1_>,
864 <MT8173_PIN_104_MSDC2_CLK__FUNC_SPI_MO_1_>,
865 <MT8173_PIN_105_MSDC2_CMD__FUNC_SPI_CS_1_>;
870 trackpad_irq: trackpad_irq {
872 pinmux = <MT8173_PIN_117_URXD3__FUNC_GPIO117>;
880 pinmux = <MT8173_PIN_101_MSDC2_DAT1__FUNC_GPIO101>;
886 wifi_wake_pins: wifi_wake_pins {
888 pinmux = <MT8173_PIN_38_CONN_RST__FUNC_GPIO38>;
900 compatible = "mediatek,mt6397";
901 #address-cells = <1>;
903 interrupt-parent = <&pio>;
904 interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
905 interrupt-controller;
906 #interrupt-cells = <2>;
909 compatible = "mediatek,mt6397-clk";
914 compatible = "mediatek,mt6397-pinctrl";
920 regulator: mt6397regulator {
921 compatible = "mediatek,mt6397-regulator";
923 mt6397_vpca15_reg: buck_vpca15 {
924 regulator-compatible = "buck_vpca15";
925 regulator-name = "vpca15";
926 regulator-min-microvolt = < 700000>;
927 regulator-max-microvolt = <1350000>;
928 regulator-ramp-delay = <12500>;
930 regulator-allowed-modes = <0 1>;
933 mt6397_vpca7_reg: buck_vpca7 {
934 regulator-compatible = "buck_vpca7";
935 regulator-name = "vpca7";
936 regulator-min-microvolt = < 700000>;
937 regulator-max-microvolt = <1350000>;
938 regulator-ramp-delay = <12500>;
939 regulator-enable-ramp-delay = <115>;
943 mt6397_vsramca15_reg: buck_vsramca15 {
944 regulator-compatible = "buck_vsramca15";
945 regulator-name = "vsramca15";
946 regulator-min-microvolt = < 700000>;
947 regulator-max-microvolt = <1350000>;
948 regulator-ramp-delay = <12500>;
952 mt6397_vsramca7_reg: buck_vsramca7 {
953 regulator-compatible = "buck_vsramca7";
954 regulator-name = "vsramca7";
955 regulator-min-microvolt = < 700000>;
956 regulator-max-microvolt = <1350000>;
957 regulator-ramp-delay = <12500>;
961 mt6397_vcore_reg: buck_vcore {
962 regulator-compatible = "buck_vcore";
963 regulator-name = "vcore";
964 regulator-min-microvolt = < 700000>;
965 regulator-max-microvolt = <1350000>;
966 regulator-ramp-delay = <12500>;
970 mt6397_vgpu_reg: buck_vgpu {
971 regulator-compatible = "buck_vgpu";
972 regulator-name = "vgpu";
973 regulator-min-microvolt = < 700000>;
974 regulator-max-microvolt = <1350000>;
975 regulator-ramp-delay = <12500>;
976 regulator-enable-ramp-delay = <115>;
979 mt6397_vdrm_reg: buck_vdrm {
980 regulator-compatible = "buck_vdrm";
981 regulator-name = "vdrm";
982 regulator-min-microvolt = <1200000>;
983 regulator-max-microvolt = <1400000>;
984 regulator-ramp-delay = <12500>;
988 mt6397_vio18_reg: buck_vio18 {
989 regulator-compatible = "buck_vio18";
990 regulator-name = "vio18";
991 regulator-min-microvolt = <1620000>;
992 regulator-max-microvolt = <1980000>;
993 regulator-ramp-delay = <12500>;
997 mt6397_vtcxo_reg: ldo_vtcxo {
998 regulator-compatible = "ldo_vtcxo";
999 regulator-name = "vtcxo";
1000 regulator-always-on;
1003 mt6397_va28_reg: ldo_va28 {
1004 regulator-compatible = "ldo_va28";
1005 regulator-name = "va28";
1008 mt6397_vcama_reg: ldo_vcama {
1009 regulator-compatible = "ldo_vcama";
1010 regulator-name = "vcama";
1011 regulator-min-microvolt = <1800000>;
1012 regulator-max-microvolt = <1800000>;
1013 regulator-enable-ramp-delay = <218>;
1016 mt6397_vio28_reg: ldo_vio28 {
1017 regulator-compatible = "ldo_vio28";
1018 regulator-name = "vio28";
1019 regulator-always-on;
1022 mt6397_vusb_reg: ldo_vusb {
1023 regulator-compatible = "ldo_vusb";
1024 regulator-name = "vusb";
1027 mt6397_vmc_reg: ldo_vmc {
1028 regulator-compatible = "ldo_vmc";
1029 regulator-name = "vmc";
1030 regulator-min-microvolt = <1800000>;
1031 regulator-max-microvolt = <3300000>;
1032 regulator-enable-ramp-delay = <218>;
1035 mt6397_vmch_reg: ldo_vmch {
1036 regulator-compatible = "ldo_vmch";
1037 regulator-name = "vmch";
1038 regulator-min-microvolt = <3000000>;
1039 regulator-max-microvolt = <3300000>;
1040 regulator-enable-ramp-delay = <218>;
1043 mt6397_vemc_3v3_reg: ldo_vemc3v3 {
1044 regulator-compatible = "ldo_vemc3v3";
1045 regulator-name = "vemc_3v3";
1046 regulator-min-microvolt = <3000000>;
1047 regulator-max-microvolt = <3300000>;
1048 regulator-enable-ramp-delay = <218>;
1051 mt6397_vgp1_reg: ldo_vgp1 {
1052 regulator-compatible = "ldo_vgp1";
1053 regulator-name = "vcamd";
1054 regulator-min-microvolt = <1800000>;
1055 regulator-max-microvolt = <1800000>;
1056 regulator-enable-ramp-delay = <240>;
1059 mt6397_vgp2_reg: ldo_vgp2 {
1060 regulator-compatible = "ldo_vgp2";
1061 regulator-name = "vcamio";
1062 regulator-min-microvolt = <3300000>;
1063 regulator-max-microvolt = <3300000>;
1064 regulator-enable-ramp-delay = <218>;
1067 mt6397_vgp3_reg: ldo_vgp3 {
1068 regulator-compatible = "ldo_vgp3";
1069 regulator-name = "vcamaf";
1070 regulator-min-microvolt = <1800000>;
1071 regulator-max-microvolt = <1800000>;
1072 regulator-enable-ramp-delay = <218>;
1075 mt6397_vgp4_reg: ldo_vgp4 {
1076 regulator-compatible = "ldo_vgp4";
1077 regulator-name = "vgp4";
1078 regulator-min-microvolt = <1200000>;
1079 regulator-max-microvolt = <3300000>;
1080 regulator-enable-ramp-delay = <218>;
1083 mt6397_vgp5_reg: ldo_vgp5 {
1084 regulator-compatible = "ldo_vgp5";
1085 regulator-name = "vgp5";
1086 regulator-min-microvolt = <1200000>;
1087 regulator-max-microvolt = <3000000>;
1088 regulator-enable-ramp-delay = <218>;
1091 mt6397_vgp6_reg: ldo_vgp6 {
1092 regulator-compatible = "ldo_vgp6";
1093 regulator-name = "vgp6";
1094 regulator-min-microvolt = <3300000>;
1095 regulator-max-microvolt = <3300000>;
1096 regulator-enable-ramp-delay = <218>;
1097 regulator-always-on;
1100 mt6397_vibr_reg: ldo_vibr {
1101 regulator-compatible = "ldo_vibr";
1102 regulator-name = "vibr";
1103 regulator-min-microvolt = <1300000>;
1104 regulator-max-microvolt = <3300000>;
1105 regulator-enable-ramp-delay = <218>;
1110 compatible = "mediatek,mt6397-rtc";
1113 syscfg_pctl_pmic: syscfg_pctl_pmic@c000 {
1114 compatible = "mediatek,mt6397-pctl-pmic-syscfg",
1116 reg = <0 0x0000c000 0 0x0108>;
1122 pinctrl-names = "default";
1123 pinctrl-0 = <&spi_pins_a>;
1124 mediatek,pad-select = <1>;
1128 compatible = "google,cros-ec-spi";
1130 spi-max-frequency = <12000000>;
1131 interrupt-parent = <&pio>;
1132 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
1133 google,cros-ec-spi-msg-delay = <500>;
1135 i2c_tunnel: i2c-tunnel0 {
1136 compatible = "google,cros-ec-i2c-tunnel";
1137 google,remote-bus = <0>;
1138 #address-cells = <1>;
1141 battery: sbs-battery@b {
1142 compatible = "sbs,sbs-battery";
1144 sbs,i2c-retry-count = <2>;
1145 sbs,poll-retry-count = <1>;
1154 vusb33-supply = <&mt6397_vusb_reg>;
1159 bank0-supply = <&mt6397_vpca15_reg>;
1160 bank1-supply = <&da9211_vcpu_reg>;
1168 pinctrl-names = "default";
1169 pinctrl-0 = <&usb_pins>;
1170 vusb33-supply = <&mt6397_vusb_reg>;
1174 #include <arm/cros-ec-keyboard.dtsi>