1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2016 MediaTek Inc.
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/regulator/dlg,da9211-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include "mt8173.dtsi"
20 device_type = "memory";
21 reg = <0 0x40000000 0 0x80000000>;
24 backlight: backlight {
25 compatible = "pwm-backlight";
26 pwms = <&pwm0 0 1000000>;
27 power-supply = <&bl_fixed_reg>;
28 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&disp_pwm0_pins>;
35 bl_fixed_reg: fixedregulator2 {
36 compatible = "regulator-fixed";
37 regulator-name = "bl_fixed";
38 regulator-min-microvolt = <1800000>;
39 regulator-max-microvolt = <1800000>;
40 startup-delay-us = <1000>;
42 gpio = <&pio 32 GPIO_ACTIVE_HIGH>;
43 pinctrl-names = "default";
44 pinctrl-0 = <&bl_fixed_pins>;
48 stdout-path = "serial0:115200n8";
51 gpio_keys: gpio-keys {
52 compatible = "gpio-keys";
53 pinctrl-names = "default";
54 pinctrl-0 = <&gpio_keys_pins>;
58 gpios = <&pio 69 GPIO_ACTIVE_LOW>;
59 linux,code = <SW_LID>;
60 linux,input-type = <EV_SW>;
66 gpios = <&pio 14 GPIO_ACTIVE_HIGH>;
67 linux,code = <KEY_POWER>;
68 debounce-interval = <30>;
73 label = "Tablet_mode";
74 gpios = <&pio 121 GPIO_ACTIVE_HIGH>;
75 linux,code = <SW_TABLET_MODE>;
76 linux,input-type = <EV_SW>;
81 label = "Volume_down";
82 gpios = <&pio 123 GPIO_ACTIVE_LOW>;
83 linux,code = <KEY_VOLUMEDOWN>;
88 gpios = <&pio 124 GPIO_ACTIVE_LOW>;
89 linux,code = <KEY_VOLUMEUP>;
94 compatible = "lg,lp120up1";
95 power-supply = <&panel_fixed_3v3>;
96 backlight = <&backlight>;
100 remote-endpoint = <&ps8640_out>;
105 panel_fixed_3v3: regulator1 {
106 compatible = "regulator-fixed";
107 regulator-name = "PANEL_3V3";
108 regulator-min-microvolt = <3300000>;
109 regulator-max-microvolt = <3300000>;
111 gpio = <&pio 41 GPIO_ACTIVE_HIGH>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&panel_fixed_pins>;
116 ps8640_fixed_1v2: regulator2 {
117 compatible = "regulator-fixed";
118 regulator-name = "PS8640_1V2";
119 regulator-min-microvolt = <1200000>;
120 regulator-max-microvolt = <1200000>;
121 regulator-enable-ramp-delay = <2000>;
124 gpio = <&pio 30 GPIO_ACTIVE_HIGH>;
125 pinctrl-names = "default";
126 pinctrl-0 = <&ps8640_fixed_pins>;
129 sdio_fixed_3v3: fixedregulator0 {
130 compatible = "regulator-fixed";
131 regulator-name = "3V3";
132 regulator-min-microvolt = <3300000>;
133 regulator-max-microvolt = <3300000>;
134 gpio = <&pio 85 GPIO_ACTIVE_HIGH>;
135 pinctrl-names = "default";
136 pinctrl-0 = <&sdio_fixed_3v3_pins>;
140 compatible = "mediatek,mt8173-rt5650";
141 mediatek,audio-codec = <&rt5650 &hdmi0>;
142 mediatek,platform = <&afe>;
143 pinctrl-names = "default";
144 pinctrl-0 = <&aud_i2s2>;
148 sound-dai = <&rt5650 1>;
153 compatible = "hdmi-connector";
156 ddc-i2c-bus = <&hdmiddc0>;
159 hdmi_connector_in: endpoint {
160 remote-endpoint = <&hdmi0_out>;
167 domain-supply = <&da9211_vgpu_reg>;
175 proc-supply = <&mt6397_vpca15_reg>;
179 proc-supply = <&mt6397_vpca15_reg>;
183 proc-supply = <&da9211_vcpu_reg>;
184 sram-supply = <&mt6397_vsramca7_reg>;
188 proc-supply = <&da9211_vcpu_reg>;
189 sram-supply = <&mt6397_vsramca7_reg>;
193 sustainable-power = <4500>; /* milliwatts */
195 threshold: trip-point0 {
196 temperature = <60000>;
199 target: trip-point1 {
200 temperature = <65000>;
210 remote-endpoint = <&ps8640_in>;
226 hdmi0_out: endpoint {
227 remote-endpoint = <&hdmi_connector_in>;
235 mediatek,ibias = <0xc>;
241 rt5650: audio-codec@1a {
242 compatible = "realtek,rt5650";
244 avdd-supply = <&mt6397_vgp1_reg>;
245 cpvdd-supply = <&mt6397_vcama_reg>;
246 interrupt-parent = <&pio>;
247 interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
248 pinctrl-names = "default";
249 pinctrl-0 = <&rt5650_irq>;
250 #sound-dai-cells = <1>;
251 realtek,dmic1-data-pin = <2>;
252 realtek,jd-mode = <2>;
255 ps8640: edp-bridge@8 {
256 compatible = "parade,ps8640";
258 powerdown-gpios = <&pio 127 GPIO_ACTIVE_LOW>;
259 reset-gpios = <&pio 115 GPIO_ACTIVE_LOW>;
260 pinctrl-names = "default";
261 pinctrl-0 = <&ps8640_pins>;
262 vdd12-supply = <&ps8640_fixed_1v2>;
263 vdd33-supply = <&mt6397_vgp2_reg>;
266 #address-cells = <1>;
272 ps8640_in: endpoint {
273 remote-endpoint = <&dsi0_out>;
280 ps8640_out: endpoint {
281 remote-endpoint = <&panel_in>;
289 clock-frequency = <1500000>;
293 compatible = "dlg,da9211";
295 interrupt-parent = <&pio>;
296 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
299 da9211_vcpu_reg: BUCKA {
300 regulator-name = "VBUCKA";
301 regulator-min-microvolt = < 700000>;
302 regulator-max-microvolt = <1310000>;
303 regulator-min-microamp = <2000000>;
304 regulator-max-microamp = <4400000>;
305 regulator-ramp-delay = <10000>;
307 regulator-allowed-modes = <DA9211_BUCK_MODE_SYNC
308 DA9211_BUCK_MODE_AUTO>;
311 da9211_vgpu_reg: BUCKB {
312 regulator-name = "VBUCKB";
313 regulator-min-microvolt = < 700000>;
314 regulator-max-microvolt = <1310000>;
315 regulator-min-microamp = <2000000>;
316 regulator-max-microamp = <3000000>;
317 regulator-ramp-delay = <10000>;
327 compatible = "infineon,slb9645tt";
329 powered-while-suspended;
334 clock-frequency = <400000>;
337 touchscreen: touchscreen@10 {
338 compatible = "elan,ekth3500";
340 interrupt-parent = <&pio>;
341 interrupts = <88 IRQ_TYPE_LEVEL_LOW>;
346 clock-frequency = <400000>;
348 pinctrl-names = "default";
349 pinctrl-0 = <&trackpad_irq>;
351 trackpad: trackpad@15 {
352 compatible = "elan,ekth3000";
353 interrupt-parent = <&pio>;
354 interrupts = <117 IRQ_TYPE_LEVEL_LOW>;
356 vcc-supply = <&mt6397_vgp6_reg>;
367 pinctrl-names = "default", "state_uhs";
368 pinctrl-0 = <&mmc0_pins_default>;
369 pinctrl-1 = <&mmc0_pins_uhs>;
371 max-frequency = <200000000>;
376 hs400-ds-delay = <0x14015>;
377 mediatek,hs200-cmd-int-delay=<30>;
378 mediatek,hs400-cmd-int-delay=<14>;
379 mediatek,hs400-cmd-resp-sel-rising;
380 vmmc-supply = <&mt6397_vemc_3v3_reg>;
381 vqmmc-supply = <&mt6397_vio18_reg>;
382 assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
383 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
389 pinctrl-names = "default", "state_uhs";
390 pinctrl-0 = <&mmc1_pins_default>;
391 pinctrl-1 = <&mmc1_pins_uhs>;
393 max-frequency = <200000000>;
397 cd-gpios = <&pio 1 GPIO_ACTIVE_LOW>;
398 vmmc-supply = <&mt6397_vmch_reg>;
399 vqmmc-supply = <&mt6397_vmc_reg>;
404 pinctrl-names = "default", "state_uhs";
405 pinctrl-0 = <&mmc3_pins_default>;
406 pinctrl-1 = <&mmc3_pins_uhs>;
408 max-frequency = <200000000>;
412 keep-power-in-suspend;
415 vmmc-supply = <&sdio_fixed_3v3>;
416 vqmmc-supply = <&mt6397_vgp3_reg>;
420 #address-cells = <1>;
424 compatible = "marvell,sd8897-bt";
426 interrupt-parent = <&pio>;
427 interrupts = <119 IRQ_TYPE_LEVEL_LOW>;
428 marvell,wakeup-pin = /bits/ 16 <0x0d>;
429 marvell,wakeup-gap-ms = /bits/ 16 <0x64>;
433 compatible = "marvell,sd8897";
435 interrupt-parent = <&pio>;
436 interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
437 marvell,wakeup-pin = <3>;
443 pinctrl-names = "default";
444 pinctrl-0 = <&nor_gpio1_pins>;
447 compatible = "jedec,spi-nor";
449 spi-max-frequency = <50000000>;
454 gpio-line-names = "EC_INT_1V8",
459 * AP_FLASH_WP_L is crossystem ABI. Schematics
468 "WRAP_EVENT_S_EINT10",
490 "PANEL_LCD_POWER_EN",
501 "SOC_I2C2_1V8_SDA_400K",
502 "SOC_I2C2_1V8_SCL_400K",
503 "SOC_I2C0_1V8_SDA_400K",
504 "SOC_I2C0_1V8_SCL_400K",
551 "TOUCHSCREEN_RESET_R",
552 "PLATFORM_PROCHOT_L",
564 "SOC_I2C3_1V8_SDA_400K",
565 "SOC_I2C3_1V8_SCL_400K",
573 "PS8640_SYSRSTN_1V8",
574 "APIN_MAX98090_DOUT2",
583 "SOC_I2C1_1V8_SDA_1M",
584 "SOC_I2C1_1V8_SCL_1M",
589 "APOUT_MAX98090_DIN",
590 "APIN_MAX98090_DOUT",
591 "SOC_I2C4_1V8_SDA_400K",
592 "SOC_I2C4_1V8_SCL_400K";
596 pinmux = <MT8173_PIN_128_I2S0_LRCK__FUNC_I2S1_WS>,
597 <MT8173_PIN_129_I2S0_BCK__FUNC_I2S1_BCK>,
598 <MT8173_PIN_130_I2S0_MCK__FUNC_I2S1_MCK>,
599 <MT8173_PIN_131_I2S0_DATA0__FUNC_I2S1_DO_1>,
600 <MT8173_PIN_12_EINT12__FUNC_I2S2_WS>,
601 <MT8173_PIN_13_EINT13__FUNC_I2S2_BCK>,
602 <MT8173_PIN_132_I2S0_DATA1__FUNC_I2S2_DI_2>;
607 bl_fixed_pins: bl_fixed_pins {
609 pinmux = <MT8173_PIN_32_UTXD2__FUNC_GPIO32>;
614 bt_wake_pins: bt_wake_pins {
616 pinmux = <MT8173_PIN_119_KPROW0__FUNC_GPIO119>;
621 disp_pwm0_pins: disp_pwm0_pins {
623 pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
628 gpio_keys_pins: gpio_keys_pins {
630 pinmux = <MT8173_PIN_123_KPCOL1__FUNC_GPIO123>,
631 <MT8173_PIN_124_KPCOL2__FUNC_GPIO124>;
636 pinmux = <MT8173_PIN_121_KPROW2__FUNC_GPIO121>;
641 hdmi_mux_pins: hdmi_mux_pins {
643 pinmux = <MT8173_PIN_36_DAISYNC__FUNC_GPIO36>;
649 pinmux = <MT8173_PIN_15_EINT15__FUNC_GPIO15>;
654 mmc0_pins_default: mmc0default {
656 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
657 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
658 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
659 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
660 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
661 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
662 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
663 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
664 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
669 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
674 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
679 mmc1_pins_default: mmc1default {
681 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
682 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
683 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
684 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
685 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
687 drive-strength = <MTK_DRIVE_4mA>;
688 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
692 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
694 drive-strength = <MTK_DRIVE_4mA>;
698 pinmux = <MT8173_PIN_1_EINT1__FUNC_GPIO1>;
703 mmc3_pins_default: mmc3default {
705 pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
706 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
707 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
708 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
710 drive-strength = <MTK_DRIVE_8mA>;
711 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
715 pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
717 drive-strength = <MTK_DRIVE_8mA>;
718 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
722 pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
724 drive-strength = <MTK_DRIVE_8mA>;
728 mmc0_pins_uhs: mmc0 {
730 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
731 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
732 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
733 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
734 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
735 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
736 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
737 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
738 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
740 drive-strength = <MTK_DRIVE_6mA>;
741 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
745 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
746 drive-strength = <MTK_DRIVE_6mA>;
747 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
751 pinmux = <MT8173_PIN_67_MSDC0_DSL__FUNC_MSDC0_DSL>;
752 drive-strength = <MTK_DRIVE_10mA>;
753 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
757 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
762 mmc1_pins_uhs: mmc1 {
764 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
765 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
766 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
767 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
768 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
770 drive-strength = <MTK_DRIVE_6mA>;
771 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
775 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
776 drive-strength = <MTK_DRIVE_8mA>;
777 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
781 mmc3_pins_uhs: mmc3 {
783 pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
784 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
785 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
786 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
788 drive-strength = <MTK_DRIVE_8mA>;
789 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
793 pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
795 drive-strength = <MTK_DRIVE_8mA>;
796 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
800 pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
801 drive-strength = <MTK_DRIVE_8mA>;
802 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
806 nor_gpio1_pins: nor {
808 pinmux = <MT8173_PIN_6_EINT6__FUNC_SFCS0>,
809 <MT8173_PIN_7_EINT7__FUNC_SFHOLD>,
810 <MT8173_PIN_8_EINT8__FUNC_SFIN>;
812 drive-strength = <MTK_DRIVE_4mA>;
817 pinmux = <MT8173_PIN_5_EINT5__FUNC_SFOUT>;
818 drive-strength = <MTK_DRIVE_4mA>;
823 pinmux = <MT8173_PIN_9_EINT9__FUNC_SFCK>;
825 drive-strength = <MTK_DRIVE_4mA>;
830 panel_fixed_pins: panel_fixed_pins {
832 pinmux = <MT8173_PIN_41_CMMCLK__FUNC_GPIO41>;
836 ps8640_pins: ps8640_pins {
838 pinmux = <MT8173_PIN_92_PCM_CLK__FUNC_GPIO92>,
839 <MT8173_PIN_115_URTS0__FUNC_GPIO115>,
840 <MT8173_PIN_127_LCM_RST__FUNC_GPIO127>;
844 ps8640_fixed_pins: ps8640_fixed_pins {
846 pinmux = <MT8173_PIN_30_URTS2__FUNC_GPIO30>;
850 rt5650_irq: rt5650_irq {
852 pinmux = <MT8173_PIN_3_EINT3__FUNC_GPIO3>;
857 sdio_fixed_3v3_pins: sdio_fixed_3v3_pins {
859 pinmux = <MT8173_PIN_85_AUD_DAT_MOSI__FUNC_GPIO85>;
866 pinmux = <MT8173_PIN_0_EINT0__FUNC_GPIO0>;
871 pinmux = <MT8173_PIN_102_MSDC2_DAT2__FUNC_SPI_CK_1_>,
872 <MT8173_PIN_103_MSDC2_DAT3__FUNC_SPI_MI_1_>,
873 <MT8173_PIN_104_MSDC2_CLK__FUNC_SPI_MO_1_>,
874 <MT8173_PIN_105_MSDC2_CMD__FUNC_SPI_CS_1_>;
879 trackpad_irq: trackpad_irq {
881 pinmux = <MT8173_PIN_117_URXD3__FUNC_GPIO117>;
889 pinmux = <MT8173_PIN_101_MSDC2_DAT1__FUNC_GPIO101>;
895 wifi_wake_pins: wifi_wake_pins {
897 pinmux = <MT8173_PIN_38_CONN_RST__FUNC_GPIO38>;
909 compatible = "mediatek,mt6397";
910 #address-cells = <1>;
912 interrupt-parent = <&pio>;
913 interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
914 interrupt-controller;
915 #interrupt-cells = <2>;
918 compatible = "mediatek,mt6397-clk";
923 compatible = "mediatek,mt6397-pinctrl";
929 regulator: mt6397regulator {
930 compatible = "mediatek,mt6397-regulator";
932 mt6397_vpca15_reg: buck_vpca15 {
933 regulator-compatible = "buck_vpca15";
934 regulator-name = "vpca15";
935 regulator-min-microvolt = < 700000>;
936 regulator-max-microvolt = <1350000>;
937 regulator-ramp-delay = <12500>;
939 regulator-allowed-modes = <0 1>;
942 mt6397_vpca7_reg: buck_vpca7 {
943 regulator-compatible = "buck_vpca7";
944 regulator-name = "vpca7";
945 regulator-min-microvolt = < 700000>;
946 regulator-max-microvolt = <1350000>;
947 regulator-ramp-delay = <12500>;
948 regulator-enable-ramp-delay = <115>;
952 mt6397_vsramca15_reg: buck_vsramca15 {
953 regulator-compatible = "buck_vsramca15";
954 regulator-name = "vsramca15";
955 regulator-min-microvolt = < 700000>;
956 regulator-max-microvolt = <1350000>;
957 regulator-ramp-delay = <12500>;
961 mt6397_vsramca7_reg: buck_vsramca7 {
962 regulator-compatible = "buck_vsramca7";
963 regulator-name = "vsramca7";
964 regulator-min-microvolt = < 700000>;
965 regulator-max-microvolt = <1350000>;
966 regulator-ramp-delay = <12500>;
970 mt6397_vcore_reg: buck_vcore {
971 regulator-compatible = "buck_vcore";
972 regulator-name = "vcore";
973 regulator-min-microvolt = < 700000>;
974 regulator-max-microvolt = <1350000>;
975 regulator-ramp-delay = <12500>;
979 mt6397_vgpu_reg: buck_vgpu {
980 regulator-compatible = "buck_vgpu";
981 regulator-name = "vgpu";
982 regulator-min-microvolt = < 700000>;
983 regulator-max-microvolt = <1350000>;
984 regulator-ramp-delay = <12500>;
985 regulator-enable-ramp-delay = <115>;
988 mt6397_vdrm_reg: buck_vdrm {
989 regulator-compatible = "buck_vdrm";
990 regulator-name = "vdrm";
991 regulator-min-microvolt = <1200000>;
992 regulator-max-microvolt = <1400000>;
993 regulator-ramp-delay = <12500>;
997 mt6397_vio18_reg: buck_vio18 {
998 regulator-compatible = "buck_vio18";
999 regulator-name = "vio18";
1000 regulator-min-microvolt = <1620000>;
1001 regulator-max-microvolt = <1980000>;
1002 regulator-ramp-delay = <12500>;
1003 regulator-always-on;
1006 mt6397_vtcxo_reg: ldo_vtcxo {
1007 regulator-compatible = "ldo_vtcxo";
1008 regulator-name = "vtcxo";
1009 regulator-always-on;
1012 mt6397_va28_reg: ldo_va28 {
1013 regulator-compatible = "ldo_va28";
1014 regulator-name = "va28";
1017 mt6397_vcama_reg: ldo_vcama {
1018 regulator-compatible = "ldo_vcama";
1019 regulator-name = "vcama";
1020 regulator-min-microvolt = <1800000>;
1021 regulator-max-microvolt = <1800000>;
1022 regulator-enable-ramp-delay = <218>;
1025 mt6397_vio28_reg: ldo_vio28 {
1026 regulator-compatible = "ldo_vio28";
1027 regulator-name = "vio28";
1028 regulator-always-on;
1031 mt6397_vusb_reg: ldo_vusb {
1032 regulator-compatible = "ldo_vusb";
1033 regulator-name = "vusb";
1036 mt6397_vmc_reg: ldo_vmc {
1037 regulator-compatible = "ldo_vmc";
1038 regulator-name = "vmc";
1039 regulator-min-microvolt = <1800000>;
1040 regulator-max-microvolt = <3300000>;
1041 regulator-enable-ramp-delay = <218>;
1044 mt6397_vmch_reg: ldo_vmch {
1045 regulator-compatible = "ldo_vmch";
1046 regulator-name = "vmch";
1047 regulator-min-microvolt = <3000000>;
1048 regulator-max-microvolt = <3300000>;
1049 regulator-enable-ramp-delay = <218>;
1052 mt6397_vemc_3v3_reg: ldo_vemc3v3 {
1053 regulator-compatible = "ldo_vemc3v3";
1054 regulator-name = "vemc_3v3";
1055 regulator-min-microvolt = <3000000>;
1056 regulator-max-microvolt = <3300000>;
1057 regulator-enable-ramp-delay = <218>;
1060 mt6397_vgp1_reg: ldo_vgp1 {
1061 regulator-compatible = "ldo_vgp1";
1062 regulator-name = "vcamd";
1063 regulator-min-microvolt = <1800000>;
1064 regulator-max-microvolt = <1800000>;
1065 regulator-enable-ramp-delay = <240>;
1068 mt6397_vgp2_reg: ldo_vgp2 {
1069 regulator-compatible = "ldo_vgp2";
1070 regulator-name = "vcamio";
1071 regulator-min-microvolt = <3300000>;
1072 regulator-max-microvolt = <3300000>;
1073 regulator-enable-ramp-delay = <218>;
1076 mt6397_vgp3_reg: ldo_vgp3 {
1077 regulator-compatible = "ldo_vgp3";
1078 regulator-name = "vcamaf";
1079 regulator-min-microvolt = <1800000>;
1080 regulator-max-microvolt = <1800000>;
1081 regulator-enable-ramp-delay = <218>;
1084 mt6397_vgp4_reg: ldo_vgp4 {
1085 regulator-compatible = "ldo_vgp4";
1086 regulator-name = "vgp4";
1087 regulator-min-microvolt = <1200000>;
1088 regulator-max-microvolt = <3300000>;
1089 regulator-enable-ramp-delay = <218>;
1092 mt6397_vgp5_reg: ldo_vgp5 {
1093 regulator-compatible = "ldo_vgp5";
1094 regulator-name = "vgp5";
1095 regulator-min-microvolt = <1200000>;
1096 regulator-max-microvolt = <3000000>;
1097 regulator-enable-ramp-delay = <218>;
1100 mt6397_vgp6_reg: ldo_vgp6 {
1101 regulator-compatible = "ldo_vgp6";
1102 regulator-name = "vgp6";
1103 regulator-min-microvolt = <3300000>;
1104 regulator-max-microvolt = <3300000>;
1105 regulator-enable-ramp-delay = <218>;
1106 regulator-always-on;
1109 mt6397_vibr_reg: ldo_vibr {
1110 regulator-compatible = "ldo_vibr";
1111 regulator-name = "vibr";
1112 regulator-min-microvolt = <1300000>;
1113 regulator-max-microvolt = <3300000>;
1114 regulator-enable-ramp-delay = <218>;
1119 compatible = "mediatek,mt6397-rtc";
1122 syscfg_pctl_pmic: syscfg_pctl_pmic@c000 {
1123 compatible = "mediatek,mt6397-pctl-pmic-syscfg",
1125 reg = <0 0x0000c000 0 0x0108>;
1131 pinctrl-names = "default";
1132 pinctrl-0 = <&spi_pins_a>;
1133 mediatek,pad-select = <1>;
1137 compatible = "google,cros-ec-spi";
1139 spi-max-frequency = <12000000>;
1140 interrupt-parent = <&pio>;
1141 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
1142 google,cros-ec-spi-msg-delay = <500>;
1144 i2c_tunnel: i2c-tunnel0 {
1145 compatible = "google,cros-ec-i2c-tunnel";
1146 google,remote-bus = <0>;
1147 #address-cells = <1>;
1150 battery: sbs-battery@b {
1151 compatible = "sbs,sbs-battery";
1153 sbs,i2c-retry-count = <2>;
1154 sbs,poll-retry-count = <1>;
1163 vusb33-supply = <&mt6397_vusb_reg>;
1168 bank0-supply = <&mt6397_vpca15_reg>;
1169 bank1-supply = <&da9211_vcpu_reg>;
1177 pinctrl-names = "default";
1178 pinctrl-0 = <&usb_pins>;
1179 vusb33-supply = <&mt6397_vusb_reg>;
1183 #include <arm/cros-ec-keyboard.dtsi>