1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2016 MediaTek Inc.
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/regulator/dlg,da9211-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include "mt8173.dtsi"
14 device_type = "memory";
15 reg = <0 0x40000000 0 0x80000000>;
18 backlight: backlight {
19 compatible = "pwm-backlight";
20 pwms = <&pwm0 0 1000000>;
21 power-supply = <&bl_fixed_reg>;
22 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&disp_pwm0_pins>;
29 bl_fixed_reg: fixedregulator2 {
30 compatible = "regulator-fixed";
31 regulator-name = "bl_fixed";
32 regulator-min-microvolt = <1800000>;
33 regulator-max-microvolt = <1800000>;
34 startup-delay-us = <1000>;
36 gpio = <&pio 32 GPIO_ACTIVE_HIGH>;
37 pinctrl-names = "default";
38 pinctrl-0 = <&bl_fixed_pins>;
42 stdout-path = "serial0:115200n8";
45 gpio_keys: gpio-keys {
46 compatible = "gpio-keys";
47 pinctrl-names = "default";
48 pinctrl-0 = <&gpio_keys_pins>;
52 gpios = <&pio 69 GPIO_ACTIVE_LOW>;
53 linux,code = <SW_LID>;
54 linux,input-type = <EV_SW>;
60 gpios = <&pio 14 GPIO_ACTIVE_HIGH>;
61 linux,code = <KEY_POWER>;
62 debounce-interval = <30>;
67 label = "Tablet_mode";
68 gpios = <&pio 121 GPIO_ACTIVE_HIGH>;
69 linux,code = <SW_TABLET_MODE>;
70 linux,input-type = <EV_SW>;
75 label = "Volume_down";
76 gpios = <&pio 123 GPIO_ACTIVE_LOW>;
77 linux,code = <KEY_VOLUMEDOWN>;
82 gpios = <&pio 124 GPIO_ACTIVE_LOW>;
83 linux,code = <KEY_VOLUMEUP>;
88 compatible = "lg,lp120up1";
89 power-supply = <&panel_fixed_3v3>;
90 backlight = <&backlight>;
94 remote-endpoint = <&ps8640_out>;
99 panel_fixed_3v3: regulator1 {
100 compatible = "regulator-fixed";
101 regulator-name = "PANEL_3V3";
102 regulator-min-microvolt = <3300000>;
103 regulator-max-microvolt = <3300000>;
105 gpio = <&pio 41 GPIO_ACTIVE_HIGH>;
106 pinctrl-names = "default";
107 pinctrl-0 = <&panel_fixed_pins>;
110 ps8640_fixed_1v2: regulator2 {
111 compatible = "regulator-fixed";
112 regulator-name = "PS8640_1V2";
113 regulator-min-microvolt = <1200000>;
114 regulator-max-microvolt = <1200000>;
115 regulator-enable-ramp-delay = <2000>;
118 gpio = <&pio 30 GPIO_ACTIVE_HIGH>;
119 pinctrl-names = "default";
120 pinctrl-0 = <&ps8640_fixed_pins>;
123 sdio_fixed_3v3: fixedregulator0 {
124 compatible = "regulator-fixed";
125 regulator-name = "3V3";
126 regulator-min-microvolt = <3300000>;
127 regulator-max-microvolt = <3300000>;
128 gpio = <&pio 85 GPIO_ACTIVE_HIGH>;
129 pinctrl-names = "default";
130 pinctrl-0 = <&sdio_fixed_3v3_pins>;
134 compatible = "mediatek,mt8173-rt5650";
135 mediatek,audio-codec = <&rt5650 &hdmi0>;
136 mediatek,platform = <&afe>;
137 pinctrl-names = "default";
138 pinctrl-0 = <&aud_i2s2>;
142 sound-dai = <&rt5650 1>;
147 compatible = "hdmi-connector";
150 ddc-i2c-bus = <&hdmiddc0>;
153 hdmi_connector_in: endpoint {
154 remote-endpoint = <&hdmi0_out>;
165 proc-supply = <&mt6397_vpca15_reg>;
169 proc-supply = <&mt6397_vpca15_reg>;
173 proc-supply = <&da9211_vcpu_reg>;
174 sram-supply = <&mt6397_vsramca7_reg>;
178 proc-supply = <&da9211_vcpu_reg>;
179 sram-supply = <&mt6397_vsramca7_reg>;
183 sustainable-power = <4500>; /* milliwatts */
185 threshold: trip-point0 {
186 temperature = <60000>;
189 target: trip-point1 {
190 temperature = <65000>;
200 remote-endpoint = <&ps8640_in>;
216 hdmi0_out: endpoint {
217 remote-endpoint = <&hdmi_connector_in>;
225 mediatek,ibias = <0xc>;
231 rt5650: audio-codec@1a {
232 compatible = "realtek,rt5650";
234 avdd-supply = <&mt6397_vgp1_reg>;
235 cpvdd-supply = <&mt6397_vcama_reg>;
236 interrupt-parent = <&pio>;
237 interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
238 pinctrl-names = "default";
239 pinctrl-0 = <&rt5650_irq>;
240 #sound-dai-cells = <1>;
241 realtek,dmic1-data-pin = <2>;
242 realtek,jd-mode = <2>;
245 ps8640: edp-bridge@8 {
246 compatible = "parade,ps8640";
248 powerdown-gpios = <&pio 127 GPIO_ACTIVE_LOW>;
249 reset-gpios = <&pio 115 GPIO_ACTIVE_LOW>;
250 pinctrl-names = "default";
251 pinctrl-0 = <&ps8640_pins>;
252 vdd12-supply = <&ps8640_fixed_1v2>;
253 vdd33-supply = <&mt6397_vgp2_reg>;
256 #address-cells = <1>;
262 ps8640_in: endpoint {
263 remote-endpoint = <&dsi0_out>;
270 ps8640_out: endpoint {
271 remote-endpoint = <&panel_in>;
279 clock-frequency = <1500000>;
283 compatible = "dlg,da9211";
285 interrupt-parent = <&pio>;
286 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
289 da9211_vcpu_reg: BUCKA {
290 regulator-name = "VBUCKA";
291 regulator-min-microvolt = < 700000>;
292 regulator-max-microvolt = <1310000>;
293 regulator-min-microamp = <2000000>;
294 regulator-max-microamp = <4400000>;
295 regulator-ramp-delay = <10000>;
297 regulator-allowed-modes = <DA9211_BUCK_MODE_SYNC
298 DA9211_BUCK_MODE_AUTO>;
301 da9211_vgpu_reg: BUCKB {
302 regulator-name = "VBUCKB";
303 regulator-min-microvolt = < 700000>;
304 regulator-max-microvolt = <1310000>;
305 regulator-min-microamp = <2000000>;
306 regulator-max-microamp = <3000000>;
307 regulator-ramp-delay = <10000>;
317 compatible = "infineon,slb9645tt";
319 powered-while-suspended;
324 clock-frequency = <400000>;
327 touchscreen: touchscreen@10 {
328 compatible = "elan,ekth3500";
330 interrupt-parent = <&pio>;
331 interrupts = <88 IRQ_TYPE_LEVEL_LOW>;
336 clock-frequency = <400000>;
338 pinctrl-names = "default";
339 pinctrl-0 = <&trackpad_irq>;
341 trackpad: trackpad@15 {
342 compatible = "elan,ekth3000";
343 interrupt-parent = <&pio>;
344 interrupts = <117 IRQ_TYPE_LEVEL_LOW>;
346 vcc-supply = <&mt6397_vgp6_reg>;
357 pinctrl-names = "default", "state_uhs";
358 pinctrl-0 = <&mmc0_pins_default>;
359 pinctrl-1 = <&mmc0_pins_uhs>;
361 max-frequency = <200000000>;
366 hs400-ds-delay = <0x14015>;
367 mediatek,hs200-cmd-int-delay=<30>;
368 mediatek,hs400-cmd-int-delay=<14>;
369 mediatek,hs400-cmd-resp-sel-rising;
370 vmmc-supply = <&mt6397_vemc_3v3_reg>;
371 vqmmc-supply = <&mt6397_vio18_reg>;
372 assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
373 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
379 pinctrl-names = "default", "state_uhs";
380 pinctrl-0 = <&mmc1_pins_default>;
381 pinctrl-1 = <&mmc1_pins_uhs>;
383 max-frequency = <200000000>;
387 cd-gpios = <&pio 1 GPIO_ACTIVE_LOW>;
388 vmmc-supply = <&mt6397_vmch_reg>;
389 vqmmc-supply = <&mt6397_vmc_reg>;
394 pinctrl-names = "default", "state_uhs";
395 pinctrl-0 = <&mmc3_pins_default>;
396 pinctrl-1 = <&mmc3_pins_uhs>;
398 max-frequency = <200000000>;
402 keep-power-in-suspend;
405 vmmc-supply = <&sdio_fixed_3v3>;
406 vqmmc-supply = <&mt6397_vgp3_reg>;
410 #address-cells = <1>;
414 compatible = "marvell,sd8897-bt";
416 interrupt-parent = <&pio>;
417 interrupts = <119 IRQ_TYPE_LEVEL_LOW>;
418 marvell,wakeup-pin = /bits/ 16 <0x0d>;
419 marvell,wakeup-gap-ms = /bits/ 16 <0x64>;
423 compatible = "marvell,sd8897";
425 interrupt-parent = <&pio>;
426 interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
427 marvell,wakeup-pin = <3>;
433 pinctrl-names = "default";
434 pinctrl-0 = <&nor_gpio1_pins>;
437 compatible = "jedec,spi-nor";
439 spi-max-frequency = <50000000>;
444 gpio-line-names = "EC_INT_1V8",
449 * AP_FLASH_WP_L is crossystem ABI. Schematics
458 "WRAP_EVENT_S_EINT10",
480 "PANEL_LCD_POWER_EN",
491 "SOC_I2C2_1V8_SDA_400K",
492 "SOC_I2C2_1V8_SCL_400K",
493 "SOC_I2C0_1V8_SDA_400K",
494 "SOC_I2C0_1V8_SCL_400K",
541 "TOUCHSCREEN_RESET_R",
542 "PLATFORM_PROCHOT_L",
554 "SOC_I2C3_1V8_SDA_400K",
555 "SOC_I2C3_1V8_SCL_400K",
563 "PS8640_SYSRSTN_1V8",
564 "APIN_MAX98090_DOUT2",
573 "SOC_I2C1_1V8_SDA_1M",
574 "SOC_I2C1_1V8_SCL_1M",
579 "APOUT_MAX98090_DIN",
580 "APIN_MAX98090_DOUT",
581 "SOC_I2C4_1V8_SDA_400K",
582 "SOC_I2C4_1V8_SCL_400K";
586 pinmux = <MT8173_PIN_128_I2S0_LRCK__FUNC_I2S1_WS>,
587 <MT8173_PIN_129_I2S0_BCK__FUNC_I2S1_BCK>,
588 <MT8173_PIN_130_I2S0_MCK__FUNC_I2S1_MCK>,
589 <MT8173_PIN_131_I2S0_DATA0__FUNC_I2S1_DO_1>,
590 <MT8173_PIN_12_EINT12__FUNC_I2S2_WS>,
591 <MT8173_PIN_13_EINT13__FUNC_I2S2_BCK>,
592 <MT8173_PIN_132_I2S0_DATA1__FUNC_I2S2_DI_2>;
597 bl_fixed_pins: bl_fixed_pins {
599 pinmux = <MT8173_PIN_32_UTXD2__FUNC_GPIO32>;
604 bt_wake_pins: bt_wake_pins {
606 pinmux = <MT8173_PIN_119_KPROW0__FUNC_GPIO119>;
611 disp_pwm0_pins: disp_pwm0_pins {
613 pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
618 gpio_keys_pins: gpio_keys_pins {
620 pinmux = <MT8173_PIN_123_KPCOL1__FUNC_GPIO123>,
621 <MT8173_PIN_124_KPCOL2__FUNC_GPIO124>;
626 pinmux = <MT8173_PIN_121_KPROW2__FUNC_GPIO121>;
631 hdmi_mux_pins: hdmi_mux_pins {
633 pinmux = <MT8173_PIN_36_DAISYNC__FUNC_GPIO36>;
639 pinmux = <MT8173_PIN_15_EINT15__FUNC_GPIO15>;
644 mmc0_pins_default: mmc0default {
646 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
647 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
648 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
649 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
650 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
651 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
652 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
653 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
654 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
659 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
664 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
669 mmc1_pins_default: mmc1default {
671 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
672 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
673 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
674 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
675 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
677 drive-strength = <MTK_DRIVE_4mA>;
678 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
682 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
684 drive-strength = <MTK_DRIVE_4mA>;
688 pinmux = <MT8173_PIN_1_EINT1__FUNC_GPIO1>;
693 mmc3_pins_default: mmc3default {
695 pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
696 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
697 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
698 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
700 drive-strength = <MTK_DRIVE_8mA>;
701 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
705 pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
707 drive-strength = <MTK_DRIVE_8mA>;
708 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
712 pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
714 drive-strength = <MTK_DRIVE_8mA>;
718 mmc0_pins_uhs: mmc0 {
720 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
721 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
722 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
723 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
724 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
725 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
726 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
727 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
728 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
730 drive-strength = <MTK_DRIVE_6mA>;
731 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
735 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
736 drive-strength = <MTK_DRIVE_6mA>;
737 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
741 pinmux = <MT8173_PIN_67_MSDC0_DSL__FUNC_MSDC0_DSL>;
742 drive-strength = <MTK_DRIVE_10mA>;
743 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
747 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
752 mmc1_pins_uhs: mmc1 {
754 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
755 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
756 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
757 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
758 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
760 drive-strength = <MTK_DRIVE_6mA>;
761 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
765 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
766 drive-strength = <MTK_DRIVE_8mA>;
767 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
771 mmc3_pins_uhs: mmc3 {
773 pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
774 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
775 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
776 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
778 drive-strength = <MTK_DRIVE_8mA>;
779 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
783 pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
785 drive-strength = <MTK_DRIVE_8mA>;
786 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
790 pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
791 drive-strength = <MTK_DRIVE_8mA>;
792 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
796 nor_gpio1_pins: nor {
798 pinmux = <MT8173_PIN_6_EINT6__FUNC_SFCS0>,
799 <MT8173_PIN_7_EINT7__FUNC_SFHOLD>,
800 <MT8173_PIN_8_EINT8__FUNC_SFIN>;
802 drive-strength = <MTK_DRIVE_4mA>;
807 pinmux = <MT8173_PIN_5_EINT5__FUNC_SFOUT>;
808 drive-strength = <MTK_DRIVE_4mA>;
813 pinmux = <MT8173_PIN_9_EINT9__FUNC_SFCK>;
815 drive-strength = <MTK_DRIVE_4mA>;
820 panel_fixed_pins: panel_fixed_pins {
822 pinmux = <MT8173_PIN_41_CMMCLK__FUNC_GPIO41>;
826 ps8640_pins: ps8640_pins {
828 pinmux = <MT8173_PIN_92_PCM_CLK__FUNC_GPIO92>,
829 <MT8173_PIN_115_URTS0__FUNC_GPIO115>,
830 <MT8173_PIN_127_LCM_RST__FUNC_GPIO127>;
834 ps8640_fixed_pins: ps8640_fixed_pins {
836 pinmux = <MT8173_PIN_30_URTS2__FUNC_GPIO30>;
840 rt5650_irq: rt5650_irq {
842 pinmux = <MT8173_PIN_3_EINT3__FUNC_GPIO3>;
847 sdio_fixed_3v3_pins: sdio_fixed_3v3_pins {
849 pinmux = <MT8173_PIN_85_AUD_DAT_MOSI__FUNC_GPIO85>;
856 pinmux = <MT8173_PIN_0_EINT0__FUNC_GPIO0>;
861 pinmux = <MT8173_PIN_102_MSDC2_DAT2__FUNC_SPI_CK_1_>,
862 <MT8173_PIN_103_MSDC2_DAT3__FUNC_SPI_MI_1_>,
863 <MT8173_PIN_104_MSDC2_CLK__FUNC_SPI_MO_1_>,
864 <MT8173_PIN_105_MSDC2_CMD__FUNC_SPI_CS_1_>;
869 trackpad_irq: trackpad_irq {
871 pinmux = <MT8173_PIN_117_URXD3__FUNC_GPIO117>;
879 pinmux = <MT8173_PIN_101_MSDC2_DAT1__FUNC_GPIO101>;
885 wifi_wake_pins: wifi_wake_pins {
887 pinmux = <MT8173_PIN_38_CONN_RST__FUNC_GPIO38>;
899 compatible = "mediatek,mt6397";
900 #address-cells = <1>;
902 interrupt-parent = <&pio>;
903 interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
904 interrupt-controller;
905 #interrupt-cells = <2>;
908 compatible = "mediatek,mt6397-clk";
913 compatible = "mediatek,mt6397-pinctrl";
919 regulator: mt6397regulator {
920 compatible = "mediatek,mt6397-regulator";
922 mt6397_vpca15_reg: buck_vpca15 {
923 regulator-compatible = "buck_vpca15";
924 regulator-name = "vpca15";
925 regulator-min-microvolt = < 700000>;
926 regulator-max-microvolt = <1350000>;
927 regulator-ramp-delay = <12500>;
929 regulator-allowed-modes = <0 1>;
932 mt6397_vpca7_reg: buck_vpca7 {
933 regulator-compatible = "buck_vpca7";
934 regulator-name = "vpca7";
935 regulator-min-microvolt = < 700000>;
936 regulator-max-microvolt = <1350000>;
937 regulator-ramp-delay = <12500>;
938 regulator-enable-ramp-delay = <115>;
942 mt6397_vsramca15_reg: buck_vsramca15 {
943 regulator-compatible = "buck_vsramca15";
944 regulator-name = "vsramca15";
945 regulator-min-microvolt = < 700000>;
946 regulator-max-microvolt = <1350000>;
947 regulator-ramp-delay = <12500>;
951 mt6397_vsramca7_reg: buck_vsramca7 {
952 regulator-compatible = "buck_vsramca7";
953 regulator-name = "vsramca7";
954 regulator-min-microvolt = < 700000>;
955 regulator-max-microvolt = <1350000>;
956 regulator-ramp-delay = <12500>;
960 mt6397_vcore_reg: buck_vcore {
961 regulator-compatible = "buck_vcore";
962 regulator-name = "vcore";
963 regulator-min-microvolt = < 700000>;
964 regulator-max-microvolt = <1350000>;
965 regulator-ramp-delay = <12500>;
969 mt6397_vgpu_reg: buck_vgpu {
970 regulator-compatible = "buck_vgpu";
971 regulator-name = "vgpu";
972 regulator-min-microvolt = < 700000>;
973 regulator-max-microvolt = <1350000>;
974 regulator-ramp-delay = <12500>;
975 regulator-enable-ramp-delay = <115>;
978 mt6397_vdrm_reg: buck_vdrm {
979 regulator-compatible = "buck_vdrm";
980 regulator-name = "vdrm";
981 regulator-min-microvolt = <1200000>;
982 regulator-max-microvolt = <1400000>;
983 regulator-ramp-delay = <12500>;
987 mt6397_vio18_reg: buck_vio18 {
988 regulator-compatible = "buck_vio18";
989 regulator-name = "vio18";
990 regulator-min-microvolt = <1620000>;
991 regulator-max-microvolt = <1980000>;
992 regulator-ramp-delay = <12500>;
996 mt6397_vtcxo_reg: ldo_vtcxo {
997 regulator-compatible = "ldo_vtcxo";
998 regulator-name = "vtcxo";
1002 mt6397_va28_reg: ldo_va28 {
1003 regulator-compatible = "ldo_va28";
1004 regulator-name = "va28";
1007 mt6397_vcama_reg: ldo_vcama {
1008 regulator-compatible = "ldo_vcama";
1009 regulator-name = "vcama";
1010 regulator-min-microvolt = <1800000>;
1011 regulator-max-microvolt = <1800000>;
1012 regulator-enable-ramp-delay = <218>;
1015 mt6397_vio28_reg: ldo_vio28 {
1016 regulator-compatible = "ldo_vio28";
1017 regulator-name = "vio28";
1018 regulator-always-on;
1021 mt6397_vusb_reg: ldo_vusb {
1022 regulator-compatible = "ldo_vusb";
1023 regulator-name = "vusb";
1026 mt6397_vmc_reg: ldo_vmc {
1027 regulator-compatible = "ldo_vmc";
1028 regulator-name = "vmc";
1029 regulator-min-microvolt = <1800000>;
1030 regulator-max-microvolt = <3300000>;
1031 regulator-enable-ramp-delay = <218>;
1034 mt6397_vmch_reg: ldo_vmch {
1035 regulator-compatible = "ldo_vmch";
1036 regulator-name = "vmch";
1037 regulator-min-microvolt = <3000000>;
1038 regulator-max-microvolt = <3300000>;
1039 regulator-enable-ramp-delay = <218>;
1042 mt6397_vemc_3v3_reg: ldo_vemc3v3 {
1043 regulator-compatible = "ldo_vemc3v3";
1044 regulator-name = "vemc_3v3";
1045 regulator-min-microvolt = <3000000>;
1046 regulator-max-microvolt = <3300000>;
1047 regulator-enable-ramp-delay = <218>;
1050 mt6397_vgp1_reg: ldo_vgp1 {
1051 regulator-compatible = "ldo_vgp1";
1052 regulator-name = "vcamd";
1053 regulator-min-microvolt = <1800000>;
1054 regulator-max-microvolt = <1800000>;
1055 regulator-enable-ramp-delay = <240>;
1058 mt6397_vgp2_reg: ldo_vgp2 {
1059 regulator-compatible = "ldo_vgp2";
1060 regulator-name = "vcamio";
1061 regulator-min-microvolt = <3300000>;
1062 regulator-max-microvolt = <3300000>;
1063 regulator-enable-ramp-delay = <218>;
1066 mt6397_vgp3_reg: ldo_vgp3 {
1067 regulator-compatible = "ldo_vgp3";
1068 regulator-name = "vcamaf";
1069 regulator-min-microvolt = <1800000>;
1070 regulator-max-microvolt = <1800000>;
1071 regulator-enable-ramp-delay = <218>;
1074 mt6397_vgp4_reg: ldo_vgp4 {
1075 regulator-compatible = "ldo_vgp4";
1076 regulator-name = "vgp4";
1077 regulator-min-microvolt = <1200000>;
1078 regulator-max-microvolt = <3300000>;
1079 regulator-enable-ramp-delay = <218>;
1082 mt6397_vgp5_reg: ldo_vgp5 {
1083 regulator-compatible = "ldo_vgp5";
1084 regulator-name = "vgp5";
1085 regulator-min-microvolt = <1200000>;
1086 regulator-max-microvolt = <3000000>;
1087 regulator-enable-ramp-delay = <218>;
1090 mt6397_vgp6_reg: ldo_vgp6 {
1091 regulator-compatible = "ldo_vgp6";
1092 regulator-name = "vgp6";
1093 regulator-min-microvolt = <3300000>;
1094 regulator-max-microvolt = <3300000>;
1095 regulator-enable-ramp-delay = <218>;
1096 regulator-always-on;
1099 mt6397_vibr_reg: ldo_vibr {
1100 regulator-compatible = "ldo_vibr";
1101 regulator-name = "vibr";
1102 regulator-min-microvolt = <1300000>;
1103 regulator-max-microvolt = <3300000>;
1104 regulator-enable-ramp-delay = <218>;
1109 compatible = "mediatek,mt6397-rtc";
1112 syscfg_pctl_pmic: syscfg_pctl_pmic@c000 {
1113 compatible = "mediatek,mt6397-pctl-pmic-syscfg",
1115 reg = <0 0x0000c000 0 0x0108>;
1121 pinctrl-names = "default";
1122 pinctrl-0 = <&spi_pins_a>;
1123 mediatek,pad-select = <1>;
1127 compatible = "google,cros-ec-spi";
1129 spi-max-frequency = <12000000>;
1130 interrupt-parent = <&pio>;
1131 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
1132 google,cros-ec-spi-msg-delay = <500>;
1134 i2c_tunnel: i2c-tunnel0 {
1135 compatible = "google,cros-ec-i2c-tunnel";
1136 google,remote-bus = <0>;
1137 #address-cells = <1>;
1140 battery: sbs-battery@b {
1141 compatible = "sbs,sbs-battery";
1143 sbs,i2c-retry-count = <2>;
1144 sbs,poll-retry-count = <1>;
1153 vusb33-supply = <&mt6397_vusb_reg>;
1158 bank0-supply = <&mt6397_vpca15_reg>;
1159 bank1-supply = <&da9211_vcpu_reg>;
1167 pinctrl-names = "default";
1168 pinctrl-0 = <&usb_pins>;
1169 vusb33-supply = <&mt6397_vusb_reg>;
1173 #include <arm/cros-ec-keyboard.dtsi>