1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada 37xx family of SoCs.
5 * Copyright (C) 2016 Marvell
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 model = "Marvell Armada 37xx SoC";
15 compatible = "marvell,armada3700";
16 interrupt-parent = <&gic>;
31 * The PSCI firmware region depicted below is the default one
32 * and should be updated by the bootloader.
35 reg = <0 0x4000000 0 0x200000>;
45 compatible = "arm,cortex-a53";
47 clocks = <&nb_periph_clk 16>;
48 enable-method = "psci";
53 compatible = "arm,psci-0.2";
58 compatible = "arm,armv8-timer";
59 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
60 <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
61 <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
62 <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
66 compatible = "arm,armv8-pmuv3";
67 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
71 compatible = "simple-bus";
76 internal-regs@d0000000 {
79 compatible = "simple-bus";
80 /* 32M internal register @ 0xd000_0000 */
81 ranges = <0x0 0x0 0xd0000000 0x2000000>;
84 compatible = "marvell,armada-3700-wdt";
86 marvell,system-controller = <&cpu_misc>;
90 cpu_misc: system-controller@d000 {
91 compatible = "marvell,armada-3700-cpu-misc",
93 reg = <0xd000 0x1000>;
97 compatible = "marvell,armada-3700-spi";
100 reg = <0x10600 0xA00>;
101 clocks = <&nb_periph_clk 7>;
102 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
108 compatible = "marvell,armada-3700-i2c";
109 reg = <0x11000 0x24>;
110 #address-cells = <1>;
112 clocks = <&nb_periph_clk 10>;
113 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
119 compatible = "marvell,armada-3700-i2c";
120 reg = <0x11080 0x24>;
121 #address-cells = <1>;
123 clocks = <&nb_periph_clk 9>;
124 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
130 compatible = "marvell,armada-3700-avs",
132 reg = <0x11500 0x40>;
135 uart0: serial@12000 {
136 compatible = "marvell,armada-3700-uart";
137 reg = <0x12000 0x18>;
140 <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
141 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
142 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
143 interrupt-names = "uart-sum", "uart-tx", "uart-rx";
147 uart1: serial@12200 {
148 compatible = "marvell,armada-3700-uart-ext";
149 reg = <0x12200 0x30>;
152 <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
153 <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
154 interrupt-names = "uart-tx", "uart-rx";
158 nb_periph_clk: nb-periph-clk@13000 {
159 compatible = "marvell,armada-3700-periph-clock-nb",
161 reg = <0x13000 0x100>;
162 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
163 <&tbg 3>, <&xtalclk>;
167 sb_periph_clk: sb-periph-clk@18000 {
168 compatible = "marvell,armada-3700-periph-clock-sb";
169 reg = <0x18000 0x100>;
170 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
171 <&tbg 3>, <&xtalclk>;
176 compatible = "marvell,armada-3700-tbg-clock";
177 reg = <0x13200 0x100>;
182 pinctrl_nb: pinctrl@13800 {
183 compatible = "marvell,armada3710-nb-pinctrl",
184 "syscon", "simple-mfd";
185 reg = <0x13800 0x100>, <0x13C00 0x20>;
189 gpio-ranges = <&pinctrl_nb 0 0 36>;
191 interrupt-controller;
192 #interrupt-cells = <2>;
194 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
195 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
196 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
197 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
198 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
199 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
200 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
201 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
202 <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
203 <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
204 <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
205 <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
209 compatible = "marvell,armada-3700-xtal-clock";
210 clock-output-names = "xtal";
214 spi_quad_pins: spi-quad-pins {
219 spi_cs1_pins: spi-cs1-pins {
224 i2c1_pins: i2c1-pins {
229 i2c2_pins: i2c2-pins {
234 uart1_pins: uart1-pins {
239 uart2_pins: uart2-pins {
250 nb_pm: syscon@14000 {
251 compatible = "marvell,armada-3700-nb-pm",
253 reg = <0x14000 0x60>;
257 compatible = "marvell,comphy-a3700";
258 reg = <0x18300 0x300>,
262 reg-names = "comphy",
266 #address-cells = <1>;
285 pinctrl_sb: pinctrl@18800 {
286 compatible = "marvell,armada3710-sb-pinctrl",
287 "syscon", "simple-mfd";
288 reg = <0x18800 0x100>, <0x18C00 0x20>;
292 gpio-ranges = <&pinctrl_sb 0 0 30>;
294 interrupt-controller;
295 #interrupt-cells = <2>;
297 <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
298 <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
299 <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
300 <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
301 <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
304 rgmii_pins: mii-pins {
314 sdio_pins: sdio-pins {
319 pcie_reset_pins: pcie-reset-pins {
320 groups = "pcie1"; /* this actually controls "pcie1_reset" */
324 pcie_clkreq_pins: pcie-clkreq-pins {
325 groups = "pcie1_clkreq";
330 eth0: ethernet@30000 {
331 compatible = "marvell,armada-3700-neta";
332 reg = <0x30000 0x4000>;
333 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
334 clocks = <&sb_periph_clk 8>;
339 #address-cells = <1>;
341 compatible = "marvell,orion-mdio";
345 eth1: ethernet@40000 {
346 compatible = "marvell,armada-3700-neta";
347 reg = <0x40000 0x4000>;
348 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
349 clocks = <&sb_periph_clk 7>;
354 compatible = "marvell,armada3700-xhci",
356 reg = <0x58000 0x4000>;
357 marvell,usb-misc-reg = <&usb32_syscon>;
358 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
359 clocks = <&sb_periph_clk 12>;
360 phys = <&comphy0 0>, <&usb2_utmi_otg_phy>;
361 phy-names = "usb3-phy", "usb2-utmi-otg-phy";
365 usb2_utmi_otg_phy: phy@5d000 {
366 compatible = "marvell,a3700-utmi-otg-phy";
367 reg = <0x5d000 0x800>;
368 marvell,usb-misc-reg = <&usb32_syscon>;
372 usb32_syscon: system-controller@5d800 {
373 compatible = "marvell,armada-3700-usb2-host-device-misc",
375 reg = <0x5d800 0x800>;
379 compatible = "marvell,armada-3700-ehci";
380 reg = <0x5e000 0x1000>;
381 marvell,usb-misc-reg = <&usb2_syscon>;
382 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
383 phys = <&usb2_utmi_host_phy>;
384 phy-names = "usb2-utmi-host-phy";
388 usb2_utmi_host_phy: phy@5f000 {
389 compatible = "marvell,a3700-utmi-host-phy";
390 reg = <0x5f000 0x800>;
391 marvell,usb-misc-reg = <&usb2_syscon>;
395 usb2_syscon: system-controller@5f800 {
396 compatible = "marvell,armada-3700-usb2-host-misc",
398 reg = <0x5f800 0x800>;
402 compatible = "marvell,armada-3700-xor";
403 reg = <0x60900 0x100>,
407 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
410 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
414 crypto: crypto@90000 {
415 compatible = "inside-secure,safexcel-eip97ies";
416 reg = <0x90000 0x20000>;
417 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
418 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
419 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
420 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
421 <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
422 <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
423 interrupt-names = "mem", "ring0", "ring1",
424 "ring2", "ring3", "eip";
425 clocks = <&nb_periph_clk 15>;
428 rwtm: mailbox@b0000 {
429 compatible = "marvell,armada-3700-rwtm-mailbox";
430 reg = <0xb0000 0x100>;
431 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
435 sdhci1: sdhci@d0000 {
436 compatible = "marvell,armada-3700-sdhci",
437 "marvell,sdhci-xenon";
438 reg = <0xd0000 0x300>,
440 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
441 clocks = <&nb_periph_clk 0>;
442 clock-names = "core";
446 sdhci0: sdhci@d8000 {
447 compatible = "marvell,armada-3700-sdhci",
448 "marvell,sdhci-xenon";
449 reg = <0xd8000 0x300>,
451 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
452 clocks = <&nb_periph_clk 0>;
453 clock-names = "core";
458 compatible = "marvell,armada-3700-ahci";
459 reg = <0xe0000 0x178>;
460 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
461 clocks = <&nb_periph_clk 1>;
463 phy-names = "sata-phy";
467 gic: interrupt-controller@1d00000 {
468 compatible = "arm,gic-v3";
469 #interrupt-cells = <3>;
470 interrupt-controller;
471 reg = <0x1d00000 0x10000>, /* GICD */
472 <0x1d40000 0x40000>, /* GICR */
473 <0x1d80000 0x2000>, /* GICC */
474 <0x1d90000 0x2000>, /* GICH */
475 <0x1da0000 0x20000>; /* GICV */
476 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
480 pcie0: pcie@d0070000 {
481 compatible = "marvell,armada-3700-pcie";
484 reg = <0 0xd0070000 0 0x20000>;
485 #address-cells = <3>;
487 bus-range = <0x00 0xff>;
488 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
489 #interrupt-cells = <1>;
490 msi-parent = <&pcie0>;
492 ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x1000000 /* Port 0 MEM */
493 0x81000000 0 0xe9000000 0 0xe9000000 0 0x10000>; /* Port 0 IO*/
494 interrupt-map-mask = <0 0 0 7>;
495 interrupt-map = <0 0 0 1 &pcie_intc 0>,
496 <0 0 0 2 &pcie_intc 1>,
497 <0 0 0 3 &pcie_intc 2>,
498 <0 0 0 4 &pcie_intc 3>;
499 max-link-speed = <2>;
501 pcie_intc: interrupt-controller {
502 interrupt-controller;
503 #interrupt-cells = <1>;
510 compatible = "marvell,armada-3700-rwtm-firmware";