1 // SPDX-License-Identifier: GPL-2.0
3 * dts file for Hisilicon Hi3670 SoC
5 * Copyright (C) 2016, Hisilicon Ltd.
6 * Copyright (C) 2018, Linaro Ltd.
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "hisilicon,hi3670";
13 interrupt-parent = <&gic>;
18 compatible = "arm,psci-0.2";
58 compatible = "arm,cortex-a53", "arm,armv8";
61 enable-method = "psci";
65 compatible = "arm,cortex-a53", "arm,armv8";
68 enable-method = "psci";
72 compatible = "arm,cortex-a53", "arm,armv8";
75 enable-method = "psci";
79 compatible = "arm,cortex-a53", "arm,armv8";
82 enable-method = "psci";
86 compatible = "arm,cortex-a73", "arm,armv8";
89 enable-method = "psci";
93 compatible = "arm,cortex-a73", "arm,armv8";
96 enable-method = "psci";
100 compatible = "arm,cortex-a73", "arm,armv8";
103 enable-method = "psci";
107 compatible = "arm,cortex-a73", "arm,armv8";
110 enable-method = "psci";
114 gic: interrupt-controller@e82b0000 {
115 compatible = "arm,gic-400";
116 reg = <0x0 0xe82b1000 0 0x1000>, /* GICD */
117 <0x0 0xe82b2000 0 0x2000>, /* GICC */
118 <0x0 0xe82b4000 0 0x2000>, /* GICH */
119 <0x0 0xe82b6000 0 0x2000>; /* GICV */
120 #interrupt-cells = <3>;
121 #address-cells = <0>;
122 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) |
123 IRQ_TYPE_LEVEL_HIGH)>;
124 interrupt-controller;
128 compatible = "arm,armv8-timer";
129 interrupt-parent = <&gic>;
130 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) |
131 IRQ_TYPE_LEVEL_LOW)>,
132 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) |
133 IRQ_TYPE_LEVEL_LOW)>,
134 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) |
135 IRQ_TYPE_LEVEL_LOW)>,
136 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) |
137 IRQ_TYPE_LEVEL_LOW)>;
138 clock-frequency = <1920000>;
142 compatible = "simple-bus";
143 #address-cells = <2>;
147 uart6_clk: clk_19_2M {
148 compatible = "fixed-clock";
150 clock-frequency = <19200000>;
153 uart6: serial@fff32000 {
154 compatible = "arm,pl011", "arm,primecell";
155 reg = <0x0 0xfff32000 0x0 0x1000>;
156 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
157 clocks = <&uart6_clk &uart6_clk>;
158 clock-names = "uartclk", "apb_pclk";