arch/arm64/boot/dts/freescale/imx93.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright 2022 NXP
   4  */
   5
   6 #include <dt-bindings/clock/imx93-clock.h>
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/input/input.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/fsl,imx93-power.h>
  11
  12 #include "imx93-pinfunc.h"
  13
  14 / {
  15         interrupt-parent = <&gic>;
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 gpio0 = &gpio1;
  21                 gpio1 = &gpio2;
  22                 gpio2 = &gpio3;
  23                 gpio3 = &gpio4;
  24                 i2c0 = &lpi2c1;
  25                 i2c1 = &lpi2c2;
  26                 i2c2 = &lpi2c3;
  27                 i2c3 = &lpi2c4;
  28                 i2c4 = &lpi2c5;
  29                 i2c5 = &lpi2c6;
  30                 i2c6 = &lpi2c7;
  31                 i2c7 = &lpi2c8;
  32                 mmc0 = &usdhc1;
  33                 mmc1 = &usdhc2;
  34                 mmc2 = &usdhc3;
  35                 serial0 = &lpuart1;
  36                 serial1 = &lpuart2;
  37                 serial2 = &lpuart3;
  38                 serial3 = &lpuart4;
  39                 serial4 = &lpuart5;
  40                 serial5 = &lpuart6;
  41                 serial6 = &lpuart7;
  42                 serial7 = &lpuart8;
  43         };
  44
  45         cpus {
  46                 #address-cells = <1>;
  47                 #size-cells = <0>;
  48
  49                 idle-states {
  50                         entry-method = "psci";
  51
  52                         cpu_pd_wait: cpu-pd-wait {
  53                                 compatible = "arm,idle-state";
  54                                 arm,psci-suspend-param = <0x0010033>;
  55                                 local-timer-stop;
  56                                 entry-latency-us = <10000>;
  57                                 exit-latency-us = <7000>;
  58                                 min-residency-us = <27000>;
  59                                 wakeup-latency-us = <15000>;
  60                         };
  61                 };
  62
  63                 A55_0: cpu@0 {
  64                         device_type = "cpu";
  65                         compatible = "arm,cortex-a55";
  66                         reg = <0x0>;
  67                         enable-method = "psci";
  68                         #cooling-cells = <2>;
  69                         cpu-idle-states = <&cpu_pd_wait>;
  70                 };
  71
  72                 A55_1: cpu@100 {
  73                         device_type = "cpu";
  74                         compatible = "arm,cortex-a55";
  75                         reg = <0x100>;
  76                         enable-method = "psci";
  77                         #cooling-cells = <2>;
  78                         cpu-idle-states = <&cpu_pd_wait>;
  79                 };
  80
  81         };
  82
  83         osc_32k: clock-osc-32k {
  84                 compatible = "fixed-clock";
  85                 #clock-cells = <0>;
  86                 clock-frequency = <32768>;
  87                 clock-output-names = "osc_32k";
  88         };
  89
  90         osc_24m: clock-osc-24m {
  91                 compatible = "fixed-clock";
  92                 #clock-cells = <0>;
  93                 clock-frequency = <24000000>;
  94                 clock-output-names = "osc_24m";
  95         };
  96
  97         clk_ext1: clock-ext1 {
  98                 compatible = "fixed-clock";
  99                 #clock-cells = <0>;
 100                 clock-frequency = <133000000>;
 101                 clock-output-names = "clk_ext1";
 102         };
 103
 104         pmu {
 105                 compatible = "arm,cortex-a55-pmu";
 106                 interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
 107         };
 108
 109         psci {
 110                 compatible = "arm,psci-1.0";
 111                 method = "smc";
 112         };
 113
 114         timer {
 115                 compatible = "arm,armv8-timer";
 116                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 117                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 118                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 119                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
 120                 clock-frequency = <24000000>;
 121                 arm,no-tick-in-suspend;
 122                 interrupt-parent = <&gic>;
 123         };
 124
 125         gic: interrupt-controller@48000000 {
 126                 compatible = "arm,gic-v3";
 127                 reg = <0 0x48000000 0 0x10000>,
 128                       <0 0x48040000 0 0xc0000>;
 129                 #interrupt-cells = <3>;
 130                 interrupt-controller;
 131                 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 132                 interrupt-parent = <&gic>;
 133         };
 134
 135         soc@0 {
 136                 compatible = "simple-bus";
 137                 #address-cells = <1>;
 138                 #size-cells = <1>;
 139                 ranges = <0x0 0x0 0x0 0x80000000>,
 140                          <0x28000000 0x0 0x28000000 0x10000000>;
 141
 142                 aips1: bus@44000000 {
 143                         compatible = "fsl,aips-bus", "simple-bus";
 144                         reg = <0x44000000 0x800000>;
 145                         #address-cells = <1>;
 146                         #size-cells = <1>;
 147                         ranges;
 148
 149                         anomix_ns_gpr: syscon@44210000 {
 150                                 compatible = "fsl,imx93-aonmix-ns-syscfg", "syscon";
 151                                 reg = <0x44210000 0x1000>;
 152                         };
 153
 154                         mu1: mailbox@44230000 {
 155                                 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
 156                                 reg = <0x44230000 0x10000>;
 157                                 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 158                                 clocks = <&clk IMX93_CLK_MU1_B_GATE>;
 159                                 #mbox-cells = <2>;
 160                                 status = "disabled";
 161                         };
 162
 163                         system_counter: timer@44290000 {
 164                                 compatible = "nxp,sysctr-timer";
 165                                 reg = <0x44290000 0x30000>;
 166                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 167                                 clocks = <&osc_24m>;
 168                                 clock-names = "per";
 169                                 nxp,no-divider;
 170                         };
 171
 172                         wdog1: watchdog@442d0000 {
 173                                 compatible = "fsl,imx93-wdt";
 174                                 reg = <0x442d0000 0x10000>;
 175                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 176                                 clocks = <&clk IMX93_CLK_WDOG1_GATE>;
 177                                 timeout-sec = <40>;
 178                                 status = "disabled";
 179                         };
 180
 181                         wdog2: watchdog@442e0000 {
 182                                 compatible = "fsl,imx93-wdt";
 183                                 reg = <0x442e0000 0x10000>;
 184                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
 185                                 clocks = <&clk IMX93_CLK_WDOG2_GATE>;
 186                                 timeout-sec = <40>;
 187                                 status = "disabled";
 188                         };
 189
 190                         tpm1: pwm@44310000 {
 191                                 compatible = "fsl,imx7ulp-pwm";
 192                                 reg = <0x44310000 0x1000>;
 193                                 clocks = <&clk IMX93_CLK_TPM1_GATE>;
 194                                 #pwm-cells = <3>;
 195                                 status = "disabled";
 196                         };
 197
 198                         tpm2: pwm@44320000 {
 199                                 compatible = "fsl,imx7ulp-pwm";
 200                                 reg = <0x44320000 0x10000>;
 201                                 clocks = <&clk IMX93_CLK_TPM2_GATE>;
 202                                 #pwm-cells = <3>;
 203                                 status = "disabled";
 204                         };
 205
 206                         lpi2c1: i2c@44340000 {
 207                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 208                                 reg = <0x44340000 0x10000>;
 209                                 #address-cells = <1>;
 210                                 #size-cells = <0>;
 211                                 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 212                                 clocks = <&clk IMX93_CLK_LPI2C1_GATE>,
 213                                          <&clk IMX93_CLK_BUS_AON>;
 214                                 clock-names = "per", "ipg";
 215                                 status = "disabled";
 216                         };
 217
 218                         lpi2c2: i2c@44350000 {
 219                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 220                                 reg = <0x44350000 0x10000>;
 221                                 #address-cells = <1>;
 222                                 #size-cells = <0>;
 223                                 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 224                                 clocks = <&clk IMX93_CLK_LPI2C2_GATE>,
 225                                          <&clk IMX93_CLK_BUS_AON>;
 226                                 clock-names = "per", "ipg";
 227                                 status = "disabled";
 228                         };
 229
 230                         lpspi1: spi@44360000 {
 231                                 #address-cells = <1>;
 232                                 #size-cells = <0>;
 233                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 234                                 reg = <0x44360000 0x10000>;
 235                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 236                                 clocks = <&clk IMX93_CLK_LPSPI1_GATE>,
 237                                          <&clk IMX93_CLK_BUS_AON>;
 238                                 clock-names = "per", "ipg";
 239                                 status = "disabled";
 240                         };
 241
 242                         lpspi2: spi@44370000 {
 243                                 #address-cells = <1>;
 244                                 #size-cells = <0>;
 245                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 246                                 reg = <0x44370000 0x10000>;
 247                                 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 248                                 clocks = <&clk IMX93_CLK_LPSPI2_GATE>,
 249                                          <&clk IMX93_CLK_BUS_AON>;
 250                                 clock-names = "per", "ipg";
 251                                 status = "disabled";
 252                         };
 253
 254                         lpuart1: serial@44380000 {
 255                                 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
 256                                 reg = <0x44380000 0x1000>;
 257                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 258                                 clocks = <&clk IMX93_CLK_LPUART1_GATE>;
 259                                 clock-names = "ipg";
 260                                 status = "disabled";
 261                         };
 262
 263                         lpuart2: serial@44390000 {
 264                                 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
 265                                 reg = <0x44390000 0x1000>;
 266                                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 267                                 clocks = <&clk IMX93_CLK_LPUART2_GATE>;
 268                                 clock-names = "ipg";
 269                                 status = "disabled";
 270                         };
 271
 272                         flexcan1: can@443a0000 {
 273                                 compatible = "fsl,imx93-flexcan";
 274                                 reg = <0x443a0000 0x10000>;
 275                                 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 276                                 clocks = <&clk IMX93_CLK_BUS_AON>,
 277                                          <&clk IMX93_CLK_CAN1_GATE>;
 278                                 clock-names = "ipg", "per";
 279                                 assigned-clocks = <&clk IMX93_CLK_CAN1>;
 280                                 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
 281                                 assigned-clock-rates = <40000000>;
 282                                 fsl,clk-source = /bits/ 8 <0>;
 283                                 status = "disabled";
 284                         };
 285
 286                         iomuxc: pinctrl@443c0000 {
 287                                 compatible = "fsl,imx93-iomuxc";
 288                                 reg = <0x443c0000 0x10000>;
 289                                 status = "okay";
 290                         };
 291
 292                         bbnsm: bbnsm@44440000 {
 293                                 compatible = "nxp,imx93-bbnsm", "syscon", "simple-mfd";
 294                                 reg = <0x44440000 0x10000>;
 295
 296                                 bbnsm_rtc: rtc {
 297                                         compatible = "nxp,imx93-bbnsm-rtc";
 298                                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 299                                 };
 300
 301                                 bbnsm_pwrkey: pwrkey {
 302                                         compatible = "nxp,imx93-bbnsm-pwrkey";
 303                                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 304                                         linux,code = <KEY_POWER>;
 305                                 };
 306                         };
 307
 308                         clk: clock-controller@44450000 {
 309                                 compatible = "fsl,imx93-ccm";
 310                                 reg = <0x44450000 0x10000>;
 311                                 #clock-cells = <1>;
 312                                 clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>;
 313                                 clock-names = "osc_32k", "osc_24m", "clk_ext1";
 314                                 status = "okay";
 315                         };
 316
 317                         src: system-controller@44460000 {
 318                                 compatible = "fsl,imx93-src", "syscon";
 319                                 reg = <0x44460000 0x10000>;
 320                                 #address-cells = <1>;
 321                                 #size-cells = <1>;
 322                                 ranges;
 323
 324                                 mlmix: power-domain@44461800 {
 325                                         compatible = "fsl,imx93-src-slice";
 326                                         reg = <0x44461800 0x400>, <0x44464800 0x400>;
 327                                         #power-domain-cells = <0>;
 328                                         clocks = <&clk IMX93_CLK_ML_APB>,
 329                                                  <&clk IMX93_CLK_ML>;
 330                                 };
 331
 332                                 mediamix: power-domain@44462400 {
 333                                         compatible = "fsl,imx93-src-slice";
 334                                         reg = <0x44462400 0x400>, <0x44465800 0x400>;
 335                                         #power-domain-cells = <0>;
 336                                         clocks = <&clk IMX93_CLK_MEDIA_AXI>,
 337                                                  <&clk IMX93_CLK_MEDIA_APB>;
 338                                 };
 339                         };
 340
 341                         anatop: anatop@44480000 {
 342                                 compatible = "fsl,imx93-anatop", "syscon";
 343                                 reg = <0x44480000 0x10000>;
 344                         };
 345
 346                         adc1: adc@44530000 {
 347                                 compatible = "nxp,imx93-adc";
 348                                 reg = <0x44530000 0x10000>;
 349                                 interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 350                                              <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 351                                              <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 352                                              <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
 353                                 clocks = <&clk IMX93_CLK_ADC1_GATE>;
 354                                 clock-names = "ipg";
 355                                 #io-channel-cells = <1>;
 356                                 status = "disabled";
 357                         };
 358                 };
 359
 360                 aips2: bus@42000000 {
 361                         compatible = "fsl,aips-bus", "simple-bus";
 362                         reg = <0x42000000 0x800000>;
 363                         #address-cells = <1>;
 364                         #size-cells = <1>;
 365                         ranges;
 366
 367                         wakeupmix_gpr: syscon@42420000 {
 368                                 compatible = "fsl,imx93-wakeupmix-syscfg", "syscon";
 369                                 reg = <0x42420000 0x1000>;
 370                         };
 371
 372                         mu2: mailbox@42440000 {
 373                                 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
 374                                 reg = <0x42440000 0x10000>;
 375                                 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 376                                 clocks = <&clk IMX93_CLK_MU2_B_GATE>;
 377                                 #mbox-cells = <2>;
 378                                 status = "disabled";
 379                         };
 380
 381                         wdog3: watchdog@42490000 {
 382                                 compatible = "fsl,imx93-wdt";
 383                                 reg = <0x42490000 0x10000>;
 384                                 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
 385                                 clocks = <&clk IMX93_CLK_WDOG3_GATE>;
 386                                 timeout-sec = <40>;
 387                                 status = "disabled";
 388                         };
 389
 390                         wdog4: watchdog@424a0000 {
 391                                 compatible = "fsl,imx93-wdt";
 392                                 reg = <0x424a0000 0x10000>;
 393                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 394                                 clocks = <&clk IMX93_CLK_WDOG4_GATE>;
 395                                 timeout-sec = <40>;
 396                                 status = "disabled";
 397                         };
 398
 399                         wdog5: watchdog@424b0000 {
 400                                 compatible = "fsl,imx93-wdt";
 401                                 reg = <0x424b0000 0x10000>;
 402                                 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 403                                 clocks = <&clk IMX93_CLK_WDOG5_GATE>;
 404                                 timeout-sec = <40>;
 405                                 status = "disabled";
 406                         };
 407
 408                         tpm3: pwm@424e0000 {
 409                                 compatible = "fsl,imx7ulp-pwm";
 410                                 reg = <0x424e0000 0x1000>;
 411                                 clocks = <&clk IMX93_CLK_TPM3_GATE>;
 412                                 #pwm-cells = <3>;
 413                                 status = "disabled";
 414                         };
 415
 416                         tpm4: pwm@424f0000 {
 417                                 compatible = "fsl,imx7ulp-pwm";
 418                                 reg = <0x424f0000 0x10000>;
 419                                 clocks = <&clk IMX93_CLK_TPM4_GATE>;
 420                                 #pwm-cells = <3>;
 421                                 status = "disabled";
 422                         };
 423
 424                         tpm5: pwm@42500000 {
 425                                 compatible = "fsl,imx7ulp-pwm";
 426                                 reg = <0x42500000 0x10000>;
 427                                 clocks = <&clk IMX93_CLK_TPM5_GATE>;
 428                                 #pwm-cells = <3>;
 429                                 status = "disabled";
 430                         };
 431
 432                         tpm6: pwm@42510000 {
 433                                 compatible = "fsl,imx7ulp-pwm";
 434                                 reg = <0x42510000 0x10000>;
 435                                 clocks = <&clk IMX93_CLK_TPM6_GATE>;
 436                                 #pwm-cells = <3>;
 437                                 status = "disabled";
 438                         };
 439
 440                         lpi2c3: i2c@42530000 {
 441                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 442                                 reg = <0x42530000 0x10000>;
 443                                 #address-cells = <1>;
 444                                 #size-cells = <0>;
 445                                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 446                                 clocks = <&clk IMX93_CLK_LPI2C3_GATE>,
 447                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 448                                 clock-names = "per", "ipg";
 449                                 status = "disabled";
 450                         };
 451
 452                         lpi2c4: i2c@42540000 {
 453                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 454                                 reg = <0x42540000 0x10000>;
 455                                 #address-cells = <1>;
 456                                 #size-cells = <0>;
 457                                 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 458                                 clocks = <&clk IMX93_CLK_LPI2C4_GATE>,
 459                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 460                                 clock-names = "per", "ipg";
 461                                 status = "disabled";
 462                         };
 463
 464                         lpspi3: spi@42550000 {
 465                                 #address-cells = <1>;
 466                                 #size-cells = <0>;
 467                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 468                                 reg = <0x42550000 0x10000>;
 469                                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 470                                 clocks = <&clk IMX93_CLK_LPSPI3_GATE>,
 471                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 472                                 clock-names = "per", "ipg";
 473                                 status = "disabled";
 474                         };
 475
 476                         lpspi4: spi@42560000 {
 477                                 #address-cells = <1>;
 478                                 #size-cells = <0>;
 479                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 480                                 reg = <0x42560000 0x10000>;
 481                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 482                                 clocks = <&clk IMX93_CLK_LPSPI4_GATE>,
 483                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 484                                 clock-names = "per", "ipg";
 485                                 status = "disabled";
 486                         };
 487
 488                         lpuart3: serial@42570000 {
 489                                 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
 490                                 reg = <0x42570000 0x1000>;
 491                                 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 492                                 clocks = <&clk IMX93_CLK_LPUART3_GATE>;
 493                                 clock-names = "ipg";
 494                                 status = "disabled";
 495                         };
 496
 497                         lpuart4: serial@42580000 {
 498                                 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
 499                                 reg = <0x42580000 0x1000>;
 500                                 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 501                                 clocks = <&clk IMX93_CLK_LPUART4_GATE>;
 502                                 clock-names = "ipg";
 503                                 status = "disabled";
 504                         };
 505
 506                         lpuart5: serial@42590000 {
 507                                 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
 508                                 reg = <0x42590000 0x1000>;
 509                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 510                                 clocks = <&clk IMX93_CLK_LPUART5_GATE>;
 511                                 clock-names = "ipg";
 512                                 status = "disabled";
 513                         };
 514
 515                         lpuart6: serial@425a0000 {
 516                                 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
 517                                 reg = <0x425a0000 0x1000>;
 518                                 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 519                                 clocks = <&clk IMX93_CLK_LPUART6_GATE>;
 520                                 clock-names = "ipg";
 521                                 status = "disabled";
 522                         };
 523
 524                         flexcan2: can@425b0000 {
 525                                 compatible = "fsl,imx93-flexcan";
 526                                 reg = <0x425b0000 0x10000>;
 527                                 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
 528                                 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
 529                                          <&clk IMX93_CLK_CAN2_GATE>;
 530                                 clock-names = "ipg", "per";
 531                                 assigned-clocks = <&clk IMX93_CLK_CAN2>;
 532                                 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
 533                                 assigned-clock-rates = <40000000>;
 534                                 fsl,clk-source = /bits/ 8 <0>;
 535                                 status = "disabled";
 536                         };
 537
 538                         flexspi1: spi@425e0000 {
 539                                 compatible = "nxp,imx8mm-fspi";
 540                                 reg = <0x425e0000 0x10000>, <0x28000000 0x10000000>;
 541                                 reg-names = "fspi_base", "fspi_mmap";
 542                                 #address-cells = <1>;
 543                                 #size-cells = <0>;
 544                                 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
 545                                 clocks = <&clk IMX93_CLK_FLEXSPI1_GATE>,
 546                                          <&clk IMX93_CLK_FLEXSPI1_GATE>;
 547                                 clock-names = "fspi_en", "fspi";
 548                                 assigned-clocks = <&clk IMX93_CLK_FLEXSPI1>;
 549                                 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
 550                                 status = "disabled";
 551                         };
 552
 553                         lpuart7: serial@42690000 {
 554                                 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
 555                                 reg = <0x42690000 0x1000>;
 556                                 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>;
 557                                 clocks = <&clk IMX93_CLK_LPUART7_GATE>;
 558                                 clock-names = "ipg";
 559                                 status = "disabled";
 560                         };
 561
 562                         lpuart8: serial@426a0000 {
 563                                 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
 564                                 reg = <0x426a0000 0x1000>;
 565                                 interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
 566                                 clocks = <&clk IMX93_CLK_LPUART8_GATE>;
 567                                 clock-names = "ipg";
 568                                 status = "disabled";
 569                         };
 570
 571                         lpi2c5: i2c@426b0000 {
 572                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 573                                 reg = <0x426b0000 0x10000>;
 574                                 #address-cells = <1>;
 575                                 #size-cells = <0>;
 576                                 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
 577                                 clocks = <&clk IMX93_CLK_LPI2C5_GATE>,
 578                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 579                                 clock-names = "per", "ipg";
 580                                 status = "disabled";
 581                         };
 582
 583                         lpi2c6: i2c@426c0000 {
 584                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 585                                 reg = <0x426c0000 0x10000>;
 586                                 #address-cells = <1>;
 587                                 #size-cells = <0>;
 588                                 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
 589                                 clocks = <&clk IMX93_CLK_LPI2C6_GATE>,
 590                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 591                                 clock-names = "per", "ipg";
 592                                 status = "disabled";
 593                         };
 594
 595                         lpi2c7: i2c@426d0000 {
 596                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 597                                 reg = <0x426d0000 0x10000>;
 598                                 #address-cells = <1>;
 599                                 #size-cells = <0>;
 600                                 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 601                                 clocks = <&clk IMX93_CLK_LPI2C7_GATE>,
 602                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 603                                 clock-names = "per", "ipg";
 604                                 status = "disabled";
 605                         };
 606
 607                         lpi2c8: i2c@426e0000 {
 608                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 609                                 reg = <0x426e0000 0x10000>;
 610                                 #address-cells = <1>;
 611                                 #size-cells = <0>;
 612                                 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
 613                                 clocks = <&clk IMX93_CLK_LPI2C8_GATE>,
 614                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 615                                 clock-names = "per", "ipg";
 616                                 status = "disabled";
 617                         };
 618
 619                         lpspi5: spi@426f0000 {
 620                                 #address-cells = <1>;
 621                                 #size-cells = <0>;
 622                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 623                                 reg = <0x426f0000 0x10000>;
 624                                 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
 625                                 clocks = <&clk IMX93_CLK_LPSPI5_GATE>,
 626                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 627                                 clock-names = "per", "ipg";
 628                                 status = "disabled";
 629                         };
 630
 631                         lpspi6: spi@42700000 {
 632                                 #address-cells = <1>;
 633                                 #size-cells = <0>;
 634                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 635                                 reg = <0x42700000 0x10000>;
 636                                 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
 637                                 clocks = <&clk IMX93_CLK_LPSPI6_GATE>,
 638                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 639                                 clock-names = "per", "ipg";
 640                                 status = "disabled";
 641                         };
 642
 643                         lpspi7: spi@42710000 {
 644                                 #address-cells = <1>;
 645                                 #size-cells = <0>;
 646                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 647                                 reg = <0x42710000 0x10000>;
 648                                 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
 649                                 clocks = <&clk IMX93_CLK_LPSPI7_GATE>,
 650                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 651                                 clock-names = "per", "ipg";
 652                                 status = "disabled";
 653                         };
 654
 655                         lpspi8: spi@42720000 {
 656                                 #address-cells = <1>;
 657                                 #size-cells = <0>;
 658                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 659                                 reg = <0x42720000 0x10000>;
 660                                 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
 661                                 clocks = <&clk IMX93_CLK_LPSPI8_GATE>,
 662                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 663                                 clock-names = "per", "ipg";
 664                                 status = "disabled";
 665                         };
 666
 667                 };
 668
 669                 aips3: bus@42800000 {
 670                         compatible = "fsl,aips-bus", "simple-bus";
 671                         reg = <0x42800000 0x800000>;
 672                         #address-cells = <1>;
 673                         #size-cells = <1>;
 674                         ranges;
 675
 676                         usdhc1: mmc@42850000 {
 677                                 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
 678                                 reg = <0x42850000 0x10000>;
 679                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 680                                 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
 681                                          <&clk IMX93_CLK_WAKEUP_AXI>,
 682                                          <&clk IMX93_CLK_USDHC1_GATE>;
 683                                 clock-names = "ipg", "ahb", "per";
 684                                 bus-width = <8>;
 685                                 fsl,tuning-start-tap = <20>;
 686                                 fsl,tuning-step= <2>;
 687                                 status = "disabled";
 688                         };
 689
 690                         usdhc2: mmc@42860000 {
 691                                 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
 692                                 reg = <0x42860000 0x10000>;
 693                                 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 694                                 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
 695                                          <&clk IMX93_CLK_WAKEUP_AXI>,
 696                                          <&clk IMX93_CLK_USDHC2_GATE>;
 697                                 clock-names = "ipg", "ahb", "per";
 698                                 bus-width = <4>;
 699                                 fsl,tuning-start-tap = <20>;
 700                                 fsl,tuning-step= <2>;
 701                                 status = "disabled";
 702                         };
 703
 704                         fec: ethernet@42890000 {
 705                                 compatible = "fsl,imx93-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";
 706                                 reg = <0x42890000 0x10000>;
 707                                 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
 708                                              <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
 709                                              <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
 710                                              <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
 711                                 clocks = <&clk IMX93_CLK_ENET1_GATE>,
 712                                          <&clk IMX93_CLK_ENET1_GATE>,
 713                                          <&clk IMX93_CLK_ENET_TIMER1>,
 714                                          <&clk IMX93_CLK_ENET_REF>,
 715                                          <&clk IMX93_CLK_ENET_REF_PHY>;
 716                                 clock-names = "ipg", "ahb", "ptp",
 717                                               "enet_clk_ref", "enet_out";
 718                                 assigned-clocks = <&clk IMX93_CLK_ENET_TIMER1>,
 719                                                   <&clk IMX93_CLK_ENET_REF>,
 720                                                   <&clk IMX93_CLK_ENET_REF_PHY>;
 721                                 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
 722                                                          <&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>,
 723                                                          <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
 724                                 assigned-clock-rates = <100000000>, <250000000>, <50000000>;
 725                                 fsl,num-tx-queues = <3>;
 726                                 fsl,num-rx-queues = <3>;
 727                                 status = "disabled";
 728                         };
 729
 730                         eqos: ethernet@428a0000 {
 731                                 compatible = "nxp,imx93-dwmac-eqos", "snps,dwmac-5.10a";
 732                                 reg = <0x428a0000 0x10000>;
 733                                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
 734                                              <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
 735                                 interrupt-names = "macirq", "eth_wake_irq";
 736                                 clocks = <&clk IMX93_CLK_ENET_QOS_GATE>,
 737                                          <&clk IMX93_CLK_ENET_QOS_GATE>,
 738                                          <&clk IMX93_CLK_ENET_TIMER2>,
 739                                          <&clk IMX93_CLK_ENET>,
 740                                          <&clk IMX93_CLK_ENET_QOS_GATE>;
 741                                 clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem";
 742                                 assigned-clocks = <&clk IMX93_CLK_ENET_TIMER2>,
 743                                                   <&clk IMX93_CLK_ENET>;
 744                                 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
 745                                                          <&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>;
 746                                 assigned-clock-rates = <100000000>, <250000000>;
 747                                 intf_mode = <&wakeupmix_gpr 0x28>;
 748                                 snps,clk-csr = <0>;
 749                                 status = "disabled";
 750                         };
 751
 752                         usdhc3: mmc@428b0000 {
 753                                 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
 754                                 reg = <0x428b0000 0x10000>;
 755                                 interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
 756                                 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
 757                                          <&clk IMX93_CLK_WAKEUP_AXI>,
 758                                          <&clk IMX93_CLK_USDHC3_GATE>;
 759                                 clock-names = "ipg", "ahb", "per";
 760                                 bus-width = <4>;
 761                                 fsl,tuning-start-tap = <20>;
 762                                 fsl,tuning-step= <2>;
 763                                 status = "disabled";
 764                         };
 765                 };
 766
 767                 gpio2: gpio@43810080 {
 768                         compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
 769                         reg = <0x43810080 0x1000>, <0x43810040 0x40>;
 770                         gpio-controller;
 771                         #gpio-cells = <2>;
 772                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 773                         interrupt-controller;
 774                         #interrupt-cells = <2>;
 775                         clocks = <&clk IMX93_CLK_GPIO2_GATE>,
 776                                  <&clk IMX93_CLK_GPIO2_GATE>;
 777                         clock-names = "gpio", "port";
 778                         gpio-ranges = <&iomuxc 0 4 30>;
 779                 };
 780
 781                 gpio3: gpio@43820080 {
 782                         compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
 783                         reg = <0x43820080 0x1000>, <0x43820040 0x40>;
 784                         gpio-controller;
 785                         #gpio-cells = <2>;
 786                         interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
 787                         interrupt-controller;
 788                         #interrupt-cells = <2>;
 789                         clocks = <&clk IMX93_CLK_GPIO3_GATE>,
 790                                  <&clk IMX93_CLK_GPIO3_GATE>;
 791                         clock-names = "gpio", "port";
 792                         gpio-ranges = <&iomuxc 0 84 8>, <&iomuxc 8 66 18>,
 793                                       <&iomuxc 26 34 2>, <&iomuxc 28 0 4>;
 794                 };
 795
 796                 gpio4: gpio@43830080 {
 797                         compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
 798                         reg = <0x43830080 0x1000>, <0x43830040 0x40>;
 799                         gpio-controller;
 800                         #gpio-cells = <2>;
 801                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
 802                         interrupt-controller;
 803                         #interrupt-cells = <2>;
 804                         clocks = <&clk IMX93_CLK_GPIO4_GATE>,
 805                                  <&clk IMX93_CLK_GPIO4_GATE>;
 806                         clock-names = "gpio", "port";
 807                         gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36 2>;
 808                 };
 809
 810                 gpio1: gpio@47400080 {
 811                         compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
 812                         reg = <0x47400080 0x1000>, <0x47400040 0x40>;
 813                         gpio-controller;
 814                         #gpio-cells = <2>;
 815                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 816                         interrupt-controller;
 817                         #interrupt-cells = <2>;
 818                         clocks = <&clk IMX93_CLK_GPIO1_GATE>,
 819                                  <&clk IMX93_CLK_GPIO1_GATE>;
 820                         clock-names = "gpio", "port";
 821                         gpio-ranges = <&iomuxc 0 92 16>;
 822                 };
 823
 824                 ocotp: efuse@47510000 {
 825                         compatible = "fsl,imx93-ocotp", "syscon";
 826                         reg = <0x47510000 0x10000>;
 827                         #address-cells = <1>;
 828                         #size-cells = <1>;
 829                 };
 830
 831                 s4muap: mailbox@47520000 {
 832                         compatible = "fsl,imx93-mu-s4";
 833                         reg = <0x47520000 0x10000>;
 834                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
 835                                      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 836                         interrupt-names = "tx", "rx";
 837                         #mbox-cells = <2>;
 838                 };
 839
 840                 media_blk_ctrl: system-controller@4ac10000 {
 841                         compatible = "fsl,imx93-media-blk-ctrl", "syscon";
 842                         reg = <0x4ac10000 0x10000>;
 843                         power-domains = <&mediamix>;
 844                         clocks = <&clk IMX93_CLK_MEDIA_APB>,
 845                                  <&clk IMX93_CLK_MEDIA_AXI>,
 846                                  <&clk IMX93_CLK_NIC_MEDIA_GATE>,
 847                                  <&clk IMX93_CLK_MEDIA_DISP_PIX>,
 848                                  <&clk IMX93_CLK_CAM_PIX>,
 849                                  <&clk IMX93_CLK_PXP_GATE>,
 850                                  <&clk IMX93_CLK_LCDIF_GATE>,
 851                                  <&clk IMX93_CLK_ISI_GATE>,
 852                                  <&clk IMX93_CLK_MIPI_CSI_GATE>,
 853                                  <&clk IMX93_CLK_MIPI_DSI_GATE>;
 854                         clock-names = "apb", "axi", "nic", "disp", "cam",
 855                                       "pxp", "lcdif", "isi", "csi", "dsi";
 856                         #power-domain-cells = <1>;
 857                         status = "disabled";
 858                 };
 859         };
 860 };