1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2023 Gateworks Corporation
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 compatible = "gpio-leds";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_gpio_leds>;
17 function = LED_FUNCTION_STATUS;
18 color = <LED_COLOR_ID_GREEN>;
19 gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
21 linux,default-trigger = "heartbeat";
25 function = LED_FUNCTION_STATUS;
26 color = <LED_COLOR_ID_RED>;
27 gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
28 default-state = "off";
32 pcie0_refclk: clock-pcie0 {
33 compatible = "fixed-clock";
35 clock-frequency = <100000000>;
39 compatible = "pps-gpio";
40 pinctrl-names = "default";
41 pinctrl-0 = <&pinctrl_pps>;
42 gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
46 reg_usb1_vbus: regulator-usb1 {
47 compatible = "regulator-fixed";
48 pinctrl-names = "default";
49 pinctrl-0 = <&pinctrl_reg_usb1_en>;
50 regulator-name = "usb1_vbus";
51 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
53 regulator-min-microvolt = <5000000>;
54 regulator-max-microvolt = <5000000>;
57 reg_usb2_vbus: regulator-usb2 {
58 compatible = "regulator-fixed";
59 pinctrl-names = "default";
60 pinctrl-0 = <&pinctrl_reg_usb2_en>;
61 regulator-name = "usb2_vbus";
62 gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
64 regulator-min-microvolt = <5000000>;
65 regulator-max-microvolt = <5000000>;
68 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
69 compatible = "regulator-fixed";
70 pinctrl-names = "default";
71 pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
72 regulator-name = "VDD_3V3_SD";
74 gpio = <&gpio2 19 0>; /* SD2_RESET */
75 off-on-delay-us = <12000>;
76 regulator-max-microvolt = <3300000>;
77 regulator-min-microvolt = <3300000>;
78 startup-delay-us = <100>;
82 /* off-board header */
84 pinctrl-names = "default";
85 pinctrl-0 = <&pinctrl_spi2>;
86 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
94 "dio1", "", "", "dio0",
95 "", "", "pci_usb_sel", "",
97 "", "", "rs485_en", "rs485_term",
98 "", "", "", "rs485_half",
99 "pci_wdis#", "", "", "";
103 clock-frequency = <400000>;
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_i2c2>;
109 compatible = "st,lis2de12";
111 pinctrl-names = "default";
112 pinctrl-0 = <&pinctrl_accel>;
113 st,drdy-int-pin = <1>;
114 interrupt-parent = <&gpio4>;
115 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
116 interrupt-names = "INT1";
121 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
122 fsl,clkreq-unsupported;
123 clocks = <&pcie0_refclk>;
129 pinctrl-names = "default";
130 pinctrl-0 = <&pinctrl_pcie0>;
131 reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
137 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_uart1>;
142 /* off-board header */
144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_uart3>;
151 pinctrl-names = "default";
152 pinctrl-0 = <&pinctrl_uart4>;
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_usb1>;
160 fsl,over-current-active-low;
165 vbus-supply = <®_usb1_vbus>;
170 /* dual role is implemented but not a full featured OTG */
176 role-switch-default-mode = "peripheral";
180 compatible = "gpio-usb-b-connector", "usb-b-connector";
181 pinctrl-names = "default";
182 pinctrl-0 = <&pinctrl_usbcon1>;
185 id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
189 /* USB2 - USB3.0 Hub */
191 fsl,permanently-attached;
192 fsl,disable-port-power-control;
197 vbus-supply = <®_usb2_vbus>;
208 pinctrl-names = "default", "state_100mhz", "state_200mhz";
209 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
210 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
211 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
212 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
214 vmmc-supply = <®_usdhc2_vmmc>;
219 pinctrl-names = "default";
220 pinctrl-0 = <&pinctrl_hog>;
222 pinctrl_hog: hoggrp {
224 MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x40000146 /* DIO1 */
225 MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x40000146 /* DIO0 */
226 MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x40000106 /* PCIE_USBSEL */
227 MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x40000106 /* RS485_HALF */
228 MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x40000106 /* RS485_EN */
229 MX8MP_IOMUXC_SAI2_RXD0__GPIO4_IO23 0x40000106 /* RS485_TERM */
230 MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCIE_WDIS# */
234 pinctrl_accel: accelgrp {
236 MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x150 /* IRQ */
240 pinctrl_gpio_leds: gpioledgrp {
242 MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x6 /* LEDG */
243 MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x6 /* LEDR */
247 pinctrl_pcie0: pcie0grp {
249 MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106
253 pinctrl_pps: ppsgrp {
255 MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x146
259 pinctrl_reg_usb1_en: regusb1grp {
261 MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x146 /* USB1_EN */
265 pinctrl_usb1: usb1grp {
267 MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x140 /* USB1_FLT# */
271 pinctrl_usbcon1: usbcon1grp {
273 MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x140 /* USB1_ID */
277 pinctrl_reg_usb2_en: regusb2grp {
279 MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12 0x146 /* USBHUB_RST# */
283 pinctrl_spi2: spi2grp {
285 MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140
286 MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
287 MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
288 MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
292 pinctrl_uart1: uart1grp {
294 MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
295 MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
299 pinctrl_uart3: uart3grp {
301 MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140
302 MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140
306 pinctrl_uart4: uart4grp {
308 MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x140
309 MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x140
313 pinctrl_usdhc1: usdhc1grp {
315 MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190
316 MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0
317 MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0
318 MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0
319 MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0
320 MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0
324 pinctrl_usdhc2: usdhc2grp {
326 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
327 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
328 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
329 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
330 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
331 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
332 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
336 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
338 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
339 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
340 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
341 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
342 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
343 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
344 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
348 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
350 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
351 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
352 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
353 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
354 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
355 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
356 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
360 pinctrl_usdhc2_vmmc: usdhc2-vmmc-grp {
362 MX8MP_IOMUXC_SD2_RESET_B__USDHC2_RESET_B 0x1d0
366 pinctrl_usdhc2_gpio: usdhc2gpiogrp {
368 MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4