arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2020 PHYTEC Messtechnik GmbH
   4  * Author: Teresa Remmet <t.remmet@phytec.de>
   5  */
   6
   7 /dts-v1/;
   8
   9 #include <dt-bindings/leds/leds-pca9532.h>
  10 #include <dt-bindings/pwm/pwm.h>
  11 #include "imx8mp-phycore-som.dtsi"
  12
  13 / {
  14         model = "PHYTEC phyBOARD-Pollux i.MX8MP";
  15         compatible = "phytec,imx8mp-phyboard-pollux-rdk",
  16                      "phytec,imx8mp-phycore-som", "fsl,imx8mp";
  17
  18         chosen {
  19                 stdout-path = &uart2;
  20         };
  21
  22         reg_usdhc2_vmmc: regulator-usdhc2 {
  23                 compatible = "regulator-fixed";
  24                 pinctrl-names = "default";
  25                 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
  26                 regulator-name = "VSD_3V3";
  27                 regulator-min-microvolt = <3300000>;
  28                 regulator-max-microvolt = <3300000>;
  29                 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
  30                 enable-active-high;
  31                 startup-delay-us = <100>;
  32                 off-on-delay-us = <12000>;
  33         };
  34 };
  35
  36 &i2c2 {
  37         clock-frequency = <400000>;
  38         pinctrl-names = "default", "gpio";
  39         pinctrl-0 = <&pinctrl_i2c2>;
  40         pinctrl-1 = <&pinctrl_i2c2_gpio>;
  41         sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  42         scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  43         status = "okay";
  44
  45         eeprom@51 {
  46                 compatible = "atmel,24c02";
  47                 reg = <0x51>;
  48                 pagesize = <16>;
  49         };
  50
  51         leds@62 {
  52                 compatible = "nxp,pca9533";
  53                 reg = <0x62>;
  54
  55                 led1 {
  56                         type = <PCA9532_TYPE_LED>;
  57                 };
  58
  59                 led2 {
  60                         type = <PCA9532_TYPE_LED>;
  61                 };
  62
  63                 led3 {
  64                         type = <PCA9532_TYPE_LED>;
  65                 };
  66         };
  67 };
  68
  69 &snvs_pwrkey {
  70         status = "okay";
  71 };
  72
  73 /* debug console */
  74 &uart2 {
  75         pinctrl-names = "default";
  76         pinctrl-0 = <&pinctrl_uart2>;
  77         status = "okay";
  78 };
  79
  80 /* SD-Card */
  81 &usdhc2 {
  82         pinctrl-names = "default", "state_100mhz", "state_200mhz";
  83         pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_pins>;
  84         pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_pins>;
  85         pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_pins>;
  86         cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
  87         vmmc-supply = <&reg_usdhc2_vmmc>;
  88         bus-width = <4>;
  89         status = "okay";
  90 };
  91
  92 &iomuxc {
  93         pinctrl_i2c2: i2c2grp {
  94                 fsl,pins = <
  95                         MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL         0x400001c3
  96                         MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA         0x400001c3
  97                 >;
  98         };
  99
 100         pinctrl_i2c2_gpio: i2c2gpiogrp {
 101                 fsl,pins = <
 102                         MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16       0x1e3
 103                         MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17       0x1e3
 104                 >;
 105         };
 106
 107         pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
 108                 fsl,pins = <
 109                         MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19    0x41
 110                 >;
 111         };
 112
 113         pinctrl_uart2: uart2grp {
 114                 fsl,pins = <
 115                         MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX    0x49
 116                         MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX    0x49
 117                 >;
 118         };
 119
 120         pinctrl_usdhc2_pins: usdhc2-gpiogrp {
 121                 fsl,pins = <
 122                         MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12       0x1c4
 123                 >;
 124         };
 125
 126         pinctrl_usdhc2: usdhc2grp {
 127                 fsl,pins = <
 128                         MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK        0x190
 129                         MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD        0x1d0
 130                         MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0    0x1d0
 131                         MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1    0x1d0
 132                         MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2    0x1d0
 133                         MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3    0x1d0
 134                         MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
 135                 >;
 136         };
 137
 138         pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
 139                 fsl,pins = <
 140                         MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK        0x194
 141                         MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD        0x1d4
 142                         MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0    0x1d4
 143                         MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1    0x1d4
 144                         MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2    0x1d4
 145                         MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3    0x1d4
 146                         MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
 147                 >;
 148         };
 149
 150         pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
 151                 fsl,pins = <
 152                         MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK        0x196
 153                         MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD        0x1d6
 154                         MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0    0x1d6
 155                         MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1    0x1d6
 156                         MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2    0x1d6
 157                         MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3    0x1d6
 158                         MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
 159                 >;
 160         };
 161 };