arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 //
   3 // Device Tree Include file for Layerscape-LX2160A family SoC.
   4 //
   5 // Copyright 2018-2020 NXP
   6
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/interrupt-controller/arm-gic.h>
   9 #include <dt-bindings/thermal/thermal.h>
  10
  11 /memreserve/ 0x80000000 0x00010000;
  12
  13 / {
  14         compatible = "fsl,lx2160a";
  15         interrupt-parent = <&gic>;
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 rtc1 = &ftm_alarm0;
  21         };
  22
  23         cpus {
  24                 #address-cells = <1>;
  25                 #size-cells = <0>;
  26
  27                 // 8 clusters having 2 Cortex-A72 cores each
  28                 cpu0: cpu@0 {
  29                         device_type = "cpu";
  30                         compatible = "arm,cortex-a72";
  31                         enable-method = "psci";
  32                         reg = <0x0>;
  33                         clocks = <&clockgen 1 0>;
  34                         d-cache-size = <0x8000>;
  35                         d-cache-line-size = <64>;
  36                         d-cache-sets = <128>;
  37                         i-cache-size = <0xC000>;
  38                         i-cache-line-size = <64>;
  39                         i-cache-sets = <192>;
  40                         next-level-cache = <&cluster0_l2>;
  41                         cpu-idle-states = <&cpu_pw15>;
  42                         #cooling-cells = <2>;
  43                 };
  44
  45                 cpu1: cpu@1 {
  46                         device_type = "cpu";
  47                         compatible = "arm,cortex-a72";
  48                         enable-method = "psci";
  49                         reg = <0x1>;
  50                         clocks = <&clockgen 1 0>;
  51                         d-cache-size = <0x8000>;
  52                         d-cache-line-size = <64>;
  53                         d-cache-sets = <128>;
  54                         i-cache-size = <0xC000>;
  55                         i-cache-line-size = <64>;
  56                         i-cache-sets = <192>;
  57                         next-level-cache = <&cluster0_l2>;
  58                         cpu-idle-states = <&cpu_pw15>;
  59                         #cooling-cells = <2>;
  60                 };
  61
  62                 cpu100: cpu@100 {
  63                         device_type = "cpu";
  64                         compatible = "arm,cortex-a72";
  65                         enable-method = "psci";
  66                         reg = <0x100>;
  67                         clocks = <&clockgen 1 1>;
  68                         d-cache-size = <0x8000>;
  69                         d-cache-line-size = <64>;
  70                         d-cache-sets = <128>;
  71                         i-cache-size = <0xC000>;
  72                         i-cache-line-size = <64>;
  73                         i-cache-sets = <192>;
  74                         next-level-cache = <&cluster1_l2>;
  75                         cpu-idle-states = <&cpu_pw15>;
  76                         #cooling-cells = <2>;
  77                 };
  78
  79                 cpu101: cpu@101 {
  80                         device_type = "cpu";
  81                         compatible = "arm,cortex-a72";
  82                         enable-method = "psci";
  83                         reg = <0x101>;
  84                         clocks = <&clockgen 1 1>;
  85                         d-cache-size = <0x8000>;
  86                         d-cache-line-size = <64>;
  87                         d-cache-sets = <128>;
  88                         i-cache-size = <0xC000>;
  89                         i-cache-line-size = <64>;
  90                         i-cache-sets = <192>;
  91                         next-level-cache = <&cluster1_l2>;
  92                         cpu-idle-states = <&cpu_pw15>;
  93                         #cooling-cells = <2>;
  94                 };
  95
  96                 cpu200: cpu@200 {
  97                         device_type = "cpu";
  98                         compatible = "arm,cortex-a72";
  99                         enable-method = "psci";
 100                         reg = <0x200>;
 101                         clocks = <&clockgen 1 2>;
 102                         d-cache-size = <0x8000>;
 103                         d-cache-line-size = <64>;
 104                         d-cache-sets = <128>;
 105                         i-cache-size = <0xC000>;
 106                         i-cache-line-size = <64>;
 107                         i-cache-sets = <192>;
 108                         next-level-cache = <&cluster2_l2>;
 109                         cpu-idle-states = <&cpu_pw15>;
 110                         #cooling-cells = <2>;
 111                 };
 112
 113                 cpu201: cpu@201 {
 114                         device_type = "cpu";
 115                         compatible = "arm,cortex-a72";
 116                         enable-method = "psci";
 117                         reg = <0x201>;
 118                         clocks = <&clockgen 1 2>;
 119                         d-cache-size = <0x8000>;
 120                         d-cache-line-size = <64>;
 121                         d-cache-sets = <128>;
 122                         i-cache-size = <0xC000>;
 123                         i-cache-line-size = <64>;
 124                         i-cache-sets = <192>;
 125                         next-level-cache = <&cluster2_l2>;
 126                         cpu-idle-states = <&cpu_pw15>;
 127                         #cooling-cells = <2>;
 128                 };
 129
 130                 cpu300: cpu@300 {
 131                         device_type = "cpu";
 132                         compatible = "arm,cortex-a72";
 133                         enable-method = "psci";
 134                         reg = <0x300>;
 135                         clocks = <&clockgen 1 3>;
 136                         d-cache-size = <0x8000>;
 137                         d-cache-line-size = <64>;
 138                         d-cache-sets = <128>;
 139                         i-cache-size = <0xC000>;
 140                         i-cache-line-size = <64>;
 141                         i-cache-sets = <192>;
 142                         next-level-cache = <&cluster3_l2>;
 143                         cpu-idle-states = <&cpu_pw15>;
 144                         #cooling-cells = <2>;
 145                 };
 146
 147                 cpu301: cpu@301 {
 148                         device_type = "cpu";
 149                         compatible = "arm,cortex-a72";
 150                         enable-method = "psci";
 151                         reg = <0x301>;
 152                         clocks = <&clockgen 1 3>;
 153                         d-cache-size = <0x8000>;
 154                         d-cache-line-size = <64>;
 155                         d-cache-sets = <128>;
 156                         i-cache-size = <0xC000>;
 157                         i-cache-line-size = <64>;
 158                         i-cache-sets = <192>;
 159                         next-level-cache = <&cluster3_l2>;
 160                         cpu-idle-states = <&cpu_pw15>;
 161                         #cooling-cells = <2>;
 162                 };
 163
 164                 cpu400: cpu@400 {
 165                         device_type = "cpu";
 166                         compatible = "arm,cortex-a72";
 167                         enable-method = "psci";
 168                         reg = <0x400>;
 169                         clocks = <&clockgen 1 4>;
 170                         d-cache-size = <0x8000>;
 171                         d-cache-line-size = <64>;
 172                         d-cache-sets = <128>;
 173                         i-cache-size = <0xC000>;
 174                         i-cache-line-size = <64>;
 175                         i-cache-sets = <192>;
 176                         next-level-cache = <&cluster4_l2>;
 177                         cpu-idle-states = <&cpu_pw15>;
 178                         #cooling-cells = <2>;
 179                 };
 180
 181                 cpu401: cpu@401 {
 182                         device_type = "cpu";
 183                         compatible = "arm,cortex-a72";
 184                         enable-method = "psci";
 185                         reg = <0x401>;
 186                         clocks = <&clockgen 1 4>;
 187                         d-cache-size = <0x8000>;
 188                         d-cache-line-size = <64>;
 189                         d-cache-sets = <128>;
 190                         i-cache-size = <0xC000>;
 191                         i-cache-line-size = <64>;
 192                         i-cache-sets = <192>;
 193                         next-level-cache = <&cluster4_l2>;
 194                         cpu-idle-states = <&cpu_pw15>;
 195                         #cooling-cells = <2>;
 196                 };
 197
 198                 cpu500: cpu@500 {
 199                         device_type = "cpu";
 200                         compatible = "arm,cortex-a72";
 201                         enable-method = "psci";
 202                         reg = <0x500>;
 203                         clocks = <&clockgen 1 5>;
 204                         d-cache-size = <0x8000>;
 205                         d-cache-line-size = <64>;
 206                         d-cache-sets = <128>;
 207                         i-cache-size = <0xC000>;
 208                         i-cache-line-size = <64>;
 209                         i-cache-sets = <192>;
 210                         next-level-cache = <&cluster5_l2>;
 211                         cpu-idle-states = <&cpu_pw15>;
 212                         #cooling-cells = <2>;
 213                 };
 214
 215                 cpu501: cpu@501 {
 216                         device_type = "cpu";
 217                         compatible = "arm,cortex-a72";
 218                         enable-method = "psci";
 219                         reg = <0x501>;
 220                         clocks = <&clockgen 1 5>;
 221                         d-cache-size = <0x8000>;
 222                         d-cache-line-size = <64>;
 223                         d-cache-sets = <128>;
 224                         i-cache-size = <0xC000>;
 225                         i-cache-line-size = <64>;
 226                         i-cache-sets = <192>;
 227                         next-level-cache = <&cluster5_l2>;
 228                         cpu-idle-states = <&cpu_pw15>;
 229                         #cooling-cells = <2>;
 230                 };
 231
 232                 cpu600: cpu@600 {
 233                         device_type = "cpu";
 234                         compatible = "arm,cortex-a72";
 235                         enable-method = "psci";
 236                         reg = <0x600>;
 237                         clocks = <&clockgen 1 6>;
 238                         d-cache-size = <0x8000>;
 239                         d-cache-line-size = <64>;
 240                         d-cache-sets = <128>;
 241                         i-cache-size = <0xC000>;
 242                         i-cache-line-size = <64>;
 243                         i-cache-sets = <192>;
 244                         next-level-cache = <&cluster6_l2>;
 245                         cpu-idle-states = <&cpu_pw15>;
 246                         #cooling-cells = <2>;
 247                 };
 248
 249                 cpu601: cpu@601 {
 250                         device_type = "cpu";
 251                         compatible = "arm,cortex-a72";
 252                         enable-method = "psci";
 253                         reg = <0x601>;
 254                         clocks = <&clockgen 1 6>;
 255                         d-cache-size = <0x8000>;
 256                         d-cache-line-size = <64>;
 257                         d-cache-sets = <128>;
 258                         i-cache-size = <0xC000>;
 259                         i-cache-line-size = <64>;
 260                         i-cache-sets = <192>;
 261                         next-level-cache = <&cluster6_l2>;
 262                         cpu-idle-states = <&cpu_pw15>;
 263                         #cooling-cells = <2>;
 264                 };
 265
 266                 cpu700: cpu@700 {
 267                         device_type = "cpu";
 268                         compatible = "arm,cortex-a72";
 269                         enable-method = "psci";
 270                         reg = <0x700>;
 271                         clocks = <&clockgen 1 7>;
 272                         d-cache-size = <0x8000>;
 273                         d-cache-line-size = <64>;
 274                         d-cache-sets = <128>;
 275                         i-cache-size = <0xC000>;
 276                         i-cache-line-size = <64>;
 277                         i-cache-sets = <192>;
 278                         next-level-cache = <&cluster7_l2>;
 279                         cpu-idle-states = <&cpu_pw15>;
 280                         #cooling-cells = <2>;
 281                 };
 282
 283                 cpu701: cpu@701 {
 284                         device_type = "cpu";
 285                         compatible = "arm,cortex-a72";
 286                         enable-method = "psci";
 287                         reg = <0x701>;
 288                         clocks = <&clockgen 1 7>;
 289                         d-cache-size = <0x8000>;
 290                         d-cache-line-size = <64>;
 291                         d-cache-sets = <128>;
 292                         i-cache-size = <0xC000>;
 293                         i-cache-line-size = <64>;
 294                         i-cache-sets = <192>;
 295                         next-level-cache = <&cluster7_l2>;
 296                         cpu-idle-states = <&cpu_pw15>;
 297                         #cooling-cells = <2>;
 298                 };
 299
 300                 cluster0_l2: l2-cache0 {
 301                         compatible = "cache";
 302                         cache-size = <0x100000>;
 303                         cache-line-size = <64>;
 304                         cache-sets = <1024>;
 305                         cache-level = <2>;
 306                 };
 307
 308                 cluster1_l2: l2-cache1 {
 309                         compatible = "cache";
 310                         cache-size = <0x100000>;
 311                         cache-line-size = <64>;
 312                         cache-sets = <1024>;
 313                         cache-level = <2>;
 314                 };
 315
 316                 cluster2_l2: l2-cache2 {
 317                         compatible = "cache";
 318                         cache-size = <0x100000>;
 319                         cache-line-size = <64>;
 320                         cache-sets = <1024>;
 321                         cache-level = <2>;
 322                 };
 323
 324                 cluster3_l2: l2-cache3 {
 325                         compatible = "cache";
 326                         cache-size = <0x100000>;
 327                         cache-line-size = <64>;
 328                         cache-sets = <1024>;
 329                         cache-level = <2>;
 330                 };
 331
 332                 cluster4_l2: l2-cache4 {
 333                         compatible = "cache";
 334                         cache-size = <0x100000>;
 335                         cache-line-size = <64>;
 336                         cache-sets = <1024>;
 337                         cache-level = <2>;
 338                 };
 339
 340                 cluster5_l2: l2-cache5 {
 341                         compatible = "cache";
 342                         cache-size = <0x100000>;
 343                         cache-line-size = <64>;
 344                         cache-sets = <1024>;
 345                         cache-level = <2>;
 346                 };
 347
 348                 cluster6_l2: l2-cache6 {
 349                         compatible = "cache";
 350                         cache-size = <0x100000>;
 351                         cache-line-size = <64>;
 352                         cache-sets = <1024>;
 353                         cache-level = <2>;
 354                 };
 355
 356                 cluster7_l2: l2-cache7 {
 357                         compatible = "cache";
 358                         cache-size = <0x100000>;
 359                         cache-line-size = <64>;
 360                         cache-sets = <1024>;
 361                         cache-level = <2>;
 362                 };
 363
 364                 cpu_pw15: cpu-pw15 {
 365                         compatible = "arm,idle-state";
 366                         idle-state-name = "PW15";
 367                         arm,psci-suspend-param = <0x0>;
 368                         entry-latency-us = <2000>;
 369                         exit-latency-us = <2000>;
 370                         min-residency-us = <6000>;
 371                   };
 372         };
 373
 374         gic: interrupt-controller@6000000 {
 375                 compatible = "arm,gic-v3";
 376                 reg = <0x0 0x06000000 0 0x10000>, // GIC Dist
 377                         <0x0 0x06200000 0 0x200000>, // GICR (RD_base +
 378                                                      // SGI_base)
 379                         <0x0 0x0c0c0000 0 0x2000>, // GICC
 380                         <0x0 0x0c0d0000 0 0x1000>, // GICH
 381                         <0x0 0x0c0e0000 0 0x20000>; // GICV
 382                 #interrupt-cells = <3>;
 383                 #address-cells = <2>;
 384                 #size-cells = <2>;
 385                 ranges;
 386                 interrupt-controller;
 387                 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 388
 389                 its: gic-its@6020000 {
 390                         compatible = "arm,gic-v3-its";
 391                         msi-controller;
 392                         reg = <0x0 0x6020000 0 0x20000>;
 393                 };
 394         };
 395
 396         timer {
 397                 compatible = "arm,armv8-timer";
 398                 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
 399                              <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
 400                              <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
 401                              <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
 402         };
 403
 404         pmu {
 405                 compatible = "arm,cortex-a72-pmu";
 406                 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
 407         };
 408
 409         psci {
 410                 compatible = "arm,psci-0.2";
 411                 method = "smc";
 412         };
 413
 414         memory@80000000 {
 415                 // DRAM space - 1, size : 2 GB DRAM
 416                 device_type = "memory";
 417                 reg = <0x00000000 0x80000000 0 0x80000000>;
 418         };
 419
 420         ddr1: memory-controller@1080000 {
 421                 compatible = "fsl,qoriq-memory-controller";
 422                 reg = <0x0 0x1080000 0x0 0x1000>;
 423                 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 424                 little-endian;
 425         };
 426
 427         ddr2: memory-controller@1090000 {
 428                 compatible = "fsl,qoriq-memory-controller";
 429                 reg = <0x0 0x1090000 0x0 0x1000>;
 430                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 431                 little-endian;
 432         };
 433
 434         // One clock unit-sysclk node which bootloader require during DT fix-up
 435         sysclk: sysclk {
 436                 compatible = "fixed-clock";
 437                 #clock-cells = <0>;
 438                 clock-frequency = <100000000>; // fixed up by bootloader
 439                 clock-output-names = "sysclk";
 440         };
 441
 442         thermal-zones {
 443                 cluster6-7 {
 444                         polling-delay-passive = <1000>;
 445                         polling-delay = <5000>;
 446                         thermal-sensors = <&tmu 0>;
 447
 448                         trips {
 449                                 cluster6_7_alert: cluster6-7-alert {
 450                                         temperature = <85000>;
 451                                         hysteresis = <2000>;
 452                                         type = "passive";
 453                                 };
 454
 455                                 cluster6_7_crit: cluster6-7-crit {
 456                                         temperature = <95000>;
 457                                         hysteresis = <2000>;
 458                                         type = "critical";
 459                                 };
 460                         };
 461
 462                         cooling-maps {
 463                                 map0 {
 464                                         trip = <&cluster6_7_alert>;
 465                                         cooling-device =
 466                                                 <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 467                                                 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 468                                                 <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 469                                                 <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 470                                                 <&cpu200 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 471                                                 <&cpu201 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 472                                                 <&cpu300 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 473                                                 <&cpu301 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 474                                                 <&cpu400 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 475                                                 <&cpu401 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 476                                                 <&cpu500 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 477                                                 <&cpu501 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 478                                                 <&cpu600 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 479                                                 <&cpu601 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 480                                                 <&cpu700 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 481                                                 <&cpu701 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 482                                 };
 483                         };
 484                 };
 485
 486                 ddr-cluster5 {
 487                         polling-delay-passive = <1000>;
 488                         polling-delay = <5000>;
 489                         thermal-sensors = <&tmu 1>;
 490
 491                         trips {
 492                                 ddr-cluster5-alert {
 493                                         temperature = <85000>;
 494                                         hysteresis = <2000>;
 495                                         type = "passive";
 496                                 };
 497
 498                                 ddr-cluster5-crit {
 499                                         temperature = <95000>;
 500                                         hysteresis = <2000>;
 501                                         type = "critical";
 502                                 };
 503                         };
 504                 };
 505
 506                 wriop {
 507                         polling-delay-passive = <1000>;
 508                         polling-delay = <5000>;
 509                         thermal-sensors = <&tmu 2>;
 510
 511                         trips {
 512                                 wriop-alert {
 513                                         temperature = <85000>;
 514                                         hysteresis = <2000>;
 515                                         type = "passive";
 516                                 };
 517
 518                                 wriop-crit {
 519                                         temperature = <95000>;
 520                                         hysteresis = <2000>;
 521                                         type = "critical";
 522                                 };
 523                         };
 524                 };
 525
 526                 dce-qbman-hsio2 {
 527                         polling-delay-passive = <1000>;
 528                         polling-delay = <5000>;
 529                         thermal-sensors = <&tmu 3>;
 530
 531                         trips {
 532                                 dce-qbman-alert {
 533                                         temperature = <85000>;
 534                                         hysteresis = <2000>;
 535                                         type = "passive";
 536                                 };
 537
 538                                 dce-qbman-crit {
 539                                         temperature = <95000>;
 540                                         hysteresis = <2000>;
 541                                         type = "critical";
 542                                 };
 543                         };
 544                 };
 545
 546                 ccn-dpaa-tbu {
 547                         polling-delay-passive = <1000>;
 548                         polling-delay = <5000>;
 549                         thermal-sensors = <&tmu 4>;
 550
 551                         trips {
 552                                 ccn-dpaa-alert {
 553                                         temperature = <85000>;
 554                                         hysteresis = <2000>;
 555                                         type = "passive";
 556                                 };
 557
 558                                 ccn-dpaa-crit {
 559                                         temperature = <95000>;
 560                                         hysteresis = <2000>;
 561                                         type = "critical";
 562                                 };
 563                         };
 564                 };
 565
 566                 cluster4-hsio3 {
 567                         polling-delay-passive = <1000>;
 568                         polling-delay = <5000>;
 569                         thermal-sensors = <&tmu 5>;
 570
 571                         trips {
 572                                 clust4-hsio3-alert {
 573                                         temperature = <85000>;
 574                                         hysteresis = <2000>;
 575                                         type = "passive";
 576                                 };
 577
 578                                 clust4-hsio3-crit {
 579                                         temperature = <95000>;
 580                                         hysteresis = <2000>;
 581                                         type = "critical";
 582                                 };
 583                         };
 584                 };
 585
 586                 cluster2-3 {
 587                         polling-delay-passive = <1000>;
 588                         polling-delay = <5000>;
 589                         thermal-sensors = <&tmu 6>;
 590
 591                         trips {
 592                                 cluster2-3-alert {
 593                                         temperature = <85000>;
 594                                         hysteresis = <2000>;
 595                                         type = "passive";
 596                                 };
 597
 598                                 cluster2-3-crit {
 599                                         temperature = <95000>;
 600                                         hysteresis = <2000>;
 601                                         type = "critical";
 602                                 };
 603                         };
 604                 };
 605         };
 606
 607         soc {
 608                 compatible = "simple-bus";
 609                 #address-cells = <2>;
 610                 #size-cells = <2>;
 611                 ranges;
 612                 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
 613
 614                 crypto: crypto@8000000 {
 615                         compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
 616                         fsl,sec-era = <10>;
 617                         #address-cells = <1>;
 618                         #size-cells = <1>;
 619                         ranges = <0x0 0x00 0x8000000 0x100000>;
 620                         reg = <0x00 0x8000000 0x0 0x100000>;
 621                         interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
 622                         dma-coherent;
 623                         status = "disabled";
 624
 625                         sec_jr0: jr@10000 {
 626                                 compatible = "fsl,sec-v5.0-job-ring",
 627                                              "fsl,sec-v4.0-job-ring";
 628                                 reg        = <0x10000 0x10000>;
 629                                 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 630                         };
 631
 632                         sec_jr1: jr@20000 {
 633                                 compatible = "fsl,sec-v5.0-job-ring",
 634                                              "fsl,sec-v4.0-job-ring";
 635                                 reg        = <0x20000 0x10000>;
 636                                 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
 637                         };
 638
 639                         sec_jr2: jr@30000 {
 640                                 compatible = "fsl,sec-v5.0-job-ring",
 641                                              "fsl,sec-v4.0-job-ring";
 642                                 reg        = <0x30000 0x10000>;
 643                                 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
 644                         };
 645
 646                         sec_jr3: jr@40000 {
 647                                 compatible = "fsl,sec-v5.0-job-ring",
 648                                              "fsl,sec-v4.0-job-ring";
 649                                 reg        = <0x40000 0x10000>;
 650                                 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 651                         };
 652                 };
 653
 654                 clockgen: clock-controller@1300000 {
 655                         compatible = "fsl,lx2160a-clockgen";
 656                         reg = <0 0x1300000 0 0xa0000>;
 657                         #clock-cells = <2>;
 658                         clocks = <&sysclk>;
 659                 };
 660
 661                 dcfg: syscon@1e00000 {
 662                         compatible = "fsl,lx2160a-dcfg", "syscon";
 663                         reg = <0x0 0x1e00000 0x0 0x10000>;
 664                         little-endian;
 665                 };
 666
 667                 isc: syscon@1f70000 {
 668                         compatible = "fsl,lx2160a-isc", "syscon";
 669                         reg = <0x0 0x1f70000 0x0 0x10000>;
 670                         little-endian;
 671                         #address-cells = <1>;
 672                         #size-cells = <1>;
 673                         ranges = <0x0 0x0 0x1f70000 0x10000>;
 674
 675                         extirq: interrupt-controller@14 {
 676                                 compatible = "fsl,lx2160a-extirq", "fsl,ls1088a-extirq";
 677                                 #interrupt-cells = <2>;
 678                                 #address-cells = <0>;
 679                                 interrupt-controller;
 680                                 reg = <0x14 4>;
 681                                 interrupt-map =
 682                                         <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 683                                         <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 684                                         <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 685                                         <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 686                                         <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
 687                                         <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
 688                                         <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
 689                                         <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
 690                                         <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
 691                                         <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
 692                                         <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
 693                                         <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 694                                 interrupt-map-mask = <0xffffffff 0x0>;
 695                         };
 696                 };
 697
 698                 tmu: tmu@1f80000 {
 699                         compatible = "fsl,qoriq-tmu";
 700                         reg = <0x0 0x1f80000 0x0 0x10000>;
 701                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 702                         fsl,tmu-range = <0x800000e6 0x8001017d>;
 703                         fsl,tmu-calibration =
 704                                 /* Calibration data group 1 */
 705                                 <0x00000000 0x00000035
 706                                 /* Calibration data group 2 */
 707                                 0x00000001 0x00000154>;
 708                         little-endian;
 709                         #thermal-sensor-cells = <1>;
 710                 };
 711
 712                 i2c0: i2c@2000000 {
 713                         compatible = "fsl,vf610-i2c";
 714                         #address-cells = <1>;
 715                         #size-cells = <0>;
 716                         reg = <0x0 0x2000000 0x0 0x10000>;
 717                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 718                         clock-names = "i2c";
 719                         clocks = <&clockgen 4 15>;
 720                         scl-gpio = <&gpio2 15 GPIO_ACTIVE_HIGH>;
 721                         status = "disabled";
 722                 };
 723
 724                 i2c1: i2c@2010000 {
 725                         compatible = "fsl,vf610-i2c";
 726                         #address-cells = <1>;
 727                         #size-cells = <0>;
 728                         reg = <0x0 0x2010000 0x0 0x10000>;
 729                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 730                         clock-names = "i2c";
 731                         clocks = <&clockgen 4 15>;
 732                         status = "disabled";
 733                 };
 734
 735                 i2c2: i2c@2020000 {
 736                         compatible = "fsl,vf610-i2c";
 737                         #address-cells = <1>;
 738                         #size-cells = <0>;
 739                         reg = <0x0 0x2020000 0x0 0x10000>;
 740                         interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 741                         clock-names = "i2c";
 742                         clocks = <&clockgen 4 15>;
 743                         status = "disabled";
 744                 };
 745
 746                 i2c3: i2c@2030000 {
 747                         compatible = "fsl,vf610-i2c";
 748                         #address-cells = <1>;
 749                         #size-cells = <0>;
 750                         reg = <0x0 0x2030000 0x0 0x10000>;
 751                         interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 752                         clock-names = "i2c";
 753                         clocks = <&clockgen 4 15>;
 754                         status = "disabled";
 755                 };
 756
 757                 i2c4: i2c@2040000 {
 758                         compatible = "fsl,vf610-i2c";
 759                         #address-cells = <1>;
 760                         #size-cells = <0>;
 761                         reg = <0x0 0x2040000 0x0 0x10000>;
 762                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 763                         clock-names = "i2c";
 764                         clocks = <&clockgen 4 15>;
 765                         scl-gpio = <&gpio2 16 GPIO_ACTIVE_HIGH>;
 766                         status = "disabled";
 767                 };
 768
 769                 i2c5: i2c@2050000 {
 770                         compatible = "fsl,vf610-i2c";
 771                         #address-cells = <1>;
 772                         #size-cells = <0>;
 773                         reg = <0x0 0x2050000 0x0 0x10000>;
 774                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 775                         clock-names = "i2c";
 776                         clocks = <&clockgen 4 15>;
 777                         status = "disabled";
 778                 };
 779
 780                 i2c6: i2c@2060000 {
 781                         compatible = "fsl,vf610-i2c";
 782                         #address-cells = <1>;
 783                         #size-cells = <0>;
 784                         reg = <0x0 0x2060000 0x0 0x10000>;
 785                         interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 786                         clock-names = "i2c";
 787                         clocks = <&clockgen 4 15>;
 788                         status = "disabled";
 789                 };
 790
 791                 i2c7: i2c@2070000 {
 792                         compatible = "fsl,vf610-i2c";
 793                         #address-cells = <1>;
 794                         #size-cells = <0>;
 795                         reg = <0x0 0x2070000 0x0 0x10000>;
 796                         interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 797                         clock-names = "i2c";
 798                         clocks = <&clockgen 4 15>;
 799                         status = "disabled";
 800                 };
 801
 802                 fspi: spi@20c0000 {
 803                         compatible = "nxp,lx2160a-fspi";
 804                         #address-cells = <1>;
 805                         #size-cells = <0>;
 806                         reg = <0x0 0x20c0000 0x0 0x10000>,
 807                               <0x0 0x20000000 0x0 0x10000000>;
 808                         reg-names = "fspi_base", "fspi_mmap";
 809                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 810                         clocks = <&clockgen 4 3>, <&clockgen 4 3>;
 811                         clock-names = "fspi_en", "fspi";
 812                         status = "disabled";
 813                 };
 814
 815                 dspi0: spi@2100000 {
 816                         compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
 817                         #address-cells = <1>;
 818                         #size-cells = <0>;
 819                         reg = <0x0 0x2100000 0x0 0x10000>;
 820                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 821                         clocks = <&clockgen 4 7>;
 822                         clock-names = "dspi";
 823                         spi-num-chipselects = <5>;
 824                         bus-num = <0>;
 825                         status = "disabled";
 826                 };
 827
 828                 dspi1: spi@2110000 {
 829                         compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
 830                         #address-cells = <1>;
 831                         #size-cells = <0>;
 832                         reg = <0x0 0x2110000 0x0 0x10000>;
 833                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 834                         clocks = <&clockgen 4 7>;
 835                         clock-names = "dspi";
 836                         spi-num-chipselects = <5>;
 837                         bus-num = <1>;
 838                         status = "disabled";
 839                 };
 840
 841                 dspi2: spi@2120000 {
 842                         compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
 843                         #address-cells = <1>;
 844                         #size-cells = <0>;
 845                         reg = <0x0 0x2120000 0x0 0x10000>;
 846                         interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
 847                         clocks = <&clockgen 4 7>;
 848                         clock-names = "dspi";
 849                         spi-num-chipselects = <5>;
 850                         bus-num = <2>;
 851                         status = "disabled";
 852                 };
 853
 854                 esdhc0: esdhc@2140000 {
 855                         compatible = "fsl,esdhc";
 856                         reg = <0x0 0x2140000 0x0 0x10000>;
 857                         interrupts = <0 28 0x4>; /* Level high type */
 858                         clocks = <&clockgen 4 1>;
 859                         dma-coherent;
 860                         voltage-ranges = <1800 1800 3300 3300>;
 861                         sdhci,auto-cmd12;
 862                         little-endian;
 863                         bus-width = <4>;
 864                         status = "disabled";
 865                 };
 866
 867                 esdhc1: esdhc@2150000 {
 868                         compatible = "fsl,esdhc";
 869                         reg = <0x0 0x2150000 0x0 0x10000>;
 870                         interrupts = <0 63 0x4>; /* Level high type */
 871                         clocks = <&clockgen 4 1>;
 872                         dma-coherent;
 873                         voltage-ranges = <1800 1800 3300 3300>;
 874                         sdhci,auto-cmd12;
 875                         broken-cd;
 876                         little-endian;
 877                         bus-width = <4>;
 878                         status = "disabled";
 879                 };
 880
 881                 uart0: serial@21c0000 {
 882                         compatible = "arm,sbsa-uart","arm,pl011";
 883                         reg = <0x0 0x21c0000 0x0 0x1000>;
 884                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 885                         current-speed = <115200>;
 886                         status = "disabled";
 887                 };
 888
 889                 uart1: serial@21d0000 {
 890                         compatible = "arm,sbsa-uart","arm,pl011";
 891                         reg = <0x0 0x21d0000 0x0 0x1000>;
 892                         interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 893                         current-speed = <115200>;
 894                         status = "disabled";
 895                 };
 896
 897                 uart2: serial@21e0000 {
 898                         compatible = "arm,sbsa-uart","arm,pl011";
 899                         reg = <0x0 0x21e0000 0x0 0x1000>;
 900                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 901                         current-speed = <115200>;
 902                         status = "disabled";
 903                 };
 904
 905                 uart3: serial@21f0000 {
 906                         compatible = "arm,sbsa-uart","arm,pl011";
 907                         reg = <0x0 0x21f0000 0x0 0x1000>;
 908                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 909                         current-speed = <115200>;
 910                         status = "disabled";
 911                 };
 912
 913                 gpio0: gpio@2300000 {
 914                         compatible = "fsl,qoriq-gpio";
 915                         reg = <0x0 0x2300000 0x0 0x10000>;
 916                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 917                         gpio-controller;
 918                         little-endian;
 919                         #gpio-cells = <2>;
 920                         interrupt-controller;
 921                         #interrupt-cells = <2>;
 922                 };
 923
 924                 gpio1: gpio@2310000 {
 925                         compatible = "fsl,qoriq-gpio";
 926                         reg = <0x0 0x2310000 0x0 0x10000>;
 927                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 928                         gpio-controller;
 929                         little-endian;
 930                         #gpio-cells = <2>;
 931                         interrupt-controller;
 932                         #interrupt-cells = <2>;
 933                 };
 934
 935                 gpio2: gpio@2320000 {
 936                         compatible = "fsl,qoriq-gpio";
 937                         reg = <0x0 0x2320000 0x0 0x10000>;
 938                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 939                         gpio-controller;
 940                         little-endian;
 941                         #gpio-cells = <2>;
 942                         interrupt-controller;
 943                         #interrupt-cells = <2>;
 944                 };
 945
 946                 gpio3: gpio@2330000 {
 947                         compatible = "fsl,qoriq-gpio";
 948                         reg = <0x0 0x2330000 0x0 0x10000>;
 949                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 950                         gpio-controller;
 951                         little-endian;
 952                         #gpio-cells = <2>;
 953                         interrupt-controller;
 954                         #interrupt-cells = <2>;
 955                 };
 956
 957                 watchdog@23a0000 {
 958                         compatible = "arm,sbsa-gwdt";
 959                         reg = <0x0 0x23a0000 0 0x1000>,
 960                               <0x0 0x2390000 0 0x1000>;
 961                         interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
 962                         timeout-sec = <30>;
 963                 };
 964
 965                 rcpm: power-controller@1e34040 {
 966                         compatible = "fsl,lx2160a-rcpm", "fsl,qoriq-rcpm-2.1+";
 967                         reg = <0x0 0x1e34040 0x0 0x1c>;
 968                         #fsl,rcpm-wakeup-cells = <7>;
 969                         little-endian;
 970                 };
 971
 972                 ftm_alarm0: timer@2800000 {
 973                         compatible = "fsl,lx2160a-ftm-alarm";
 974                         reg = <0x0 0x2800000 0x0 0x10000>;
 975                         fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
 976                         interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 977                 };
 978
 979                 usb0: usb@3100000 {
 980                         compatible = "snps,dwc3";
 981                         reg = <0x0 0x3100000 0x0 0x10000>;
 982                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 983                         dr_mode = "host";
 984                         snps,quirk-frame-length-adjustment = <0x20>;
 985                         snps,dis_rxdet_inp3_quirk;
 986                         snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
 987                         status = "disabled";
 988                 };
 989
 990                 usb1: usb@3110000 {
 991                         compatible = "snps,dwc3";
 992                         reg = <0x0 0x3110000 0x0 0x10000>;
 993                         interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 994                         dr_mode = "host";
 995                         snps,quirk-frame-length-adjustment = <0x20>;
 996                         snps,dis_rxdet_inp3_quirk;
 997                         snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
 998                         status = "disabled";
 999                 };
1000
1001                 sata0: sata@3200000 {
1002                         compatible = "fsl,lx2160a-ahci";
1003                         reg = <0x0 0x3200000 0x0 0x10000>,
1004                               <0x7 0x100520 0x0 0x4>;
1005                         reg-names = "ahci", "sata-ecc";
1006                         interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
1007                         clocks = <&clockgen 4 3>;
1008                         dma-coherent;
1009                         status = "disabled";
1010                 };
1011
1012                 sata1: sata@3210000 {
1013                         compatible = "fsl,lx2160a-ahci";
1014                         reg = <0x0 0x3210000 0x0 0x10000>,
1015                               <0x7 0x100520 0x0 0x4>;
1016                         reg-names = "ahci", "sata-ecc";
1017                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
1018                         clocks = <&clockgen 4 3>;
1019                         dma-coherent;
1020                         status = "disabled";
1021                 };
1022
1023                 sata2: sata@3220000 {
1024                         compatible = "fsl,lx2160a-ahci";
1025                         reg = <0x0 0x3220000 0x0 0x10000>,
1026                               <0x7 0x100520 0x0 0x4>;
1027                         reg-names = "ahci", "sata-ecc";
1028                         interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
1029                         clocks = <&clockgen 4 3>;
1030                         dma-coherent;
1031                         status = "disabled";
1032                 };
1033
1034                 sata3: sata@3230000 {
1035                         compatible = "fsl,lx2160a-ahci";
1036                         reg = <0x0 0x3230000 0x0 0x10000>,
1037                               <0x7 0x100520 0x0 0x4>;
1038                         reg-names = "ahci", "sata-ecc";
1039                         interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
1040                         clocks = <&clockgen 4 3>;
1041                         dma-coherent;
1042                         status = "disabled";
1043                 };
1044
1045                 pcie1: pcie@3400000 {
1046                         compatible = "fsl,lx2160a-pcie";
1047                         reg = <0x00 0x03400000 0x0 0x00100000   /* controller registers */
1048                                0x80 0x00000000 0x0 0x00002000>; /* configuration space */
1049                         reg-names = "csr_axi_slave", "config_axi_slave";
1050                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
1051                                      <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
1052                                      <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
1053                         interrupt-names = "aer", "pme", "intr";
1054                         #address-cells = <3>;
1055                         #size-cells = <2>;
1056                         device_type = "pci";
1057                         dma-coherent;
1058                         apio-wins = <8>;
1059                         ppio-wins = <8>;
1060                         bus-range = <0x0 0xff>;
1061                         ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1062                         msi-parent = <&its>;
1063                         #interrupt-cells = <1>;
1064                         interrupt-map-mask = <0 0 0 7>;
1065                         interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
1066                                         <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
1067                                         <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
1068                                         <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1069                         iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1070                         status = "disabled";
1071                 };
1072
1073                 pcie2: pcie@3500000 {
1074                         compatible = "fsl,lx2160a-pcie";
1075                         reg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */
1076                                0x88 0x00000000 0x0 0x00002000>; /* configuration space */
1077                         reg-names = "csr_axi_slave", "config_axi_slave";
1078                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
1079                                      <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
1080                                      <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
1081                         interrupt-names = "aer", "pme", "intr";
1082                         #address-cells = <3>;
1083                         #size-cells = <2>;
1084                         device_type = "pci";
1085                         dma-coherent;
1086                         apio-wins = <8>;
1087                         ppio-wins = <8>;
1088                         bus-range = <0x0 0xff>;
1089                         ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1090                         msi-parent = <&its>;
1091                         #interrupt-cells = <1>;
1092                         interrupt-map-mask = <0 0 0 7>;
1093                         interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
1094                                         <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
1095                                         <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1096                                         <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
1097                         iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1098                         status = "disabled";
1099                 };
1100
1101                 pcie3: pcie@3600000 {
1102                         compatible = "fsl,lx2160a-pcie";
1103                         reg = <0x00 0x03600000 0x0 0x00100000   /* controller registers */
1104                                0x90 0x00000000 0x0 0x00002000>; /* configuration space */
1105                         reg-names = "csr_axi_slave", "config_axi_slave";
1106                         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
1107                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
1108                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
1109                         interrupt-names = "aer", "pme", "intr";
1110                         #address-cells = <3>;
1111                         #size-cells = <2>;
1112                         device_type = "pci";
1113                         dma-coherent;
1114                         apio-wins = <256>;
1115                         ppio-wins = <24>;
1116                         bus-range = <0x0 0xff>;
1117                         ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1118                         msi-parent = <&its>;
1119                         #interrupt-cells = <1>;
1120                         interrupt-map-mask = <0 0 0 7>;
1121                         interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
1122                                         <0000 0 0 2 &gic 0 0 GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1123                                         <0000 0 0 3 &gic 0 0 GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1124                                         <0000 0 0 4 &gic 0 0 GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
1125                         iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1126                         status = "disabled";
1127                 };
1128
1129                 pcie4: pcie@3700000 {
1130                         compatible = "fsl,lx2160a-pcie";
1131                         reg = <0x00 0x03700000 0x0 0x00100000   /* controller registers */
1132                                0x98 0x00000000 0x0 0x00002000>; /* configuration space */
1133                         reg-names = "csr_axi_slave", "config_axi_slave";
1134                         interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
1135                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
1136                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
1137                         interrupt-names = "aer", "pme", "intr";
1138                         #address-cells = <3>;
1139                         #size-cells = <2>;
1140                         device_type = "pci";
1141                         dma-coherent;
1142                         apio-wins = <8>;
1143                         ppio-wins = <8>;
1144                         bus-range = <0x0 0xff>;
1145                         ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1146                         msi-parent = <&its>;
1147                         #interrupt-cells = <1>;
1148                         interrupt-map-mask = <0 0 0 7>;
1149                         interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1150                                         <0000 0 0 2 &gic 0 0 GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1151                                         <0000 0 0 3 &gic 0 0 GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1152                                         <0000 0 0 4 &gic 0 0 GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1153                         iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1154                         status = "disabled";
1155                 };
1156
1157                 pcie5: pcie@3800000 {
1158                         compatible = "fsl,lx2160a-pcie";
1159                         reg = <0x00 0x03800000 0x0 0x00100000   /* controller registers */
1160                                0xa0 0x00000000 0x0 0x00002000>; /* configuration space */
1161                         reg-names = "csr_axi_slave", "config_axi_slave";
1162                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
1163                                      <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
1164                                      <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
1165                         interrupt-names = "aer", "pme", "intr";
1166                         #address-cells = <3>;
1167                         #size-cells = <2>;
1168                         device_type = "pci";
1169                         dma-coherent;
1170                         apio-wins = <256>;
1171                         ppio-wins = <24>;
1172                         bus-range = <0x0 0xff>;
1173                         ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1174                         msi-parent = <&its>;
1175                         #interrupt-cells = <1>;
1176                         interrupt-map-mask = <0 0 0 7>;
1177                         interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
1178                                         <0000 0 0 2 &gic 0 0 GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
1179                                         <0000 0 0 3 &gic 0 0 GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
1180                                         <0000 0 0 4 &gic 0 0 GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
1181                         iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1182                         status = "disabled";
1183                 };
1184
1185                 pcie6: pcie@3900000 {
1186                         compatible = "fsl,lx2160a-pcie";
1187                         reg = <0x00 0x03900000 0x0 0x00100000   /* controller registers */
1188                                0xa8 0x00000000 0x0 0x00002000>; /* configuration space */
1189                         reg-names = "csr_axi_slave", "config_axi_slave";
1190                         interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */
1191                                      <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
1192                                      <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
1193                         interrupt-names = "aer", "pme", "intr";
1194                         #address-cells = <3>;
1195                         #size-cells = <2>;
1196                         device_type = "pci";
1197                         dma-coherent;
1198                         apio-wins = <8>;
1199                         ppio-wins = <8>;
1200                         bus-range = <0x0 0xff>;
1201                         ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
1202                         msi-parent = <&its>;
1203                         #interrupt-cells = <1>;
1204                         interrupt-map-mask = <0 0 0 7>;
1205                         interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
1206                                         <0000 0 0 2 &gic 0 0 GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
1207                                         <0000 0 0 3 &gic 0 0 GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
1208                                         <0000 0 0 4 &gic 0 0 GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1209                         iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
1210                         status = "disabled";
1211                 };
1212
1213                 smmu: iommu@5000000 {
1214                         compatible = "arm,mmu-500";
1215                         reg = <0 0x5000000 0 0x800000>;
1216                         #iommu-cells = <1>;
1217                         #global-interrupts = <14>;
1218                                      // global secure fault
1219                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
1220                                      // combined secure
1221                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
1222                                      // global non-secure fault
1223                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
1224                                      // combined non-secure
1225                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
1226                                      // performance counter interrupts 0-9
1227                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
1228                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
1229                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
1230                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
1231                                      <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
1232                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
1233                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
1234                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
1235                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
1236                                      <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
1237                                      // per context interrupt, 64 interrupts
1238                                      <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
1239                                      <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
1240                                      <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1241                                      <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1242                                      <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
1243                                      <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
1244                                      <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
1245                                      <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
1246                                      <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
1247                                      <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
1248                                      <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
1249                                      <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
1250                                      <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
1251                                      <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
1252                                      <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
1253                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
1254                                      <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
1255                                      <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
1256                                      <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
1257                                      <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
1258                                      <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
1259                                      <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
1260                                      <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
1261                                      <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
1262                                      <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
1263                                      <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>,
1264                                      <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>,
1265                                      <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>,
1266                                      <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
1267                                      <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>,
1268                                      <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
1269                                      <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>,
1270                                      <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
1271                                      <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
1272                                      <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
1273                                      <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
1274                                      <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
1275                                      <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
1276                                      <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
1277                                      <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
1278                                      <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
1279                                      <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
1280                                      <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
1281                                      <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
1282                                      <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
1283                                      <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
1284                                      <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
1285                                      <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>,
1286                                      <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>,
1287                                      <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
1288                                      <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1289                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
1290                                      <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1291                                      <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
1292                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
1293                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
1294                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
1295                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
1296                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
1297                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
1298                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
1299                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
1300                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
1301                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
1302                         dma-coherent;
1303                 };
1304
1305                 console@8340020 {
1306                         compatible = "fsl,dpaa2-console";
1307                         reg = <0x00000000 0x08340020 0 0x2>;
1308                 };
1309
1310                 ptp-timer@8b95000 {
1311                         compatible = "fsl,dpaa2-ptp";
1312                         reg = <0x0 0x8b95000 0x0 0x100>;
1313                         clocks = <&clockgen 4 1>;
1314                         little-endian;
1315                         fsl,extts-fifo;
1316                 };
1317
1318                 /* WRIOP0: 0x8b8_0000, E-MDIO1: 0x1_6000 */
1319                 emdio1: mdio@8b96000 {
1320                         compatible = "fsl,fman-memac-mdio";
1321                         reg = <0x0 0x8b96000 0x0 0x1000>;
1322                         interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
1323                         #address-cells = <1>;
1324                         #size-cells = <0>;
1325                         little-endian;
1326                         status = "disabled";
1327                 };
1328
1329                 emdio2: mdio@8b97000 {
1330                         compatible = "fsl,fman-memac-mdio";
1331                         reg = <0x0 0x8b97000 0x0 0x1000>;
1332                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
1333                         little-endian;
1334                         #address-cells = <1>;
1335                         #size-cells = <0>;
1336                         status = "disabled";
1337                 };
1338
1339                 pcs_mdio1: mdio@8c07000 {
1340                         compatible = "fsl,fman-memac-mdio";
1341                         reg = <0x0 0x8c07000 0x0 0x1000>;
1342                         little-endian;
1343                         #address-cells = <1>;
1344                         #size-cells = <0>;
1345                         status = "disabled";
1346
1347                         pcs1: ethernet-phy@0 {
1348                                 reg = <0>;
1349                         };
1350                 };
1351
1352                 pcs_mdio2: mdio@8c0b000 {
1353                         compatible = "fsl,fman-memac-mdio";
1354                         reg = <0x0 0x8c0b000 0x0 0x1000>;
1355                         little-endian;
1356                         #address-cells = <1>;
1357                         #size-cells = <0>;
1358                         status = "disabled";
1359
1360                         pcs2: ethernet-phy@0 {
1361                                 reg = <0>;
1362                         };
1363                 };
1364
1365                 pcs_mdio3: mdio@8c0f000 {
1366                         compatible = "fsl,fman-memac-mdio";
1367                         reg = <0x0 0x8c0f000 0x0 0x1000>;
1368                         little-endian;
1369                         #address-cells = <1>;
1370                         #size-cells = <0>;
1371                         status = "disabled";
1372
1373                         pcs3: ethernet-phy@0 {
1374                                 reg = <0>;
1375                         };
1376                 };
1377
1378                 pcs_mdio4: mdio@8c13000 {
1379                         compatible = "fsl,fman-memac-mdio";
1380                         reg = <0x0 0x8c13000 0x0 0x1000>;
1381                         little-endian;
1382                         #address-cells = <1>;
1383                         #size-cells = <0>;
1384                         status = "disabled";
1385
1386                         pcs4: ethernet-phy@0 {
1387                                 reg = <0>;
1388                         };
1389                 };
1390
1391                 pcs_mdio5: mdio@8c17000 {
1392                         compatible = "fsl,fman-memac-mdio";
1393                         reg = <0x0 0x8c17000 0x0 0x1000>;
1394                         little-endian;
1395                         #address-cells = <1>;
1396                         #size-cells = <0>;
1397                         status = "disabled";
1398
1399                         pcs5: ethernet-phy@0 {
1400                                 reg = <0>;
1401                         };
1402                 };
1403
1404                 pcs_mdio6: mdio@8c1b000 {
1405                         compatible = "fsl,fman-memac-mdio";
1406                         reg = <0x0 0x8c1b000 0x0 0x1000>;
1407                         little-endian;
1408                         #address-cells = <1>;
1409                         #size-cells = <0>;
1410                         status = "disabled";
1411
1412                         pcs6: ethernet-phy@0 {
1413                                 reg = <0>;
1414                         };
1415                 };
1416
1417                 pcs_mdio7: mdio@8c1f000 {
1418                         compatible = "fsl,fman-memac-mdio";
1419                         reg = <0x0 0x8c1f000 0x0 0x1000>;
1420                         little-endian;
1421                         #address-cells = <1>;
1422                         #size-cells = <0>;
1423                         status = "disabled";
1424
1425                         pcs7: ethernet-phy@0 {
1426                                 reg = <0>;
1427                         };
1428                 };
1429
1430                 pcs_mdio8: mdio@8c23000 {
1431                         compatible = "fsl,fman-memac-mdio";
1432                         reg = <0x0 0x8c23000 0x0 0x1000>;
1433                         little-endian;
1434                         #address-cells = <1>;
1435                         #size-cells = <0>;
1436                         status = "disabled";
1437
1438                         pcs8: ethernet-phy@0 {
1439                                 reg = <0>;
1440                         };
1441                 };
1442
1443                 pcs_mdio9: mdio@8c27000 {
1444                         compatible = "fsl,fman-memac-mdio";
1445                         reg = <0x0 0x8c27000 0x0 0x1000>;
1446                         little-endian;
1447                         #address-cells = <1>;
1448                         #size-cells = <0>;
1449                         status = "disabled";
1450
1451                         pcs9: ethernet-phy@0 {
1452                                 reg = <0>;
1453                         };
1454                 };
1455
1456                 pcs_mdio10: mdio@8c2b000 {
1457                         compatible = "fsl,fman-memac-mdio";
1458                         reg = <0x0 0x8c2b000 0x0 0x1000>;
1459                         little-endian;
1460                         #address-cells = <1>;
1461                         #size-cells = <0>;
1462                         status = "disabled";
1463
1464                         pcs10: ethernet-phy@0 {
1465                                 reg = <0>;
1466                         };
1467                 };
1468
1469                 pcs_mdio11: mdio@8c2f000 {
1470                         compatible = "fsl,fman-memac-mdio";
1471                         reg = <0x0 0x8c2f000 0x0 0x1000>;
1472                         little-endian;
1473                         #address-cells = <1>;
1474                         #size-cells = <0>;
1475                         status = "disabled";
1476
1477                         pcs11: ethernet-phy@0 {
1478                                 reg = <0>;
1479                         };
1480                 };
1481
1482                 pcs_mdio12: mdio@8c33000 {
1483                         compatible = "fsl,fman-memac-mdio";
1484                         reg = <0x0 0x8c33000 0x0 0x1000>;
1485                         little-endian;
1486                         #address-cells = <1>;
1487                         #size-cells = <0>;
1488                         status = "disabled";
1489
1490                         pcs12: ethernet-phy@0 {
1491                                 reg = <0>;
1492                         };
1493                 };
1494
1495                 pcs_mdio13: mdio@8c37000 {
1496                         compatible = "fsl,fman-memac-mdio";
1497                         reg = <0x0 0x8c37000 0x0 0x1000>;
1498                         little-endian;
1499                         #address-cells = <1>;
1500                         #size-cells = <0>;
1501                         status = "disabled";
1502
1503                         pcs13: ethernet-phy@0 {
1504                                 reg = <0>;
1505                         };
1506                 };
1507
1508                 pcs_mdio14: mdio@8c3b000 {
1509                         compatible = "fsl,fman-memac-mdio";
1510                         reg = <0x0 0x8c3b000 0x0 0x1000>;
1511                         little-endian;
1512                         #address-cells = <1>;
1513                         #size-cells = <0>;
1514                         status = "disabled";
1515
1516                         pcs14: ethernet-phy@0 {
1517                                 reg = <0>;
1518                         };
1519                 };
1520
1521                 pcs_mdio15: mdio@8c3f000 {
1522                         compatible = "fsl,fman-memac-mdio";
1523                         reg = <0x0 0x8c3f000 0x0 0x1000>;
1524                         little-endian;
1525                         #address-cells = <1>;
1526                         #size-cells = <0>;
1527                         status = "disabled";
1528
1529                         pcs15: ethernet-phy@0 {
1530                                 reg = <0>;
1531                         };
1532                 };
1533
1534                 pcs_mdio16: mdio@8c43000 {
1535                         compatible = "fsl,fman-memac-mdio";
1536                         reg = <0x0 0x8c43000 0x0 0x1000>;
1537                         little-endian;
1538                         #address-cells = <1>;
1539                         #size-cells = <0>;
1540                         status = "disabled";
1541
1542                         pcs16: ethernet-phy@0 {
1543                                 reg = <0>;
1544                         };
1545                 };
1546
1547                 pcs_mdio17: mdio@8c47000 {
1548                         compatible = "fsl,fman-memac-mdio";
1549                         reg = <0x0 0x8c47000 0x0 0x1000>;
1550                         little-endian;
1551                         #address-cells = <1>;
1552                         #size-cells = <0>;
1553                         status = "disabled";
1554
1555                         pcs17: ethernet-phy@0 {
1556                                 reg = <0>;
1557                         };
1558                 };
1559
1560                 pcs_mdio18: mdio@8c4b000 {
1561                         compatible = "fsl,fman-memac-mdio";
1562                         reg = <0x0 0x8c4b000 0x0 0x1000>;
1563                         little-endian;
1564                         #address-cells = <1>;
1565                         #size-cells = <0>;
1566                         status = "disabled";
1567
1568                         pcs18: ethernet-phy@0 {
1569                                 reg = <0>;
1570                         };
1571                 };
1572
1573                 fsl_mc: fsl-mc@80c000000 {
1574                         compatible = "fsl,qoriq-mc";
1575                         reg = <0x00000008 0x0c000000 0 0x40>,
1576                               <0x00000000 0x08340000 0 0x40000>;
1577                         msi-parent = <&its>;
1578                         /* iommu-map property is fixed up by u-boot */
1579                         iommu-map = <0 &smmu 0 0>;
1580                         dma-coherent;
1581                         #address-cells = <3>;
1582                         #size-cells = <1>;
1583
1584                         /*
1585                          * Region type 0x0 - MC portals
1586                          * Region type 0x1 - QBMAN portals
1587                          */
1588                         ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
1589                                   0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
1590
1591                         /*
1592                          * Define the maximum number of MACs present on the SoC.
1593                          */
1594                         dpmacs {
1595                                 #address-cells = <1>;
1596                                 #size-cells = <0>;
1597
1598                                 dpmac1: ethernet@1 {
1599                                         compatible = "fsl,qoriq-mc-dpmac";
1600                                         reg = <0x1>;
1601                                         pcs-handle = <&pcs1>;
1602                                 };
1603
1604                                 dpmac2: ethernet@2 {
1605                                         compatible = "fsl,qoriq-mc-dpmac";
1606                                         reg = <0x2>;
1607                                         pcs-handle = <&pcs2>;
1608                                 };
1609
1610                                 dpmac3: ethernet@3 {
1611                                         compatible = "fsl,qoriq-mc-dpmac";
1612                                         reg = <0x3>;
1613                                         pcs-handle = <&pcs3>;
1614                                 };
1615
1616                                 dpmac4: ethernet@4 {
1617                                         compatible = "fsl,qoriq-mc-dpmac";
1618                                         reg = <0x4>;
1619                                         pcs-handle = <&pcs4>;
1620                                 };
1621
1622                                 dpmac5: ethernet@5 {
1623                                         compatible = "fsl,qoriq-mc-dpmac";
1624                                         reg = <0x5>;
1625                                         pcs-handle = <&pcs5>;
1626                                 };
1627
1628                                 dpmac6: ethernet@6 {
1629                                         compatible = "fsl,qoriq-mc-dpmac";
1630                                         reg = <0x6>;
1631                                         pcs-handle = <&pcs6>;
1632                                 };
1633
1634                                 dpmac7: ethernet@7 {
1635                                         compatible = "fsl,qoriq-mc-dpmac";
1636                                         reg = <0x7>;
1637                                         pcs-handle = <&pcs7>;
1638                                 };
1639
1640                                 dpmac8: ethernet@8 {
1641                                         compatible = "fsl,qoriq-mc-dpmac";
1642                                         reg = <0x8>;
1643                                         pcs-handle = <&pcs8>;
1644                                 };
1645
1646                                 dpmac9: ethernet@9 {
1647                                         compatible = "fsl,qoriq-mc-dpmac";
1648                                         reg = <0x9>;
1649                                         pcs-handle = <&pcs9>;
1650                                 };
1651
1652                                 dpmac10: ethernet@a {
1653                                         compatible = "fsl,qoriq-mc-dpmac";
1654                                         reg = <0xa>;
1655                                         pcs-handle = <&pcs10>;
1656                                 };
1657
1658                                 dpmac11: ethernet@b {
1659                                         compatible = "fsl,qoriq-mc-dpmac";
1660                                         reg = <0xb>;
1661                                         pcs-handle = <&pcs11>;
1662                                 };
1663
1664                                 dpmac12: ethernet@c {
1665                                         compatible = "fsl,qoriq-mc-dpmac";
1666                                         reg = <0xc>;
1667                                         pcs-handle = <&pcs12>;
1668                                 };
1669
1670                                 dpmac13: ethernet@d {
1671                                         compatible = "fsl,qoriq-mc-dpmac";
1672                                         reg = <0xd>;
1673                                         pcs-handle = <&pcs13>;
1674                                 };
1675
1676                                 dpmac14: ethernet@e {
1677                                         compatible = "fsl,qoriq-mc-dpmac";
1678                                         reg = <0xe>;
1679                                         pcs-handle = <&pcs14>;
1680                                 };
1681
1682                                 dpmac15: ethernet@f {
1683                                         compatible = "fsl,qoriq-mc-dpmac";
1684                                         reg = <0xf>;
1685                                         pcs-handle = <&pcs15>;
1686                                 };
1687
1688                                 dpmac16: ethernet@10 {
1689                                         compatible = "fsl,qoriq-mc-dpmac";
1690                                         reg = <0x10>;
1691                                         pcs-handle = <&pcs16>;
1692                                 };
1693
1694                                 dpmac17: ethernet@11 {
1695                                         compatible = "fsl,qoriq-mc-dpmac";
1696                                         reg = <0x11>;
1697                                         pcs-handle = <&pcs17>;
1698                                 };
1699
1700                                 dpmac18: ethernet@12 {
1701                                         compatible = "fsl,qoriq-mc-dpmac";
1702                                         reg = <0x12>;
1703                                         pcs-handle = <&pcs18>;
1704                                 };
1705                         };
1706                 };
1707         };
1708 };