1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
6 * Copyright 2018, 2020 NXP
8 * Mingkai Hu <Mingkai.hu@freescale.com>
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 compatible = "fsl,ls1043a";
17 interrupt-parent = <&gic>;
39 * We expect the enable-method for cpu's to be "psci", but this
40 * is dependent on the SoC FW, which will fill this in.
42 * Currently supported enable-method is psci v0.2
46 compatible = "arm,cortex-a53";
48 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
49 next-level-cache = <&l2>;
50 cpu-idle-states = <&CPU_PH20>;
56 compatible = "arm,cortex-a53";
58 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
59 next-level-cache = <&l2>;
60 cpu-idle-states = <&CPU_PH20>;
66 compatible = "arm,cortex-a53";
68 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
69 next-level-cache = <&l2>;
70 cpu-idle-states = <&CPU_PH20>;
76 compatible = "arm,cortex-a53";
78 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
79 next-level-cache = <&l2>;
80 cpu-idle-states = <&CPU_PH20>;
91 * PSCI node is not added default, U-boot will add missing
92 * parts if it determines to use PSCI.
94 entry-method = "psci";
97 compatible = "arm,idle-state";
98 idle-state-name = "PH20";
99 arm,psci-suspend-param = <0x0>;
100 entry-latency-us = <1000>;
101 exit-latency-us = <1000>;
102 min-residency-us = <3000>;
107 device_type = "memory";
108 reg = <0x0 0x80000000 0 0x80000000>;
109 /* DRAM space 1, size: 2GiB DRAM */
113 #address-cells = <2>;
117 bman_fbpr: bman-fbpr {
118 compatible = "shared-dma-pool";
119 size = <0 0x1000000>;
120 alignment = <0 0x1000000>;
125 compatible = "shared-dma-pool";
127 alignment = <0 0x400000>;
131 qman_pfdr: qman-pfdr {
132 compatible = "shared-dma-pool";
133 size = <0 0x2000000>;
134 alignment = <0 0x2000000>;
140 compatible = "fixed-clock";
142 clock-frequency = <100000000>;
143 clock-output-names = "sysclk";
147 compatible ="syscon-reboot";
155 polling-delay-passive = <1000>;
156 polling-delay = <5000>;
157 thermal-sensors = <&tmu 0>;
161 temperature = <85000>;
167 temperature = <95000>;
175 polling-delay-passive = <1000>;
176 polling-delay = <5000>;
177 thermal-sensors = <&tmu 1>;
181 temperature = <85000>;
187 temperature = <95000>;
195 polling-delay-passive = <1000>;
196 polling-delay = <5000>;
197 thermal-sensors = <&tmu 2>;
201 temperature = <85000>;
207 temperature = <95000>;
215 polling-delay-passive = <1000>;
216 polling-delay = <5000>;
217 thermal-sensors = <&tmu 3>;
220 core_cluster_alert: core-cluster-alert {
221 temperature = <85000>;
226 core_cluster_crit: core-cluster-crit {
227 temperature = <95000>;
235 trip = <&core_cluster_alert>;
237 <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
238 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
239 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
240 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
246 polling-delay-passive = <1000>;
247 polling-delay = <5000>;
248 thermal-sensors = <&tmu 4>;
252 temperature = <85000>;
258 temperature = <95000>;
267 compatible = "arm,armv8-timer";
268 interrupts = <1 13 0xf08>, /* Physical Secure PPI */
269 <1 14 0xf08>, /* Physical Non-Secure PPI */
270 <1 11 0xf08>, /* Virtual PPI */
271 <1 10 0xf08>; /* Hypervisor PPI */
276 compatible = "arm,armv8-pmuv3";
277 interrupts = <0 106 0x4>,
281 interrupt-affinity = <&cpu0>,
287 gic: interrupt-controller@1400000 {
288 compatible = "arm,gic-400";
289 #interrupt-cells = <3>;
290 interrupt-controller;
291 reg = <0x0 0x1401000 0 0x1000>, /* GICD */
292 <0x0 0x1402000 0 0x2000>, /* GICC */
293 <0x0 0x1404000 0 0x2000>, /* GICH */
294 <0x0 0x1406000 0 0x2000>; /* GICV */
295 interrupts = <1 9 0xf08>;
299 compatible = "simple-bus";
300 #address-cells = <2>;
304 clockgen: clocking@1ee1000 {
305 compatible = "fsl,ls1043a-clockgen";
306 reg = <0x0 0x1ee1000 0x0 0x1000>;
312 compatible = "fsl,ls1043a-scfg", "syscon";
313 reg = <0x0 0x1570000 0x0 0x10000>;
315 #address-cells = <1>;
317 ranges = <0x0 0x0 0x1570000 0x10000>;
319 extirq: interrupt-controller@1ac {
320 compatible = "fsl,ls1043a-extirq";
321 #interrupt-cells = <2>;
322 #address-cells = <0>;
323 interrupt-controller;
326 <0 0 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
327 <1 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
328 <2 0 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
329 <3 0 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
330 <4 0 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
331 <5 0 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
332 <6 0 &gic GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
333 <7 0 &gic GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
334 <8 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
335 <9 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
336 <10 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
337 <11 0 &gic GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
338 interrupt-map-mask = <0xffffffff 0x0>;
342 crypto: crypto@1700000 {
343 compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
346 #address-cells = <1>;
348 ranges = <0x0 0x00 0x1700000 0x100000>;
349 reg = <0x00 0x1700000 0x0 0x100000>;
350 interrupts = <0 75 0x4>;
354 compatible = "fsl,sec-v5.4-job-ring",
355 "fsl,sec-v5.0-job-ring",
356 "fsl,sec-v4.0-job-ring";
357 reg = <0x10000 0x10000>;
358 interrupts = <0 71 0x4>;
362 compatible = "fsl,sec-v5.4-job-ring",
363 "fsl,sec-v5.0-job-ring",
364 "fsl,sec-v4.0-job-ring";
365 reg = <0x20000 0x10000>;
366 interrupts = <0 72 0x4>;
370 compatible = "fsl,sec-v5.4-job-ring",
371 "fsl,sec-v5.0-job-ring",
372 "fsl,sec-v4.0-job-ring";
373 reg = <0x30000 0x10000>;
374 interrupts = <0 73 0x4>;
378 compatible = "fsl,sec-v5.4-job-ring",
379 "fsl,sec-v5.0-job-ring",
380 "fsl,sec-v4.0-job-ring";
381 reg = <0x40000 0x10000>;
382 interrupts = <0 74 0x4>;
387 compatible = "fsl,ls1043a-dcfg", "syscon";
388 reg = <0x0 0x1ee0000 0x0 0x10000>;
393 compatible = "fsl,ifc", "simple-bus";
394 reg = <0x0 0x1530000 0x0 0x10000>;
395 interrupts = <0 43 0x4>;
399 compatible = "fsl,ls1043a-qspi", "fsl,ls1021a-qspi";
400 #address-cells = <1>;
402 reg = <0x0 0x1550000 0x0 0x10000>,
403 <0x0 0x40000000 0x0 0x4000000>;
404 reg-names = "QuadSPI", "QuadSPI-memory";
405 interrupts = <0 99 0x4>;
406 clock-names = "qspi_en", "qspi";
407 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
408 QORIQ_CLK_PLL_DIV(1)>,
409 <&clockgen QORIQ_CLK_PLATFORM_PLL
410 QORIQ_CLK_PLL_DIV(1)>;
414 esdhc: esdhc@1560000 {
415 compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";
416 reg = <0x0 0x1560000 0x0 0x10000>;
417 interrupts = <0 62 0x4>;
418 clock-frequency = <0>;
419 voltage-ranges = <1800 1800 3300 3300>;
425 ddr: memory-controller@1080000 {
426 compatible = "fsl,qoriq-memory-controller";
427 reg = <0x0 0x1080000 0x0 0x1000>;
428 interrupts = <0 144 0x4>;
433 compatible = "fsl,qoriq-tmu";
434 reg = <0x0 0x1f00000 0x0 0x10000>;
435 interrupts = <0 33 0x4>;
436 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>;
437 fsl,tmu-calibration = <0x00000000 0x00000023
438 0x00000001 0x0000002a
439 0x00000002 0x00000031
440 0x00000003 0x00000037
441 0x00000004 0x0000003e
442 0x00000005 0x00000044
443 0x00000006 0x0000004b
444 0x00000007 0x00000051
445 0x00000008 0x00000058
446 0x00000009 0x0000005e
447 0x0000000a 0x00000065
448 0x0000000b 0x0000006b
450 0x00010000 0x00000023
451 0x00010001 0x0000002b
452 0x00010002 0x00000033
453 0x00010003 0x0000003b
454 0x00010004 0x00000043
455 0x00010005 0x0000004b
456 0x00010006 0x00000054
457 0x00010007 0x0000005c
458 0x00010008 0x00000064
459 0x00010009 0x0000006c
461 0x00020000 0x00000021
462 0x00020001 0x0000002c
463 0x00020002 0x00000036
464 0x00020003 0x00000040
465 0x00020004 0x0000004b
466 0x00020005 0x00000055
467 0x00020006 0x0000005f
469 0x00030000 0x00000013
470 0x00030001 0x0000001d
471 0x00030002 0x00000028
472 0x00030003 0x00000032
473 0x00030004 0x0000003d
474 0x00030005 0x00000047
475 0x00030006 0x00000052
476 0x00030007 0x0000005c>;
477 #thermal-sensor-cells = <1>;
481 compatible = "fsl,qman";
482 reg = <0x0 0x1880000 0x0 0x10000>;
483 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
484 memory-region = <&qman_fqd &qman_pfdr>;
488 compatible = "fsl,bman";
489 reg = <0x0 0x1890000 0x0 0x10000>;
490 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
491 memory-region = <&bman_fbpr>;
494 bportals: bman-portals@508000000 {
495 ranges = <0x0 0x5 0x08000000 0x8000000>;
498 qportals: qman-portals@500000000 {
499 ranges = <0x0 0x5 0x00000000 0x8000000>;
503 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
504 #address-cells = <1>;
506 reg = <0x0 0x2100000 0x0 0x10000>;
507 interrupts = <0 64 0x4>;
508 clock-names = "dspi";
509 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
510 QORIQ_CLK_PLL_DIV(1)>;
511 spi-num-chipselects = <5>;
517 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
518 #address-cells = <1>;
520 reg = <0x0 0x2110000 0x0 0x10000>;
521 interrupts = <0 65 0x4>;
522 clock-names = "dspi";
523 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
524 QORIQ_CLK_PLL_DIV(1)>;
525 spi-num-chipselects = <5>;
531 compatible = "fsl,vf610-i2c";
532 #address-cells = <1>;
534 reg = <0x0 0x2180000 0x0 0x10000>;
535 interrupts = <0 56 0x4>;
537 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
538 QORIQ_CLK_PLL_DIV(1)>;
539 dmas = <&edma0 1 39>,
541 dma-names = "tx", "rx";
546 compatible = "fsl,vf610-i2c";
547 #address-cells = <1>;
549 reg = <0x0 0x2190000 0x0 0x10000>;
550 interrupts = <0 57 0x4>;
552 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
553 QORIQ_CLK_PLL_DIV(1)>;
558 compatible = "fsl,vf610-i2c";
559 #address-cells = <1>;
561 reg = <0x0 0x21a0000 0x0 0x10000>;
562 interrupts = <0 58 0x4>;
564 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
565 QORIQ_CLK_PLL_DIV(1)>;
570 compatible = "fsl,vf610-i2c";
571 #address-cells = <1>;
573 reg = <0x0 0x21b0000 0x0 0x10000>;
574 interrupts = <0 59 0x4>;
576 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
577 QORIQ_CLK_PLL_DIV(1)>;
581 duart0: serial@21c0500 {
582 compatible = "fsl,ns16550", "ns16550a";
583 reg = <0x00 0x21c0500 0x0 0x100>;
584 interrupts = <0 54 0x4>;
585 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
586 QORIQ_CLK_PLL_DIV(1)>;
589 duart1: serial@21c0600 {
590 compatible = "fsl,ns16550", "ns16550a";
591 reg = <0x00 0x21c0600 0x0 0x100>;
592 interrupts = <0 54 0x4>;
593 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
594 QORIQ_CLK_PLL_DIV(1)>;
597 duart2: serial@21d0500 {
598 compatible = "fsl,ns16550", "ns16550a";
599 reg = <0x0 0x21d0500 0x0 0x100>;
600 interrupts = <0 55 0x4>;
601 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
602 QORIQ_CLK_PLL_DIV(1)>;
605 duart3: serial@21d0600 {
606 compatible = "fsl,ns16550", "ns16550a";
607 reg = <0x0 0x21d0600 0x0 0x100>;
608 interrupts = <0 55 0x4>;
609 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
610 QORIQ_CLK_PLL_DIV(1)>;
613 gpio1: gpio@2300000 {
614 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
615 reg = <0x0 0x2300000 0x0 0x10000>;
616 interrupts = <0 66 0x4>;
619 interrupt-controller;
620 #interrupt-cells = <2>;
623 gpio2: gpio@2310000 {
624 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
625 reg = <0x0 0x2310000 0x0 0x10000>;
626 interrupts = <0 67 0x4>;
629 interrupt-controller;
630 #interrupt-cells = <2>;
633 gpio3: gpio@2320000 {
634 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
635 reg = <0x0 0x2320000 0x0 0x10000>;
636 interrupts = <0 68 0x4>;
639 interrupt-controller;
640 #interrupt-cells = <2>;
643 gpio4: gpio@2330000 {
644 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
645 reg = <0x0 0x2330000 0x0 0x10000>;
646 interrupts = <0 134 0x4>;
649 interrupt-controller;
650 #interrupt-cells = <2>;
654 #address-cells = <1>;
656 compatible = "fsl,qe", "simple-bus";
657 ranges = <0x0 0x0 0x2400000 0x40000>;
658 reg = <0x0 0x2400000 0x0 0x480>;
659 brg-frequency = <100000000>;
660 bus-frequency = <200000000>;
661 fsl,qe-num-riscs = <1>;
662 fsl,qe-num-snums = <28>;
665 compatible = "fsl,qe-ic";
667 #address-cells = <0>;
668 interrupt-controller;
669 #interrupt-cells = <1>;
670 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
671 <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
675 #address-cells = <1>;
677 compatible = "fsl,ls1043-qe-si",
683 #address-cells = <1>;
685 compatible = "fsl,ls1043-qe-siram",
686 "fsl,t1040-qe-siram";
687 reg = <0x1000 0x800>;
692 reg = <0x2000 0x200>;
694 interrupt-parent = <&qeic>;
699 reg = <0x2200 0x200>;
701 interrupt-parent = <&qeic>;
705 #address-cells = <1>;
707 compatible = "fsl,qe-muram", "fsl,cpm-muram";
708 ranges = <0x0 0x10000 0x6000>;
711 compatible = "fsl,qe-muram-data",
712 "fsl,cpm-muram-data";
718 lpuart0: serial@2950000 {
719 compatible = "fsl,ls1021a-lpuart";
720 reg = <0x0 0x2950000 0x0 0x1000>;
721 interrupts = <0 48 0x4>;
722 clocks = <&clockgen QORIQ_CLK_SYSCLK 0>;
727 lpuart1: serial@2960000 {
728 compatible = "fsl,ls1021a-lpuart";
729 reg = <0x0 0x2960000 0x0 0x1000>;
730 interrupts = <0 49 0x4>;
731 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
732 QORIQ_CLK_PLL_DIV(1)>;
737 lpuart2: serial@2970000 {
738 compatible = "fsl,ls1021a-lpuart";
739 reg = <0x0 0x2970000 0x0 0x1000>;
740 interrupts = <0 50 0x4>;
741 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
742 QORIQ_CLK_PLL_DIV(1)>;
747 lpuart3: serial@2980000 {
748 compatible = "fsl,ls1021a-lpuart";
749 reg = <0x0 0x2980000 0x0 0x1000>;
750 interrupts = <0 51 0x4>;
751 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
752 QORIQ_CLK_PLL_DIV(1)>;
757 lpuart4: serial@2990000 {
758 compatible = "fsl,ls1021a-lpuart";
759 reg = <0x0 0x2990000 0x0 0x1000>;
760 interrupts = <0 52 0x4>;
761 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
762 QORIQ_CLK_PLL_DIV(1)>;
767 lpuart5: serial@29a0000 {
768 compatible = "fsl,ls1021a-lpuart";
769 reg = <0x0 0x29a0000 0x0 0x1000>;
770 interrupts = <0 53 0x4>;
771 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
772 QORIQ_CLK_PLL_DIV(1)>;
777 wdog0: watchdog@2ad0000 {
778 compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
779 reg = <0x0 0x2ad0000 0x0 0x10000>;
780 interrupts = <0 83 0x4>;
781 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
782 QORIQ_CLK_PLL_DIV(1)>;
783 clock-names = "wdog";
787 edma0: edma@2c00000 {
789 compatible = "fsl,vf610-edma";
790 reg = <0x0 0x2c00000 0x0 0x10000>,
791 <0x0 0x2c10000 0x0 0x10000>,
792 <0x0 0x2c20000 0x0 0x10000>;
793 interrupts = <0 103 0x4>,
795 interrupt-names = "edma-tx", "edma-err";
798 clock-names = "dmamux0", "dmamux1";
799 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
800 QORIQ_CLK_PLL_DIV(1)>,
801 <&clockgen QORIQ_CLK_PLATFORM_PLL
802 QORIQ_CLK_PLL_DIV(1)>;
806 compatible = "snps,dwc3";
807 reg = <0x0 0x2f00000 0x0 0x10000>;
808 interrupts = <0 60 0x4>;
810 snps,quirk-frame-length-adjustment = <0x20>;
811 snps,dis_rxdet_inp3_quirk;
812 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
817 compatible = "snps,dwc3";
818 reg = <0x0 0x3000000 0x0 0x10000>;
819 interrupts = <0 61 0x4>;
821 snps,quirk-frame-length-adjustment = <0x20>;
822 snps,dis_rxdet_inp3_quirk;
823 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
828 compatible = "snps,dwc3";
829 reg = <0x0 0x3100000 0x0 0x10000>;
830 interrupts = <0 63 0x4>;
832 snps,quirk-frame-length-adjustment = <0x20>;
833 snps,dis_rxdet_inp3_quirk;
834 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
839 compatible = "fsl,ls1043a-ahci";
840 reg = <0x0 0x3200000 0x0 0x10000>,
841 <0x0 0x20140520 0x0 0x4>;
842 reg-names = "ahci", "sata-ecc";
843 interrupts = <0 69 0x4>;
844 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
845 QORIQ_CLK_PLL_DIV(1)>;
849 msi1: msi-controller1@1571000 {
850 compatible = "fsl,ls1043a-msi";
851 reg = <0x0 0x1571000 0x0 0x8>;
853 interrupts = <0 116 0x4>;
856 msi2: msi-controller2@1572000 {
857 compatible = "fsl,ls1043a-msi";
858 reg = <0x0 0x1572000 0x0 0x8>;
860 interrupts = <0 126 0x4>;
863 msi3: msi-controller3@1573000 {
864 compatible = "fsl,ls1043a-msi";
865 reg = <0x0 0x1573000 0x0 0x8>;
867 interrupts = <0 160 0x4>;
870 pcie1: pcie@3400000 {
871 compatible = "fsl,ls1043a-pcie";
872 reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
873 <0x40 0x00000000 0x0 0x00002000>; /* configuration space */
874 reg-names = "regs", "config";
875 interrupts = <0 118 0x4>, /* controller interrupt */
876 <0 117 0x4>; /* PME interrupt */
877 interrupt-names = "intr", "pme";
878 #address-cells = <3>;
883 bus-range = <0x0 0xff>;
884 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
885 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
886 msi-parent = <&msi1>, <&msi2>, <&msi3>;
887 #interrupt-cells = <1>;
888 interrupt-map-mask = <0 0 0 7>;
889 interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
890 <0000 0 0 2 &gic 0 111 0x4>,
891 <0000 0 0 3 &gic 0 112 0x4>,
892 <0000 0 0 4 &gic 0 113 0x4>;
896 pcie2: pcie@3500000 {
897 compatible = "fsl,ls1043a-pcie";
898 reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
899 <0x48 0x00000000 0x0 0x00002000>; /* configuration space */
900 reg-names = "regs", "config";
901 interrupts = <0 128 0x4>,
903 interrupt-names = "intr", "pme";
904 #address-cells = <3>;
909 bus-range = <0x0 0xff>;
910 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
911 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
912 msi-parent = <&msi1>, <&msi2>, <&msi3>;
913 #interrupt-cells = <1>;
914 interrupt-map-mask = <0 0 0 7>;
915 interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
916 <0000 0 0 2 &gic 0 121 0x4>,
917 <0000 0 0 3 &gic 0 122 0x4>,
918 <0000 0 0 4 &gic 0 123 0x4>;
922 pcie3: pcie@3600000 {
923 compatible = "fsl,ls1043a-pcie";
924 reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
925 <0x50 0x00000000 0x0 0x00002000>; /* configuration space */
926 reg-names = "regs", "config";
927 interrupts = <0 162 0x4>,
929 interrupt-names = "intr", "pme";
930 #address-cells = <3>;
935 bus-range = <0x0 0xff>;
936 ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
937 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
938 msi-parent = <&msi1>, <&msi2>, <&msi3>;
939 #interrupt-cells = <1>;
940 interrupt-map-mask = <0 0 0 7>;
941 interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
942 <0000 0 0 2 &gic 0 155 0x4>,
943 <0000 0 0 3 &gic 0 156 0x4>,
944 <0000 0 0 4 &gic 0 157 0x4>;
948 qdma: dma-controller@8380000 {
949 compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
950 reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
951 <0x0 0x8390000 0x0 0x10000>, /* Status regs */
952 <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
953 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
954 <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
955 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
956 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
957 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
958 interrupt-names = "qdma-error", "qdma-queue0",
959 "qdma-queue1", "qdma-queue2", "qdma-queue3";
962 block-offset = <0x10000>;
963 fsl,dma-queues = <2>;
965 queue-sizes = <64 64>;
969 rcpm: power-controller@1ee2140 {
970 compatible = "fsl,ls1043a-rcpm", "fsl,qoriq-rcpm-2.1+";
971 reg = <0x0 0x1ee2140 0x0 0x4>;
972 #fsl,rcpm-wakeup-cells = <1>;
975 ftm_alarm0: timer@29d0000 {
976 compatible = "fsl,ls1043a-ftm-alarm";
977 reg = <0x0 0x29d0000 0x0 0x10000>;
978 fsl,rcpm-wakeup = <&rcpm 0x20000>;
979 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
986 compatible = "linaro,optee-tz";
993 #include "qoriq-qman-portals.dtsi"
994 #include "qoriq-bman-portals.dtsi"