1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for NXP LS1028A QDS Board.
7 * Harninder Rai <harninder.rai@nxp.com>
13 #include "fsl-ls1028a.dtsi"
16 model = "LS1028A QDS Board";
17 compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
32 stdout-path = "serial0:115200n8";
36 device_type = "memory";
37 reg = <0x0 0x80000000 0x1 0x00000000>;
40 sys_mclk: clock-mclk {
41 compatible = "fixed-clock";
43 clock-frequency = <25000000>;
46 reg_1p8v: regulator-1p8v {
47 compatible = "regulator-fixed";
48 regulator-name = "1P8V";
49 regulator-min-microvolt = <1800000>;
50 regulator-max-microvolt = <1800000>;
54 sb_3v3: regulator-sb3v3 {
55 compatible = "regulator-fixed";
56 regulator-name = "3v3_vbus";
57 regulator-min-microvolt = <3300000>;
58 regulator-max-microvolt = <3300000>;
64 compatible = "simple-audio-card";
65 simple-audio-card,format = "i2s";
66 simple-audio-card,widgets =
67 "Microphone", "Microphone Jack",
68 "Headphone", "Headphone Jack",
69 "Speaker", "Speaker Ext",
70 "Line", "Line In Jack";
71 simple-audio-card,routing =
72 "MIC_IN", "Microphone Jack",
73 "Microphone Jack", "Mic Bias",
74 "LINE_IN", "Line In Jack",
75 "Headphone Jack", "HP_OUT",
76 "Speaker Ext", "LINE_OUT";
78 simple-audio-card,cpu {
84 simple-audio-card,codec {
85 sound-dai = <&sgtl5000>;
88 system-clock-frequency = <25000000>;
93 compatible = "mdio-mux-multiplexer";
94 mux-controls = <&mux 0>;
95 mdio-parent-bus = <&enetc_mdio_pf3>;
99 /* on-board RGMII PHY */
101 #address-cells = <1>;
105 qds_phy1: ethernet-phy@5 {
126 #address-cells = <1>;
128 compatible = "jedec,spi-nor";
132 spi-max-frequency = <10000000>;
136 #address-cells = <1>;
138 compatible = "jedec,spi-nor";
142 spi-max-frequency = <10000000>;
146 #address-cells = <1>;
148 compatible = "jedec,spi-nor";
152 spi-max-frequency = <10000000>;
161 #address-cells = <1>;
163 compatible = "jedec,spi-nor";
167 spi-max-frequency = <10000000>;
171 #address-cells = <1>;
173 compatible = "jedec,spi-nor";
177 spi-max-frequency = <10000000>;
181 #address-cells = <1>;
183 compatible = "jedec,spi-nor";
187 spi-max-frequency = <10000000>;
196 #address-cells = <1>;
198 compatible = "jedec,spi-nor";
202 spi-max-frequency = <10000000>;
225 mt35xu02g0: flash@0 {
226 compatible = "jedec,spi-nor";
227 #address-cells = <1>;
229 spi-max-frequency = <50000000>;
230 /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
231 spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
232 spi-tx-bus-width = <1>; /* 1 SPI Tx line */
241 compatible = "nxp,pca9547";
243 #address-cells = <1>;
247 #address-cells = <1>;
252 compatible = "ti,ina220";
254 shunt-resistor = <1000>;
258 compatible = "ti,ina220";
260 shunt-resistor = <1000>;
265 #address-cells = <1>;
269 temperature-sensor@4c {
270 compatible = "nxp,sa56004";
272 vcc-supply = <&sb_3v3>;
276 compatible = "nxp,pcf2129";
281 compatible = "atmel,24c512";
286 compatible = "atmel,24c512";
292 #address-cells = <1>;
296 sgtl5000: audio-codec@a {
297 #sound-dai-cells = <0>;
298 compatible = "fsl,sgtl5000";
300 VDDA-supply = <®_1p8v>;
301 VDDIO-supply = <®_1p8v>;
302 clocks = <&sys_mclk>;
308 compatible = "fsl,ls1028aqds-fpga", "fsl,fpga-qixis-i2c",
312 mux: mux-controller {
313 compatible = "reg-mux";
314 #mux-control-cells = <1>;
315 mux-reg-masks = <0x54 0xf0>; /* 0: reg 0x54, bits 7:4 */
322 phy-handle = <&qds_phy1>;
323 phy-connection-type = "rgmii-id";