1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for NXP LS1028A QDS Board.
7 * Harninder Rai <harninder.rai@nxp.com>
13 #include "fsl-ls1028a.dtsi"
16 model = "LS1028A QDS Board";
17 compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
29 stdout-path = "serial0:115200n8";
33 device_type = "memory";
34 reg = <0x0 0x80000000 0x1 0x00000000>;
37 sys_mclk: clock-mclk {
38 compatible = "fixed-clock";
40 clock-frequency = <25000000>;
43 reg_1p8v: regulator-1p8v {
44 compatible = "regulator-fixed";
45 regulator-name = "1P8V";
46 regulator-min-microvolt = <1800000>;
47 regulator-max-microvolt = <1800000>;
51 sb_3v3: regulator-sb3v3 {
52 compatible = "regulator-fixed";
53 regulator-name = "3v3_vbus";
54 regulator-min-microvolt = <3300000>;
55 regulator-max-microvolt = <3300000>;
61 compatible = "simple-audio-card";
62 simple-audio-card,format = "i2s";
63 simple-audio-card,widgets =
64 "Microphone", "Microphone Jack",
65 "Headphone", "Headphone Jack",
66 "Speaker", "Speaker Ext",
67 "Line", "Line In Jack";
68 simple-audio-card,routing =
69 "MIC_IN", "Microphone Jack",
70 "Microphone Jack", "Mic Bias",
71 "LINE_IN", "Line In Jack",
72 "Headphone Jack", "HP_OUT",
73 "Speaker Ext", "LINE_OUT";
75 simple-audio-card,cpu {
81 simple-audio-card,codec {
82 sound-dai = <&sgtl5000>;
85 system-clock-frequency = <25000000>;
90 compatible = "mdio-mux-multiplexer";
91 mux-controls = <&mux 0>;
92 mdio-parent-bus = <&enetc_mdio_pf3>;
96 /* on-board RGMII PHY */
102 qds_phy1: ethernet-phy@5 {
115 #address-cells = <1>;
117 compatible = "jedec,spi-nor";
121 spi-max-frequency = <10000000>;
125 #address-cells = <1>;
127 compatible = "jedec,spi-nor";
131 spi-max-frequency = <10000000>;
135 #address-cells = <1>;
137 compatible = "jedec,spi-nor";
141 spi-max-frequency = <10000000>;
150 #address-cells = <1>;
152 compatible = "jedec,spi-nor";
156 spi-max-frequency = <10000000>;
160 #address-cells = <1>;
162 compatible = "jedec,spi-nor";
166 spi-max-frequency = <10000000>;
170 #address-cells = <1>;
172 compatible = "jedec,spi-nor";
176 spi-max-frequency = <10000000>;
185 #address-cells = <1>;
187 compatible = "jedec,spi-nor";
191 spi-max-frequency = <10000000>;
214 mt35xu02g0: flash@0 {
215 compatible = "jedec,spi-nor";
216 #address-cells = <1>;
218 spi-max-frequency = <50000000>;
219 /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
220 spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
221 spi-tx-bus-width = <1>; /* 1 SPI Tx line */
230 compatible = "nxp,pca9547";
232 #address-cells = <1>;
236 #address-cells = <1>;
241 compatible = "ti,ina220";
243 shunt-resistor = <1000>;
247 compatible = "ti,ina220";
249 shunt-resistor = <1000>;
254 #address-cells = <1>;
258 temperature-sensor@4c {
259 compatible = "nxp,sa56004";
261 vcc-supply = <&sb_3v3>;
265 compatible = "nxp,pcf2129";
270 compatible = "atmel,24c512";
275 compatible = "atmel,24c512";
281 #address-cells = <1>;
285 sgtl5000: audio-codec@a {
286 #sound-dai-cells = <0>;
287 compatible = "fsl,sgtl5000";
289 VDDA-supply = <®_1p8v>;
290 VDDIO-supply = <®_1p8v>;
291 clocks = <&sys_mclk>;
297 compatible = "fsl,ls1028aqds-fpga", "fsl,fpga-qixis-i2c",
301 mux: mux-controller {
302 compatible = "reg-mux";
303 #mux-control-cells = <1>;
304 mux-reg-masks = <0x54 0xf0>; /* 0: reg 0x54, bits 7:4 */
311 phy-handle = <&qds_phy1>;
312 phy-connection-type = "rgmii-id";