arch/arm64/boot/dts/apple/t8103.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
   2 /*
   3  * Apple T8103 "M1" SoC
   4  *
   5  * Other names: H13G, "Tonga"
   6  *
   7  * Copyright The Asahi Linux Contributors
   8  */
   9
  10 #include <dt-bindings/interrupt-controller/apple-aic.h>
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/pinctrl/apple.h>
  13
  14 / {
  15         compatible = "apple,t8103", "apple,arm-platform";
  16
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         cpus {
  21                 #address-cells = <2>;
  22                 #size-cells = <0>;
  23
  24                 cpu0: cpu@0 {
  25                         compatible = "apple,icestorm";
  26                         device_type = "cpu";
  27                         reg = <0x0 0x0>;
  28                         enable-method = "spin-table";
  29                         cpu-release-addr = <0 0>; /* To be filled by loader */
  30                 };
  31
  32                 cpu1: cpu@1 {
  33                         compatible = "apple,icestorm";
  34                         device_type = "cpu";
  35                         reg = <0x0 0x1>;
  36                         enable-method = "spin-table";
  37                         cpu-release-addr = <0 0>; /* To be filled by loader */
  38                 };
  39
  40                 cpu2: cpu@2 {
  41                         compatible = "apple,icestorm";
  42                         device_type = "cpu";
  43                         reg = <0x0 0x2>;
  44                         enable-method = "spin-table";
  45                         cpu-release-addr = <0 0>; /* To be filled by loader */
  46                 };
  47
  48                 cpu3: cpu@3 {
  49                         compatible = "apple,icestorm";
  50                         device_type = "cpu";
  51                         reg = <0x0 0x3>;
  52                         enable-method = "spin-table";
  53                         cpu-release-addr = <0 0>; /* To be filled by loader */
  54                 };
  55
  56                 cpu4: cpu@10100 {
  57                         compatible = "apple,firestorm";
  58                         device_type = "cpu";
  59                         reg = <0x0 0x10100>;
  60                         enable-method = "spin-table";
  61                         cpu-release-addr = <0 0>; /* To be filled by loader */
  62                 };
  63
  64                 cpu5: cpu@10101 {
  65                         compatible = "apple,firestorm";
  66                         device_type = "cpu";
  67                         reg = <0x0 0x10101>;
  68                         enable-method = "spin-table";
  69                         cpu-release-addr = <0 0>; /* To be filled by loader */
  70                 };
  71
  72                 cpu6: cpu@10102 {
  73                         compatible = "apple,firestorm";
  74                         device_type = "cpu";
  75                         reg = <0x0 0x10102>;
  76                         enable-method = "spin-table";
  77                         cpu-release-addr = <0 0>; /* To be filled by loader */
  78                 };
  79
  80                 cpu7: cpu@10103 {
  81                         compatible = "apple,firestorm";
  82                         device_type = "cpu";
  83                         reg = <0x0 0x10103>;
  84                         enable-method = "spin-table";
  85                         cpu-release-addr = <0 0>; /* To be filled by loader */
  86                 };
  87         };
  88
  89         timer {
  90                 compatible = "arm,armv8-timer";
  91                 interrupt-parent = <&aic>;
  92                 interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
  93                 interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
  94                              <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>,
  95                              <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
  96                              <AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;
  97         };
  98
  99         clkref: clock-ref {
 100                 compatible = "fixed-clock";
 101                 #clock-cells = <0>;
 102                 clock-frequency = <24000000>;
 103                 clock-output-names = "clkref";
 104         };
 105
 106         soc {
 107                 compatible = "simple-bus";
 108                 #address-cells = <2>;
 109                 #size-cells = <2>;
 110
 111                 ranges;
 112                 nonposted-mmio;
 113
 114                 i2c0: i2c@235010000 {
 115                         compatible = "apple,t8103-i2c", "apple,i2c";
 116                         reg = <0x2 0x35010000 0x0 0x4000>;
 117                         clocks = <&clkref>;
 118                         interrupt-parent = <&aic>;
 119                         interrupts = <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>;
 120                         pinctrl-0 = <&i2c0_pins>;
 121                         pinctrl-names = "default";
 122                         #address-cells = <0x1>;
 123                         #size-cells = <0x0>;
 124                         power-domains = <&ps_i2c0>;
 125                 };
 126
 127                 i2c1: i2c@235014000 {
 128                         compatible = "apple,t8103-i2c", "apple,i2c";
 129                         reg = <0x2 0x35014000 0x0 0x4000>;
 130                         clocks = <&clkref>;
 131                         interrupt-parent = <&aic>;
 132                         interrupts = <AIC_IRQ 628 IRQ_TYPE_LEVEL_HIGH>;
 133                         pinctrl-0 = <&i2c1_pins>;
 134                         pinctrl-names = "default";
 135                         #address-cells = <0x1>;
 136                         #size-cells = <0x0>;
 137                         power-domains = <&ps_i2c1>;
 138                 };
 139
 140                 i2c2: i2c@235018000 {
 141                         compatible = "apple,t8103-i2c", "apple,i2c";
 142                         reg = <0x2 0x35018000 0x0 0x4000>;
 143                         clocks = <&clkref>;
 144                         interrupt-parent = <&aic>;
 145                         interrupts = <AIC_IRQ 629 IRQ_TYPE_LEVEL_HIGH>;
 146                         pinctrl-0 = <&i2c2_pins>;
 147                         pinctrl-names = "default";
 148                         #address-cells = <0x1>;
 149                         #size-cells = <0x0>;
 150                         status = "disabled"; /* not used in all devices */
 151                         power-domains = <&ps_i2c2>;
 152                 };
 153
 154                 i2c3: i2c@23501c000 {
 155                         compatible = "apple,t8103-i2c", "apple,i2c";
 156                         reg = <0x2 0x3501c000 0x0 0x4000>;
 157                         clocks = <&clkref>;
 158                         interrupt-parent = <&aic>;
 159                         interrupts = <AIC_IRQ 630 IRQ_TYPE_LEVEL_HIGH>;
 160                         pinctrl-0 = <&i2c3_pins>;
 161                         pinctrl-names = "default";
 162                         #address-cells = <0x1>;
 163                         #size-cells = <0x0>;
 164                         power-domains = <&ps_i2c3>;
 165                 };
 166
 167                 i2c4: i2c@235020000 {
 168                         compatible = "apple,t8103-i2c", "apple,i2c";
 169                         reg = <0x2 0x35020000 0x0 0x4000>;
 170                         clocks = <&clkref>;
 171                         interrupt-parent = <&aic>;
 172                         interrupts = <AIC_IRQ 631 IRQ_TYPE_LEVEL_HIGH>;
 173                         pinctrl-0 = <&i2c4_pins>;
 174                         pinctrl-names = "default";
 175                         #address-cells = <0x1>;
 176                         #size-cells = <0x0>;
 177                         power-domains = <&ps_i2c4>;
 178                         status = "disabled"; /* only used in J293 */
 179                 };
 180
 181                 serial0: serial@235200000 {
 182                         compatible = "apple,s5l-uart";
 183                         reg = <0x2 0x35200000 0x0 0x1000>;
 184                         reg-io-width = <4>;
 185                         interrupt-parent = <&aic>;
 186                         interrupts = <AIC_IRQ 605 IRQ_TYPE_LEVEL_HIGH>;
 187                         /*
 188                          * TODO: figure out the clocking properly, there may
 189                          * be a third selectable clock.
 190                          */
 191                         clocks = <&clkref>, <&clkref>;
 192                         clock-names = "uart", "clk_uart_baud0";
 193                         power-domains = <&ps_uart0>;
 194                         status = "disabled";
 195                 };
 196
 197                 serial2: serial@235208000 {
 198                         compatible = "apple,s5l-uart";
 199                         reg = <0x2 0x35208000 0x0 0x1000>;
 200                         reg-io-width = <4>;
 201                         interrupt-parent = <&aic>;
 202                         interrupts = <AIC_IRQ 607 IRQ_TYPE_LEVEL_HIGH>;
 203                         clocks = <&clkref>, <&clkref>;
 204                         clock-names = "uart", "clk_uart_baud0";
 205                         power-domains = <&ps_uart2>;
 206                         status = "disabled";
 207                 };
 208
 209                 aic: interrupt-controller@23b100000 {
 210                         compatible = "apple,t8103-aic", "apple,aic";
 211                         #interrupt-cells = <3>;
 212                         interrupt-controller;
 213                         reg = <0x2 0x3b100000 0x0 0x8000>;
 214                         power-domains = <&ps_aic>;
 215                 };
 216
 217                 pmgr: power-management@23b700000 {
 218                         compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
 219                         #address-cells = <1>;
 220                         #size-cells = <1>;
 221                         reg = <0x2 0x3b700000 0 0x14000>;
 222                 };
 223
 224                 pinctrl_ap: pinctrl@23c100000 {
 225                         compatible = "apple,t8103-pinctrl", "apple,pinctrl";
 226                         reg = <0x2 0x3c100000 0x0 0x100000>;
 227                         power-domains = <&ps_gpio>;
 228
 229                         gpio-controller;
 230                         #gpio-cells = <2>;
 231                         gpio-ranges = <&pinctrl_ap 0 0 212>;
 232                         apple,npins = <212>;
 233
 234                         interrupt-controller;
 235                         #interrupt-cells = <2>;
 236                         interrupt-parent = <&aic>;
 237                         interrupts = <AIC_IRQ 190 IRQ_TYPE_LEVEL_HIGH>,
 238                                      <AIC_IRQ 191 IRQ_TYPE_LEVEL_HIGH>,
 239                                      <AIC_IRQ 192 IRQ_TYPE_LEVEL_HIGH>,
 240                                      <AIC_IRQ 193 IRQ_TYPE_LEVEL_HIGH>,
 241                                      <AIC_IRQ 194 IRQ_TYPE_LEVEL_HIGH>,
 242                                      <AIC_IRQ 195 IRQ_TYPE_LEVEL_HIGH>,
 243                                      <AIC_IRQ 196 IRQ_TYPE_LEVEL_HIGH>;
 244
 245                         i2c0_pins: i2c0-pins {
 246                                 pinmux = <APPLE_PINMUX(192, 1)>,
 247                                          <APPLE_PINMUX(188, 1)>;
 248                         };
 249
 250                         i2c1_pins: i2c1-pins {
 251                                 pinmux = <APPLE_PINMUX(201, 1)>,
 252                                          <APPLE_PINMUX(199, 1)>;
 253                         };
 254
 255                         i2c2_pins: i2c2-pins {
 256                                 pinmux = <APPLE_PINMUX(163, 1)>,
 257                                          <APPLE_PINMUX(162, 1)>;
 258                         };
 259
 260                         i2c3_pins: i2c3-pins {
 261                                 pinmux = <APPLE_PINMUX(73, 1)>,
 262                                          <APPLE_PINMUX(72, 1)>;
 263                         };
 264
 265                         i2c4_pins: i2c4-pins {
 266                                 pinmux = <APPLE_PINMUX(135, 1)>,
 267                                          <APPLE_PINMUX(134, 1)>;
 268                         };
 269
 270                         pcie_pins: pcie-pins {
 271                                 pinmux = <APPLE_PINMUX(150, 1)>,
 272                                          <APPLE_PINMUX(151, 1)>,
 273                                          <APPLE_PINMUX(32, 1)>;
 274                         };
 275                 };
 276
 277                 pinctrl_nub: pinctrl@23d1f0000 {
 278                         compatible = "apple,t8103-pinctrl", "apple,pinctrl";
 279                         reg = <0x2 0x3d1f0000 0x0 0x4000>;
 280                         power-domains = <&ps_nub_gpio>;
 281
 282                         gpio-controller;
 283                         #gpio-cells = <2>;
 284                         gpio-ranges = <&pinctrl_nub 0 0 23>;
 285                         apple,npins = <23>;
 286
 287                         interrupt-controller;
 288                         #interrupt-cells = <2>;
 289                         interrupt-parent = <&aic>;
 290                         interrupts = <AIC_IRQ 330 IRQ_TYPE_LEVEL_HIGH>,
 291                                      <AIC_IRQ 331 IRQ_TYPE_LEVEL_HIGH>,
 292                                      <AIC_IRQ 332 IRQ_TYPE_LEVEL_HIGH>,
 293                                      <AIC_IRQ 333 IRQ_TYPE_LEVEL_HIGH>,
 294                                      <AIC_IRQ 334 IRQ_TYPE_LEVEL_HIGH>,
 295                                      <AIC_IRQ 335 IRQ_TYPE_LEVEL_HIGH>,
 296                                      <AIC_IRQ 336 IRQ_TYPE_LEVEL_HIGH>;
 297                 };
 298
 299                 pmgr_mini: power-management@23d280000 {
 300                         compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
 301                         #address-cells = <1>;
 302                         #size-cells = <1>;
 303                         reg = <0x2 0x3d280000 0 0x4000>;
 304                 };
 305
 306                 wdt: watchdog@23d2b0000 {
 307                         compatible = "apple,t8103-wdt", "apple,wdt";
 308                         reg = <0x2 0x3d2b0000 0x0 0x4000>;
 309                         clocks = <&clkref>;
 310                         interrupt-parent = <&aic>;
 311                         interrupts = <AIC_IRQ 338 IRQ_TYPE_LEVEL_HIGH>;
 312                 };
 313
 314                 pinctrl_smc: pinctrl@23e820000 {
 315                         compatible = "apple,t8103-pinctrl", "apple,pinctrl";
 316                         reg = <0x2 0x3e820000 0x0 0x4000>;
 317
 318                         gpio-controller;
 319                         #gpio-cells = <2>;
 320                         gpio-ranges = <&pinctrl_smc 0 0 16>;
 321                         apple,npins = <16>;
 322
 323                         interrupt-controller;
 324                         #interrupt-cells = <2>;
 325                         interrupt-parent = <&aic>;
 326                         interrupts = <AIC_IRQ 391 IRQ_TYPE_LEVEL_HIGH>,
 327                                      <AIC_IRQ 392 IRQ_TYPE_LEVEL_HIGH>,
 328                                      <AIC_IRQ 393 IRQ_TYPE_LEVEL_HIGH>,
 329                                      <AIC_IRQ 394 IRQ_TYPE_LEVEL_HIGH>,
 330                                      <AIC_IRQ 395 IRQ_TYPE_LEVEL_HIGH>,
 331                                      <AIC_IRQ 396 IRQ_TYPE_LEVEL_HIGH>,
 332                                      <AIC_IRQ 397 IRQ_TYPE_LEVEL_HIGH>;
 333                 };
 334
 335                 pinctrl_aop: pinctrl@24a820000 {
 336                         compatible = "apple,t8103-pinctrl", "apple,pinctrl";
 337                         reg = <0x2 0x4a820000 0x0 0x4000>;
 338
 339                         gpio-controller;
 340                         #gpio-cells = <2>;
 341                         gpio-ranges = <&pinctrl_aop 0 0 42>;
 342                         apple,npins = <42>;
 343
 344                         interrupt-controller;
 345                         #interrupt-cells = <2>;
 346                         interrupt-parent = <&aic>;
 347                         interrupts = <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>,
 348                                      <AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>,
 349                                      <AIC_IRQ 270 IRQ_TYPE_LEVEL_HIGH>,
 350                                      <AIC_IRQ 271 IRQ_TYPE_LEVEL_HIGH>,
 351                                      <AIC_IRQ 272 IRQ_TYPE_LEVEL_HIGH>,
 352                                      <AIC_IRQ 273 IRQ_TYPE_LEVEL_HIGH>,
 353                                      <AIC_IRQ 274 IRQ_TYPE_LEVEL_HIGH>;
 354                 };
 355
 356                 pcie0_dart_0: dart@681008000 {
 357                         compatible = "apple,t8103-dart";
 358                         reg = <0x6 0x81008000 0x0 0x4000>;
 359                         #iommu-cells = <1>;
 360                         interrupt-parent = <&aic>;
 361                         interrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;
 362                         power-domains = <&ps_apcie_gp>;
 363                 };
 364
 365                 pcie0_dart_1: dart@682008000 {
 366                         compatible = "apple,t8103-dart";
 367                         reg = <0x6 0x82008000 0x0 0x4000>;
 368                         #iommu-cells = <1>;
 369                         interrupt-parent = <&aic>;
 370                         interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
 371                         power-domains = <&ps_apcie_gp>;
 372                 };
 373
 374                 pcie0_dart_2: dart@683008000 {
 375                         compatible = "apple,t8103-dart";
 376                         reg = <0x6 0x83008000 0x0 0x4000>;
 377                         #iommu-cells = <1>;
 378                         interrupt-parent = <&aic>;
 379                         interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
 380                         power-domains = <&ps_apcie_gp>;
 381                 };
 382
 383                 pcie0: pcie@690000000 {
 384                         compatible = "apple,t8103-pcie", "apple,pcie";
 385                         device_type = "pci";
 386
 387                         reg = <0x6 0x90000000 0x0 0x1000000>,
 388                               <0x6 0x80000000 0x0 0x100000>,
 389                               <0x6 0x81000000 0x0 0x4000>,
 390                               <0x6 0x82000000 0x0 0x4000>,
 391                               <0x6 0x83000000 0x0 0x4000>;
 392                         reg-names = "config", "rc", "port0", "port1", "port2";
 393
 394                         interrupt-parent = <&aic>;
 395                         interrupts = <AIC_IRQ 695 IRQ_TYPE_LEVEL_HIGH>,
 396                                      <AIC_IRQ 698 IRQ_TYPE_LEVEL_HIGH>,
 397                                      <AIC_IRQ 701 IRQ_TYPE_LEVEL_HIGH>;
 398
 399                         msi-controller;
 400                         msi-parent = <&pcie0>;
 401                         msi-ranges = <&aic AIC_IRQ 704 IRQ_TYPE_EDGE_RISING 32>;
 402
 403
 404                         iommu-map = <0x100 &pcie0_dart_0 1 1>,
 405                                     <0x200 &pcie0_dart_1 1 1>,
 406                                     <0x300 &pcie0_dart_2 1 1>;
 407                         iommu-map-mask = <0xff00>;
 408
 409                         bus-range = <0 3>;
 410                         #address-cells = <3>;
 411                         #size-cells = <2>;
 412                         ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>,
 413                                  <0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>;
 414
 415                         power-domains = <&ps_apcie_gp>;
 416                         pinctrl-0 = <&pcie_pins>;
 417                         pinctrl-names = "default";
 418
 419                         port00: pci@0,0 {
 420                                 device_type = "pci";
 421                                 reg = <0x0 0x0 0x0 0x0 0x0>;
 422                                 reset-gpios = <&pinctrl_ap 152 0>;
 423
 424                                 #address-cells = <3>;
 425                                 #size-cells = <2>;
 426                                 ranges;
 427
 428                                 interrupt-controller;
 429                                 #interrupt-cells = <1>;
 430
 431                                 interrupt-map-mask = <0 0 0 7>;
 432                                 interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
 433                                                 <0 0 0 2 &port00 0 0 0 1>,
 434                                                 <0 0 0 3 &port00 0 0 0 2>,
 435                                                 <0 0 0 4 &port00 0 0 0 3>;
 436                         };
 437
 438                         port01: pci@1,0 {
 439                                 device_type = "pci";
 440                                 reg = <0x800 0x0 0x0 0x0 0x0>;
 441                                 reset-gpios = <&pinctrl_ap 153 0>;
 442
 443                                 #address-cells = <3>;
 444                                 #size-cells = <2>;
 445                                 ranges;
 446
 447                                 interrupt-controller;
 448                                 #interrupt-cells = <1>;
 449
 450                                 interrupt-map-mask = <0 0 0 7>;
 451                                 interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
 452                                                 <0 0 0 2 &port01 0 0 0 1>,
 453                                                 <0 0 0 3 &port01 0 0 0 2>,
 454                                                 <0 0 0 4 &port01 0 0 0 3>;
 455                         };
 456
 457                         port02: pci@2,0 {
 458                                 device_type = "pci";
 459                                 reg = <0x1000 0x0 0x0 0x0 0x0>;
 460                                 reset-gpios = <&pinctrl_ap 33 0>;
 461
 462                                 #address-cells = <3>;
 463                                 #size-cells = <2>;
 464                                 ranges;
 465
 466                                 interrupt-controller;
 467                                 #interrupt-cells = <1>;
 468
 469                                 interrupt-map-mask = <0 0 0 7>;
 470                                 interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
 471                                                 <0 0 0 2 &port02 0 0 0 1>,
 472                                                 <0 0 0 3 &port02 0 0 0 2>,
 473                                                 <0 0 0 4 &port02 0 0 0 3>;
 474                         };
 475                 };
 476         };
 477 };
 478
 479 #include "t8103-pmgr.dtsi"