arch/arm64/boot/dts/apple/t8103.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
   2 /*
   3  * Apple T8103 "M1" SoC
   4  *
   5  * Other names: H13G, "Tonga"
   6  *
   7  * Copyright The Asahi Linux Contributors
   8  */
   9
  10 #include <dt-bindings/gpio/gpio.h>
  11 #include <dt-bindings/interrupt-controller/apple-aic.h>
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13 #include <dt-bindings/pinctrl/apple.h>
  14
  15 / {
  16         compatible = "apple,t8103", "apple,arm-platform";
  17
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         cpus {
  22                 #address-cells = <2>;
  23                 #size-cells = <0>;
  24
  25                 cpu0: cpu@0 {
  26                         compatible = "apple,icestorm";
  27                         device_type = "cpu";
  28                         reg = <0x0 0x0>;
  29                         enable-method = "spin-table";
  30                         cpu-release-addr = <0 0>; /* To be filled by loader */
  31                 };
  32
  33                 cpu1: cpu@1 {
  34                         compatible = "apple,icestorm";
  35                         device_type = "cpu";
  36                         reg = <0x0 0x1>;
  37                         enable-method = "spin-table";
  38                         cpu-release-addr = <0 0>; /* To be filled by loader */
  39                 };
  40
  41                 cpu2: cpu@2 {
  42                         compatible = "apple,icestorm";
  43                         device_type = "cpu";
  44                         reg = <0x0 0x2>;
  45                         enable-method = "spin-table";
  46                         cpu-release-addr = <0 0>; /* To be filled by loader */
  47                 };
  48
  49                 cpu3: cpu@3 {
  50                         compatible = "apple,icestorm";
  51                         device_type = "cpu";
  52                         reg = <0x0 0x3>;
  53                         enable-method = "spin-table";
  54                         cpu-release-addr = <0 0>; /* To be filled by loader */
  55                 };
  56
  57                 cpu4: cpu@10100 {
  58                         compatible = "apple,firestorm";
  59                         device_type = "cpu";
  60                         reg = <0x0 0x10100>;
  61                         enable-method = "spin-table";
  62                         cpu-release-addr = <0 0>; /* To be filled by loader */
  63                 };
  64
  65                 cpu5: cpu@10101 {
  66                         compatible = "apple,firestorm";
  67                         device_type = "cpu";
  68                         reg = <0x0 0x10101>;
  69                         enable-method = "spin-table";
  70                         cpu-release-addr = <0 0>; /* To be filled by loader */
  71                 };
  72
  73                 cpu6: cpu@10102 {
  74                         compatible = "apple,firestorm";
  75                         device_type = "cpu";
  76                         reg = <0x0 0x10102>;
  77                         enable-method = "spin-table";
  78                         cpu-release-addr = <0 0>; /* To be filled by loader */
  79                 };
  80
  81                 cpu7: cpu@10103 {
  82                         compatible = "apple,firestorm";
  83                         device_type = "cpu";
  84                         reg = <0x0 0x10103>;
  85                         enable-method = "spin-table";
  86                         cpu-release-addr = <0 0>; /* To be filled by loader */
  87                 };
  88         };
  89
  90         timer {
  91                 compatible = "arm,armv8-timer";
  92                 interrupt-parent = <&aic>;
  93                 interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
  94                 interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
  95                              <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>,
  96                              <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
  97                              <AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;
  98         };
  99
 100         clkref: clock-ref {
 101                 compatible = "fixed-clock";
 102                 #clock-cells = <0>;
 103                 clock-frequency = <24000000>;
 104                 clock-output-names = "clkref";
 105         };
 106
 107         soc {
 108                 compatible = "simple-bus";
 109                 #address-cells = <2>;
 110                 #size-cells = <2>;
 111
 112                 ranges;
 113                 nonposted-mmio;
 114
 115                 i2c0: i2c@235010000 {
 116                         compatible = "apple,t8103-i2c", "apple,i2c";
 117                         reg = <0x2 0x35010000 0x0 0x4000>;
 118                         clocks = <&clkref>;
 119                         interrupt-parent = <&aic>;
 120                         interrupts = <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>;
 121                         pinctrl-0 = <&i2c0_pins>;
 122                         pinctrl-names = "default";
 123                         #address-cells = <0x1>;
 124                         #size-cells = <0x0>;
 125                         power-domains = <&ps_i2c0>;
 126                 };
 127
 128                 i2c1: i2c@235014000 {
 129                         compatible = "apple,t8103-i2c", "apple,i2c";
 130                         reg = <0x2 0x35014000 0x0 0x4000>;
 131                         clocks = <&clkref>;
 132                         interrupt-parent = <&aic>;
 133                         interrupts = <AIC_IRQ 628 IRQ_TYPE_LEVEL_HIGH>;
 134                         pinctrl-0 = <&i2c1_pins>;
 135                         pinctrl-names = "default";
 136                         #address-cells = <0x1>;
 137                         #size-cells = <0x0>;
 138                         power-domains = <&ps_i2c1>;
 139                 };
 140
 141                 i2c2: i2c@235018000 {
 142                         compatible = "apple,t8103-i2c", "apple,i2c";
 143                         reg = <0x2 0x35018000 0x0 0x4000>;
 144                         clocks = <&clkref>;
 145                         interrupt-parent = <&aic>;
 146                         interrupts = <AIC_IRQ 629 IRQ_TYPE_LEVEL_HIGH>;
 147                         pinctrl-0 = <&i2c2_pins>;
 148                         pinctrl-names = "default";
 149                         #address-cells = <0x1>;
 150                         #size-cells = <0x0>;
 151                         status = "disabled"; /* not used in all devices */
 152                         power-domains = <&ps_i2c2>;
 153                 };
 154
 155                 i2c3: i2c@23501c000 {
 156                         compatible = "apple,t8103-i2c", "apple,i2c";
 157                         reg = <0x2 0x3501c000 0x0 0x4000>;
 158                         clocks = <&clkref>;
 159                         interrupt-parent = <&aic>;
 160                         interrupts = <AIC_IRQ 630 IRQ_TYPE_LEVEL_HIGH>;
 161                         pinctrl-0 = <&i2c3_pins>;
 162                         pinctrl-names = "default";
 163                         #address-cells = <0x1>;
 164                         #size-cells = <0x0>;
 165                         power-domains = <&ps_i2c3>;
 166                 };
 167
 168                 i2c4: i2c@235020000 {
 169                         compatible = "apple,t8103-i2c", "apple,i2c";
 170                         reg = <0x2 0x35020000 0x0 0x4000>;
 171                         clocks = <&clkref>;
 172                         interrupt-parent = <&aic>;
 173                         interrupts = <AIC_IRQ 631 IRQ_TYPE_LEVEL_HIGH>;
 174                         pinctrl-0 = <&i2c4_pins>;
 175                         pinctrl-names = "default";
 176                         #address-cells = <0x1>;
 177                         #size-cells = <0x0>;
 178                         power-domains = <&ps_i2c4>;
 179                         status = "disabled"; /* only used in J293 */
 180                 };
 181
 182                 serial0: serial@235200000 {
 183                         compatible = "apple,s5l-uart";
 184                         reg = <0x2 0x35200000 0x0 0x1000>;
 185                         reg-io-width = <4>;
 186                         interrupt-parent = <&aic>;
 187                         interrupts = <AIC_IRQ 605 IRQ_TYPE_LEVEL_HIGH>;
 188                         /*
 189                          * TODO: figure out the clocking properly, there may
 190                          * be a third selectable clock.
 191                          */
 192                         clocks = <&clkref>, <&clkref>;
 193                         clock-names = "uart", "clk_uart_baud0";
 194                         power-domains = <&ps_uart0>;
 195                         status = "disabled";
 196                 };
 197
 198                 serial2: serial@235208000 {
 199                         compatible = "apple,s5l-uart";
 200                         reg = <0x2 0x35208000 0x0 0x1000>;
 201                         reg-io-width = <4>;
 202                         interrupt-parent = <&aic>;
 203                         interrupts = <AIC_IRQ 607 IRQ_TYPE_LEVEL_HIGH>;
 204                         clocks = <&clkref>, <&clkref>;
 205                         clock-names = "uart", "clk_uart_baud0";
 206                         power-domains = <&ps_uart2>;
 207                         status = "disabled";
 208                 };
 209
 210                 aic: interrupt-controller@23b100000 {
 211                         compatible = "apple,t8103-aic", "apple,aic";
 212                         #interrupt-cells = <3>;
 213                         interrupt-controller;
 214                         reg = <0x2 0x3b100000 0x0 0x8000>;
 215                         power-domains = <&ps_aic>;
 216                 };
 217
 218                 pmgr: power-management@23b700000 {
 219                         compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
 220                         #address-cells = <1>;
 221                         #size-cells = <1>;
 222                         reg = <0x2 0x3b700000 0 0x14000>;
 223                 };
 224
 225                 pinctrl_ap: pinctrl@23c100000 {
 226                         compatible = "apple,t8103-pinctrl", "apple,pinctrl";
 227                         reg = <0x2 0x3c100000 0x0 0x100000>;
 228                         power-domains = <&ps_gpio>;
 229
 230                         gpio-controller;
 231                         #gpio-cells = <2>;
 232                         gpio-ranges = <&pinctrl_ap 0 0 212>;
 233                         apple,npins = <212>;
 234
 235                         interrupt-controller;
 236                         #interrupt-cells = <2>;
 237                         interrupt-parent = <&aic>;
 238                         interrupts = <AIC_IRQ 190 IRQ_TYPE_LEVEL_HIGH>,
 239                                      <AIC_IRQ 191 IRQ_TYPE_LEVEL_HIGH>,
 240                                      <AIC_IRQ 192 IRQ_TYPE_LEVEL_HIGH>,
 241                                      <AIC_IRQ 193 IRQ_TYPE_LEVEL_HIGH>,
 242                                      <AIC_IRQ 194 IRQ_TYPE_LEVEL_HIGH>,
 243                                      <AIC_IRQ 195 IRQ_TYPE_LEVEL_HIGH>,
 244                                      <AIC_IRQ 196 IRQ_TYPE_LEVEL_HIGH>;
 245
 246                         i2c0_pins: i2c0-pins {
 247                                 pinmux = <APPLE_PINMUX(192, 1)>,
 248                                          <APPLE_PINMUX(188, 1)>;
 249                         };
 250
 251                         i2c1_pins: i2c1-pins {
 252                                 pinmux = <APPLE_PINMUX(201, 1)>,
 253                                          <APPLE_PINMUX(199, 1)>;
 254                         };
 255
 256                         i2c2_pins: i2c2-pins {
 257                                 pinmux = <APPLE_PINMUX(163, 1)>,
 258                                          <APPLE_PINMUX(162, 1)>;
 259                         };
 260
 261                         i2c3_pins: i2c3-pins {
 262                                 pinmux = <APPLE_PINMUX(73, 1)>,
 263                                          <APPLE_PINMUX(72, 1)>;
 264                         };
 265
 266                         i2c4_pins: i2c4-pins {
 267                                 pinmux = <APPLE_PINMUX(135, 1)>,
 268                                          <APPLE_PINMUX(134, 1)>;
 269                         };
 270
 271                         pcie_pins: pcie-pins {
 272                                 pinmux = <APPLE_PINMUX(150, 1)>,
 273                                          <APPLE_PINMUX(151, 1)>,
 274                                          <APPLE_PINMUX(32, 1)>;
 275                         };
 276                 };
 277
 278                 pinctrl_nub: pinctrl@23d1f0000 {
 279                         compatible = "apple,t8103-pinctrl", "apple,pinctrl";
 280                         reg = <0x2 0x3d1f0000 0x0 0x4000>;
 281                         power-domains = <&ps_nub_gpio>;
 282
 283                         gpio-controller;
 284                         #gpio-cells = <2>;
 285                         gpio-ranges = <&pinctrl_nub 0 0 23>;
 286                         apple,npins = <23>;
 287
 288                         interrupt-controller;
 289                         #interrupt-cells = <2>;
 290                         interrupt-parent = <&aic>;
 291                         interrupts = <AIC_IRQ 330 IRQ_TYPE_LEVEL_HIGH>,
 292                                      <AIC_IRQ 331 IRQ_TYPE_LEVEL_HIGH>,
 293                                      <AIC_IRQ 332 IRQ_TYPE_LEVEL_HIGH>,
 294                                      <AIC_IRQ 333 IRQ_TYPE_LEVEL_HIGH>,
 295                                      <AIC_IRQ 334 IRQ_TYPE_LEVEL_HIGH>,
 296                                      <AIC_IRQ 335 IRQ_TYPE_LEVEL_HIGH>,
 297                                      <AIC_IRQ 336 IRQ_TYPE_LEVEL_HIGH>;
 298                 };
 299
 300                 pmgr_mini: power-management@23d280000 {
 301                         compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
 302                         #address-cells = <1>;
 303                         #size-cells = <1>;
 304                         reg = <0x2 0x3d280000 0 0x4000>;
 305                 };
 306
 307                 wdt: watchdog@23d2b0000 {
 308                         compatible = "apple,t8103-wdt", "apple,wdt";
 309                         reg = <0x2 0x3d2b0000 0x0 0x4000>;
 310                         clocks = <&clkref>;
 311                         interrupt-parent = <&aic>;
 312                         interrupts = <AIC_IRQ 338 IRQ_TYPE_LEVEL_HIGH>;
 313                 };
 314
 315                 pinctrl_smc: pinctrl@23e820000 {
 316                         compatible = "apple,t8103-pinctrl", "apple,pinctrl";
 317                         reg = <0x2 0x3e820000 0x0 0x4000>;
 318
 319                         gpio-controller;
 320                         #gpio-cells = <2>;
 321                         gpio-ranges = <&pinctrl_smc 0 0 16>;
 322                         apple,npins = <16>;
 323
 324                         interrupt-controller;
 325                         #interrupt-cells = <2>;
 326                         interrupt-parent = <&aic>;
 327                         interrupts = <AIC_IRQ 391 IRQ_TYPE_LEVEL_HIGH>,
 328                                      <AIC_IRQ 392 IRQ_TYPE_LEVEL_HIGH>,
 329                                      <AIC_IRQ 393 IRQ_TYPE_LEVEL_HIGH>,
 330                                      <AIC_IRQ 394 IRQ_TYPE_LEVEL_HIGH>,
 331                                      <AIC_IRQ 395 IRQ_TYPE_LEVEL_HIGH>,
 332                                      <AIC_IRQ 396 IRQ_TYPE_LEVEL_HIGH>,
 333                                      <AIC_IRQ 397 IRQ_TYPE_LEVEL_HIGH>;
 334                 };
 335
 336                 pinctrl_aop: pinctrl@24a820000 {
 337                         compatible = "apple,t8103-pinctrl", "apple,pinctrl";
 338                         reg = <0x2 0x4a820000 0x0 0x4000>;
 339
 340                         gpio-controller;
 341                         #gpio-cells = <2>;
 342                         gpio-ranges = <&pinctrl_aop 0 0 42>;
 343                         apple,npins = <42>;
 344
 345                         interrupt-controller;
 346                         #interrupt-cells = <2>;
 347                         interrupt-parent = <&aic>;
 348                         interrupts = <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>,
 349                                      <AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>,
 350                                      <AIC_IRQ 270 IRQ_TYPE_LEVEL_HIGH>,
 351                                      <AIC_IRQ 271 IRQ_TYPE_LEVEL_HIGH>,
 352                                      <AIC_IRQ 272 IRQ_TYPE_LEVEL_HIGH>,
 353                                      <AIC_IRQ 273 IRQ_TYPE_LEVEL_HIGH>,
 354                                      <AIC_IRQ 274 IRQ_TYPE_LEVEL_HIGH>;
 355                 };
 356
 357                 pcie0_dart_0: dart@681008000 {
 358                         compatible = "apple,t8103-dart";
 359                         reg = <0x6 0x81008000 0x0 0x4000>;
 360                         #iommu-cells = <1>;
 361                         interrupt-parent = <&aic>;
 362                         interrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;
 363                         power-domains = <&ps_apcie_gp>;
 364                 };
 365
 366                 pcie0_dart_1: dart@682008000 {
 367                         compatible = "apple,t8103-dart";
 368                         reg = <0x6 0x82008000 0x0 0x4000>;
 369                         #iommu-cells = <1>;
 370                         interrupt-parent = <&aic>;
 371                         interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
 372                         power-domains = <&ps_apcie_gp>;
 373                 };
 374
 375                 pcie0_dart_2: dart@683008000 {
 376                         compatible = "apple,t8103-dart";
 377                         reg = <0x6 0x83008000 0x0 0x4000>;
 378                         #iommu-cells = <1>;
 379                         interrupt-parent = <&aic>;
 380                         interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
 381                         power-domains = <&ps_apcie_gp>;
 382                 };
 383
 384                 pcie0: pcie@690000000 {
 385                         compatible = "apple,t8103-pcie", "apple,pcie";
 386                         device_type = "pci";
 387
 388                         reg = <0x6 0x90000000 0x0 0x1000000>,
 389                               <0x6 0x80000000 0x0 0x100000>,
 390                               <0x6 0x81000000 0x0 0x4000>,
 391                               <0x6 0x82000000 0x0 0x4000>,
 392                               <0x6 0x83000000 0x0 0x4000>;
 393                         reg-names = "config", "rc", "port0", "port1", "port2";
 394
 395                         interrupt-parent = <&aic>;
 396                         interrupts = <AIC_IRQ 695 IRQ_TYPE_LEVEL_HIGH>,
 397                                      <AIC_IRQ 698 IRQ_TYPE_LEVEL_HIGH>,
 398                                      <AIC_IRQ 701 IRQ_TYPE_LEVEL_HIGH>;
 399
 400                         msi-controller;
 401                         msi-parent = <&pcie0>;
 402                         msi-ranges = <&aic AIC_IRQ 704 IRQ_TYPE_EDGE_RISING 32>;
 403
 404
 405                         iommu-map = <0x100 &pcie0_dart_0 1 1>,
 406                                     <0x200 &pcie0_dart_1 1 1>,
 407                                     <0x300 &pcie0_dart_2 1 1>;
 408                         iommu-map-mask = <0xff00>;
 409
 410                         bus-range = <0 3>;
 411                         #address-cells = <3>;
 412                         #size-cells = <2>;
 413                         ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>,
 414                                  <0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>;
 415
 416                         power-domains = <&ps_apcie_gp>;
 417                         pinctrl-0 = <&pcie_pins>;
 418                         pinctrl-names = "default";
 419
 420                         port00: pci@0,0 {
 421                                 device_type = "pci";
 422                                 reg = <0x0 0x0 0x0 0x0 0x0>;
 423                                 reset-gpios = <&pinctrl_ap 152 GPIO_ACTIVE_LOW>;
 424
 425                                 #address-cells = <3>;
 426                                 #size-cells = <2>;
 427                                 ranges;
 428
 429                                 interrupt-controller;
 430                                 #interrupt-cells = <1>;
 431
 432                                 interrupt-map-mask = <0 0 0 7>;
 433                                 interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
 434                                                 <0 0 0 2 &port00 0 0 0 1>,
 435                                                 <0 0 0 3 &port00 0 0 0 2>,
 436                                                 <0 0 0 4 &port00 0 0 0 3>;
 437                         };
 438
 439                         port01: pci@1,0 {
 440                                 device_type = "pci";
 441                                 reg = <0x800 0x0 0x0 0x0 0x0>;
 442                                 reset-gpios = <&pinctrl_ap 153 GPIO_ACTIVE_LOW>;
 443
 444                                 #address-cells = <3>;
 445                                 #size-cells = <2>;
 446                                 ranges;
 447
 448                                 interrupt-controller;
 449                                 #interrupt-cells = <1>;
 450
 451                                 interrupt-map-mask = <0 0 0 7>;
 452                                 interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
 453                                                 <0 0 0 2 &port01 0 0 0 1>,
 454                                                 <0 0 0 3 &port01 0 0 0 2>,
 455                                                 <0 0 0 4 &port01 0 0 0 3>;
 456                         };
 457
 458                         port02: pci@2,0 {
 459                                 device_type = "pci";
 460                                 reg = <0x1000 0x0 0x0 0x0 0x0>;
 461                                 reset-gpios = <&pinctrl_ap 33 GPIO_ACTIVE_LOW>;
 462
 463                                 #address-cells = <3>;
 464                                 #size-cells = <2>;
 465                                 ranges;
 466
 467                                 interrupt-controller;
 468                                 #interrupt-cells = <1>;
 469
 470                                 interrupt-map-mask = <0 0 0 7>;
 471                                 interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
 472                                                 <0 0 0 2 &port02 0 0 0 1>,
 473                                                 <0 0 0 3 &port02 0 0 0 2>,
 474                                                 <0 0 0 4 &port02 0 0 0 3>;
 475                         };
 476                 };
 477         };
 478 };
 479
 480 #include "t8103-pmgr.dtsi"