1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/g12a-clkc.h>
9 #include <dt-bindings/clock/g12a-aoclkc.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
21 mmc0 = &sd_emmc_b; /* SD card */
22 mmc1 = &sd_emmc_c; /* eMMC */
23 mmc2 = &sd_emmc_a; /* SDIO */
31 simplefb_cvbs: framebuffer-cvbs {
32 compatible = "amlogic,simple-framebuffer",
34 amlogic,pipeline = "vpu-cvbs";
35 clocks = <&clkc CLKID_HDMI>,
36 <&clkc CLKID_HTX_PCLK>,
37 <&clkc CLKID_VPU_INTR>;
41 simplefb_hdmi: framebuffer-hdmi {
42 compatible = "amlogic,simple-framebuffer",
44 amlogic,pipeline = "vpu-hdmi";
45 clocks = <&clkc CLKID_HDMI>,
46 <&clkc CLKID_HTX_PCLK>,
47 <&clkc CLKID_VPU_INTR>;
53 compatible = "amlogic,meson-gxbb-efuse";
54 clocks = <&clkc CLKID_EFUSE>;
58 secure-monitor = <&sm>;
61 gpu_opp_table: gpu-opp-table {
62 compatible = "operating-points-v2";
65 opp-hz = /bits/ 64 <124999998>;
66 opp-microvolt = <800000>;
69 opp-hz = /bits/ 64 <249999996>;
70 opp-microvolt = <800000>;
73 opp-hz = /bits/ 64 <285714281>;
74 opp-microvolt = <800000>;
77 opp-hz = /bits/ 64 <399999994>;
78 opp-microvolt = <800000>;
81 opp-hz = /bits/ 64 <499999992>;
82 opp-microvolt = <800000>;
85 opp-hz = /bits/ 64 <666666656>;
86 opp-microvolt = <800000>;
89 opp-hz = /bits/ 64 <799999987>;
90 opp-microvolt = <800000>;
95 compatible = "arm,psci-1.0";
100 #address-cells = <2>;
104 /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
105 secmon_reserved: secmon@5000000 {
106 reg = <0x0 0x05000000 0x0 0x300000>;
111 compatible = "shared-dma-pool";
113 size = <0x0 0x10000000>;
114 alignment = <0x0 0x400000>;
120 compatible = "amlogic,meson-gxbb-sm";
124 compatible = "simple-bus";
125 #address-cells = <2>;
129 pcie: pcie@fc000000 {
130 compatible = "amlogic,g12a-pcie", "snps,dw-pcie";
131 reg = <0x0 0xfc000000 0x0 0x400000>,
132 <0x0 0xff648000 0x0 0x2000>,
133 <0x0 0xfc400000 0x0 0x200000>;
134 reg-names = "elbi", "cfg", "config";
135 interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
136 #interrupt-cells = <1>;
137 interrupt-map-mask = <0 0 0 0>;
138 interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
139 bus-range = <0x0 0xff>;
140 #address-cells = <3>;
143 ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000>,
144 <0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
146 clocks = <&clkc CLKID_PCIE_PHY
147 &clkc CLKID_PCIE_COMB
148 &clkc CLKID_PCIE_PLL>;
149 clock-names = "general",
152 resets = <&reset RESET_PCIE_CTRL_A>,
153 <&reset RESET_PCIE_APB>;
154 reset-names = "port",
157 phys = <&usb3_pcie_phy PHY_TYPE_PCIE>;
163 cpu_thermal: cpu-thermal {
164 polling-delay = <1000>;
165 polling-delay-passive = <100>;
166 thermal-sensors = <&cpu_temp>;
169 cpu_passive: cpu-passive {
170 temperature = <85000>; /* millicelsius */
171 hysteresis = <2000>; /* millicelsius */
176 temperature = <95000>; /* millicelsius */
177 hysteresis = <2000>; /* millicelsius */
181 cpu_critical: cpu-critical {
182 temperature = <110000>; /* millicelsius */
183 hysteresis = <2000>; /* millicelsius */
189 ddr_thermal: ddr-thermal {
190 polling-delay = <1000>;
191 polling-delay-passive = <100>;
192 thermal-sensors = <&ddr_temp>;
195 ddr_passive: ddr-passive {
196 temperature = <85000>; /* millicelsius */
197 hysteresis = <2000>; /* millicelsius */
201 ddr_critical: ddr-critical {
202 temperature = <110000>; /* millicelsius */
203 hysteresis = <2000>; /* millicelsius */
210 trip = <&ddr_passive>;
211 cooling-device = <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
217 ethmac: ethernet@ff3f0000 {
218 compatible = "amlogic,meson-g12a-dwmac",
221 reg = <0x0 0xff3f0000 0x0 0x10000>,
222 <0x0 0xff634540 0x0 0x8>;
223 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
224 interrupt-names = "macirq";
225 clocks = <&clkc CLKID_ETH>,
226 <&clkc CLKID_FCLK_DIV2>,
228 <&clkc CLKID_FCLK_DIV2>;
229 clock-names = "stmmaceth", "clkin0", "clkin1",
231 rx-fifo-depth = <4096>;
232 tx-fifo-depth = <2048>;
236 #address-cells = <1>;
238 compatible = "snps,dwmac-mdio";
243 compatible = "simple-bus";
244 reg = <0x0 0xff600000 0x0 0x200000>;
245 #address-cells = <2>;
247 ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>;
250 compatible = "amlogic,meson-g12a-dw-hdmi";
251 reg = <0x0 0x0 0x0 0x10000>;
252 interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
253 resets = <&reset RESET_HDMITX_CAPB3>,
254 <&reset RESET_HDMITX_PHY>,
255 <&reset RESET_HDMITX>;
256 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
257 clocks = <&clkc CLKID_HDMI>,
258 <&clkc CLKID_HTX_PCLK>,
259 <&clkc CLKID_VPU_INTR>;
260 clock-names = "isfr", "iahb", "venci";
261 #address-cells = <1>;
263 #sound-dai-cells = <0>;
267 hdmi_tx_venc_port: port@0 {
270 hdmi_tx_in: endpoint {
271 remote-endpoint = <&hdmi_tx_out>;
276 hdmi_tx_tmds_port: port@1 {
281 apb_efuse: bus@30000 {
282 compatible = "simple-bus";
283 reg = <0x0 0x30000 0x0 0x2000>;
284 #address-cells = <2>;
286 ranges = <0x0 0x0 0x0 0x30000 0x0 0x2000>;
289 compatible = "amlogic,meson-rng";
290 reg = <0x0 0x218 0x0 0x4>;
291 clocks = <&clkc CLKID_RNG0>;
292 clock-names = "core";
296 acodec: audio-controller@32000 {
297 compatible = "amlogic,t9015";
298 reg = <0x0 0x32000 0x0 0x14>;
299 #sound-dai-cells = <0>;
300 sound-name-prefix = "ACODEC";
301 clocks = <&clkc CLKID_AUDIO_CODEC>;
302 clock-names = "pclk";
303 resets = <&reset RESET_AUDIO_CODEC>;
308 compatible = "simple-bus";
309 reg = <0x0 0x34400 0x0 0x400>;
310 #address-cells = <2>;
312 ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;
314 periphs_pinctrl: pinctrl@40 {
315 compatible = "amlogic,meson-g12a-periphs-pinctrl";
316 #address-cells = <2>;
321 reg = <0x0 0x40 0x0 0x4c>,
323 <0x0 0x120 0x0 0x18>,
324 <0x0 0x2c0 0x0 0x40>,
325 <0x0 0x340 0x0 0x1c>;
333 gpio-ranges = <&periphs_pinctrl 0 0 86>;
336 cec_ao_a_h_pins: cec_ao_a_h {
338 groups = "cec_ao_a_h";
339 function = "cec_ao_a_h";
344 cec_ao_b_h_pins: cec_ao_b_h {
346 groups = "cec_ao_b_h";
347 function = "cec_ao_b_h";
352 emmc_ctrl_pins: emmc-ctrl {
357 drive-strength-microamp = <4000>;
364 drive-strength-microamp = <4000>;
368 emmc_data_4b_pins: emmc-data-4b {
370 groups = "emmc_nand_d0",
376 drive-strength-microamp = <4000>;
380 emmc_data_8b_pins: emmc-data-8b {
382 groups = "emmc_nand_d0",
392 drive-strength-microamp = <4000>;
396 emmc_ds_pins: emmc-ds {
398 groups = "emmc_nand_ds";
401 drive-strength-microamp = <4000>;
405 emmc_clk_gate_pins: emmc_clk_gate {
408 function = "gpio_periphs";
410 drive-strength-microamp = <4000>;
414 hdmitx_ddc_pins: hdmitx_ddc {
416 groups = "hdmitx_sda",
420 drive-strength-microamp = <4000>;
424 hdmitx_hpd_pins: hdmitx_hpd {
426 groups = "hdmitx_hpd_in";
433 i2c0_sda_c_pins: i2c0-sda-c {
435 groups = "i2c0_sda_c";
438 drive-strength-microamp = <3000>;
443 i2c0_sck_c_pins: i2c0-sck-c {
445 groups = "i2c0_sck_c";
448 drive-strength-microamp = <3000>;
452 i2c0_sda_z0_pins: i2c0-sda-z0 {
454 groups = "i2c0_sda_z0";
457 drive-strength-microamp = <3000>;
461 i2c0_sck_z1_pins: i2c0-sck-z1 {
463 groups = "i2c0_sck_z1";
466 drive-strength-microamp = <3000>;
470 i2c0_sda_z7_pins: i2c0-sda-z7 {
472 groups = "i2c0_sda_z7";
475 drive-strength-microamp = <3000>;
479 i2c0_sda_z8_pins: i2c0-sda-z8 {
481 groups = "i2c0_sda_z8";
484 drive-strength-microamp = <3000>;
488 i2c1_sda_x_pins: i2c1-sda-x {
490 groups = "i2c1_sda_x";
493 drive-strength-microamp = <3000>;
497 i2c1_sck_x_pins: i2c1-sck-x {
499 groups = "i2c1_sck_x";
502 drive-strength-microamp = <3000>;
506 i2c1_sda_h2_pins: i2c1-sda-h2 {
508 groups = "i2c1_sda_h2";
511 drive-strength-microamp = <3000>;
515 i2c1_sck_h3_pins: i2c1-sck-h3 {
517 groups = "i2c1_sck_h3";
520 drive-strength-microamp = <3000>;
524 i2c1_sda_h6_pins: i2c1-sda-h6 {
526 groups = "i2c1_sda_h6";
529 drive-strength-microamp = <3000>;
533 i2c1_sck_h7_pins: i2c1-sck-h7 {
535 groups = "i2c1_sck_h7";
538 drive-strength-microamp = <3000>;
542 i2c2_sda_x_pins: i2c2-sda-x {
544 groups = "i2c2_sda_x";
547 drive-strength-microamp = <3000>;
551 i2c2_sck_x_pins: i2c2-sck-x {
553 groups = "i2c2_sck_x";
556 drive-strength-microamp = <3000>;
560 i2c2_sda_z_pins: i2c2-sda-z {
562 groups = "i2c2_sda_z";
565 drive-strength-microamp = <3000>;
569 i2c2_sck_z_pins: i2c2-sck-z {
571 groups = "i2c2_sck_z";
574 drive-strength-microamp = <3000>;
578 i2c3_sda_h_pins: i2c3-sda-h {
580 groups = "i2c3_sda_h";
583 drive-strength-microamp = <3000>;
587 i2c3_sck_h_pins: i2c3-sck-h {
589 groups = "i2c3_sck_h";
592 drive-strength-microamp = <3000>;
596 i2c3_sda_a_pins: i2c3-sda-a {
598 groups = "i2c3_sda_a";
601 drive-strength-microamp = <3000>;
605 i2c3_sck_a_pins: i2c3-sck-a {
607 groups = "i2c3_sck_a";
610 drive-strength-microamp = <3000>;
614 mclk0_a_pins: mclk0-a {
619 drive-strength-microamp = <3000>;
623 mclk1_a_pins: mclk1-a {
628 drive-strength-microamp = <3000>;
632 mclk1_x_pins: mclk1-x {
637 drive-strength-microamp = <3000>;
641 mclk1_z_pins: mclk1-z {
646 drive-strength-microamp = <3000>;
661 pdm_din0_a_pins: pdm-din0-a {
663 groups = "pdm_din0_a";
669 pdm_din0_c_pins: pdm-din0-c {
671 groups = "pdm_din0_c";
677 pdm_din0_x_pins: pdm-din0-x {
679 groups = "pdm_din0_x";
685 pdm_din0_z_pins: pdm-din0-z {
687 groups = "pdm_din0_z";
693 pdm_din1_a_pins: pdm-din1-a {
695 groups = "pdm_din1_a";
701 pdm_din1_c_pins: pdm-din1-c {
703 groups = "pdm_din1_c";
709 pdm_din1_x_pins: pdm-din1-x {
711 groups = "pdm_din1_x";
717 pdm_din1_z_pins: pdm-din1-z {
719 groups = "pdm_din1_z";
725 pdm_din2_a_pins: pdm-din2-a {
727 groups = "pdm_din2_a";
733 pdm_din2_c_pins: pdm-din2-c {
735 groups = "pdm_din2_c";
741 pdm_din2_x_pins: pdm-din2-x {
743 groups = "pdm_din2_x";
749 pdm_din2_z_pins: pdm-din2-z {
751 groups = "pdm_din2_z";
757 pdm_din3_a_pins: pdm-din3-a {
759 groups = "pdm_din3_a";
765 pdm_din3_c_pins: pdm-din3-c {
767 groups = "pdm_din3_c";
773 pdm_din3_x_pins: pdm-din3-x {
775 groups = "pdm_din3_x";
781 pdm_din3_z_pins: pdm-din3-z {
783 groups = "pdm_din3_z";
789 pdm_dclk_a_pins: pdm-dclk-a {
791 groups = "pdm_dclk_a";
794 drive-strength-microamp = <500>;
798 pdm_dclk_c_pins: pdm-dclk-c {
800 groups = "pdm_dclk_c";
803 drive-strength-microamp = <500>;
807 pdm_dclk_x_pins: pdm-dclk-x {
809 groups = "pdm_dclk_x";
812 drive-strength-microamp = <500>;
816 pdm_dclk_z_pins: pdm-dclk-z {
818 groups = "pdm_dclk_z";
821 drive-strength-microamp = <500>;
833 pwm_b_x7_pins: pwm-b-x7 {
841 pwm_b_x19_pins: pwm-b-x19 {
843 groups = "pwm_b_x19";
849 pwm_c_c_pins: pwm-c-c {
857 pwm_c_x5_pins: pwm-c-x5 {
865 pwm_c_x8_pins: pwm-c-x8 {
873 pwm_d_x3_pins: pwm-d-x3 {
881 pwm_d_x6_pins: pwm-d-x6 {
897 pwm_f_x_pins: pwm-f-x {
905 pwm_f_h_pins: pwm-f-h {
913 sdcard_c_pins: sdcard_c {
915 groups = "sdcard_d0_c",
922 drive-strength-microamp = <4000>;
926 groups = "sdcard_clk_c";
929 drive-strength-microamp = <4000>;
933 sdcard_clk_gate_c_pins: sdcard_clk_gate_c {
936 function = "gpio_periphs";
938 drive-strength-microamp = <4000>;
942 sdcard_z_pins: sdcard_z {
944 groups = "sdcard_d0_z",
951 drive-strength-microamp = <4000>;
955 groups = "sdcard_clk_z";
958 drive-strength-microamp = <4000>;
962 sdcard_clk_gate_z_pins: sdcard_clk_gate_z {
965 function = "gpio_periphs";
967 drive-strength-microamp = <4000>;
981 drive-strength-microamp = <4000>;
985 sdio_clk_gate_pins: sdio_clk_gate {
988 function = "gpio_periphs";
990 drive-strength-microamp = <4000>;
994 spdif_in_a10_pins: spdif-in-a10 {
996 groups = "spdif_in_a10";
997 function = "spdif_in";
1002 spdif_in_a12_pins: spdif-in-a12 {
1004 groups = "spdif_in_a12";
1005 function = "spdif_in";
1010 spdif_in_h_pins: spdif-in-h {
1012 groups = "spdif_in_h";
1013 function = "spdif_in";
1018 spdif_out_h_pins: spdif-out-h {
1020 groups = "spdif_out_h";
1021 function = "spdif_out";
1022 drive-strength-microamp = <500>;
1027 spdif_out_a11_pins: spdif-out-a11 {
1029 groups = "spdif_out_a11";
1030 function = "spdif_out";
1031 drive-strength-microamp = <500>;
1036 spdif_out_a13_pins: spdif-out-a13 {
1038 groups = "spdif_out_a13";
1039 function = "spdif_out";
1040 drive-strength-microamp = <500>;
1045 spicc0_x_pins: spicc0-x {
1047 groups = "spi0_mosi_x",
1051 drive-strength-microamp = <4000>;
1056 spicc0_ss0_x_pins: spicc0-ss0-x {
1058 groups = "spi0_ss0_x";
1060 drive-strength-microamp = <4000>;
1065 spicc0_c_pins: spicc0-c {
1067 groups = "spi0_mosi_c",
1072 drive-strength-microamp = <4000>;
1077 spicc1_pins: spicc1 {
1079 groups = "spi1_mosi",
1083 drive-strength-microamp = <4000>;
1087 spicc1_ss0_pins: spicc1-ss0 {
1089 groups = "spi1_ss0";
1091 drive-strength-microamp = <4000>;
1096 tdm_a_din0_pins: tdm-a-din0 {
1098 groups = "tdm_a_din0";
1105 tdm_a_din1_pins: tdm-a-din1 {
1107 groups = "tdm_a_din1";
1113 tdm_a_dout0_pins: tdm-a-dout0 {
1115 groups = "tdm_a_dout0";
1118 drive-strength-microamp = <3000>;
1122 tdm_a_dout1_pins: tdm-a-dout1 {
1124 groups = "tdm_a_dout1";
1127 drive-strength-microamp = <3000>;
1131 tdm_a_fs_pins: tdm-a-fs {
1133 groups = "tdm_a_fs";
1136 drive-strength-microamp = <3000>;
1140 tdm_a_sclk_pins: tdm-a-sclk {
1142 groups = "tdm_a_sclk";
1145 drive-strength-microamp = <3000>;
1149 tdm_a_slv_fs_pins: tdm-a-slv-fs {
1151 groups = "tdm_a_slv_fs";
1158 tdm_a_slv_sclk_pins: tdm-a-slv-sclk {
1160 groups = "tdm_a_slv_sclk";
1166 tdm_b_din0_pins: tdm-b-din0 {
1168 groups = "tdm_b_din0";
1174 tdm_b_din1_pins: tdm-b-din1 {
1176 groups = "tdm_b_din1";
1182 tdm_b_din2_pins: tdm-b-din2 {
1184 groups = "tdm_b_din2";
1190 tdm_b_din3_a_pins: tdm-b-din3-a {
1192 groups = "tdm_b_din3_a";
1198 tdm_b_din3_h_pins: tdm-b-din3-h {
1200 groups = "tdm_b_din3_h";
1206 tdm_b_dout0_pins: tdm-b-dout0 {
1208 groups = "tdm_b_dout0";
1211 drive-strength-microamp = <3000>;
1215 tdm_b_dout1_pins: tdm-b-dout1 {
1217 groups = "tdm_b_dout1";
1220 drive-strength-microamp = <3000>;
1224 tdm_b_dout2_pins: tdm-b-dout2 {
1226 groups = "tdm_b_dout2";
1229 drive-strength-microamp = <3000>;
1233 tdm_b_dout3_a_pins: tdm-b-dout3-a {
1235 groups = "tdm_b_dout3_a";
1238 drive-strength-microamp = <3000>;
1242 tdm_b_dout3_h_pins: tdm-b-dout3-h {
1244 groups = "tdm_b_dout3_h";
1247 drive-strength-microamp = <3000>;
1251 tdm_b_fs_pins: tdm-b-fs {
1253 groups = "tdm_b_fs";
1256 drive-strength-microamp = <3000>;
1260 tdm_b_sclk_pins: tdm-b-sclk {
1262 groups = "tdm_b_sclk";
1265 drive-strength-microamp = <3000>;
1269 tdm_b_slv_fs_pins: tdm-b-slv-fs {
1271 groups = "tdm_b_slv_fs";
1277 tdm_b_slv_sclk_pins: tdm-b-slv-sclk {
1279 groups = "tdm_b_slv_sclk";
1285 tdm_c_din0_a_pins: tdm-c-din0-a {
1287 groups = "tdm_c_din0_a";
1293 tdm_c_din0_z_pins: tdm-c-din0-z {
1295 groups = "tdm_c_din0_z";
1301 tdm_c_din1_a_pins: tdm-c-din1-a {
1303 groups = "tdm_c_din1_a";
1309 tdm_c_din1_z_pins: tdm-c-din1-z {
1311 groups = "tdm_c_din1_z";
1317 tdm_c_din2_a_pins: tdm-c-din2-a {
1319 groups = "tdm_c_din2_a";
1325 eth_leds_pins: eth-leds {
1327 groups = "eth_link_led",
1336 groups = "eth_mdio",
1346 drive-strength-microamp = <4000>;
1351 eth_rgmii_pins: eth-rgmii {
1353 groups = "eth_rxd2_rgmii",
1359 drive-strength-microamp = <4000>;
1364 tdm_c_din2_z_pins: tdm-c-din2-z {
1366 groups = "tdm_c_din2_z";
1372 tdm_c_din3_a_pins: tdm-c-din3-a {
1374 groups = "tdm_c_din3_a";
1380 tdm_c_din3_z_pins: tdm-c-din3-z {
1382 groups = "tdm_c_din3_z";
1388 tdm_c_dout0_a_pins: tdm-c-dout0-a {
1390 groups = "tdm_c_dout0_a";
1393 drive-strength-microamp = <3000>;
1397 tdm_c_dout0_z_pins: tdm-c-dout0-z {
1399 groups = "tdm_c_dout0_z";
1402 drive-strength-microamp = <3000>;
1406 tdm_c_dout1_a_pins: tdm-c-dout1-a {
1408 groups = "tdm_c_dout1_a";
1411 drive-strength-microamp = <3000>;
1415 tdm_c_dout1_z_pins: tdm-c-dout1-z {
1417 groups = "tdm_c_dout1_z";
1420 drive-strength-microamp = <3000>;
1424 tdm_c_dout2_a_pins: tdm-c-dout2-a {
1426 groups = "tdm_c_dout2_a";
1429 drive-strength-microamp = <3000>;
1433 tdm_c_dout2_z_pins: tdm-c-dout2-z {
1435 groups = "tdm_c_dout2_z";
1438 drive-strength-microamp = <3000>;
1442 tdm_c_dout3_a_pins: tdm-c-dout3-a {
1444 groups = "tdm_c_dout3_a";
1447 drive-strength-microamp = <3000>;
1451 tdm_c_dout3_z_pins: tdm-c-dout3-z {
1453 groups = "tdm_c_dout3_z";
1456 drive-strength-microamp = <3000>;
1460 tdm_c_fs_a_pins: tdm-c-fs-a {
1462 groups = "tdm_c_fs_a";
1465 drive-strength-microamp = <3000>;
1469 tdm_c_fs_z_pins: tdm-c-fs-z {
1471 groups = "tdm_c_fs_z";
1474 drive-strength-microamp = <3000>;
1478 tdm_c_sclk_a_pins: tdm-c-sclk-a {
1480 groups = "tdm_c_sclk_a";
1483 drive-strength-microamp = <3000>;
1487 tdm_c_sclk_z_pins: tdm-c-sclk-z {
1489 groups = "tdm_c_sclk_z";
1492 drive-strength-microamp = <3000>;
1496 tdm_c_slv_fs_a_pins: tdm-c-slv-fs-a {
1498 groups = "tdm_c_slv_fs_a";
1504 tdm_c_slv_fs_z_pins: tdm-c-slv-fs-z {
1506 groups = "tdm_c_slv_fs_z";
1512 tdm_c_slv_sclk_a_pins: tdm-c-slv-sclk-a {
1514 groups = "tdm_c_slv_sclk_a";
1520 tdm_c_slv_sclk_z_pins: tdm-c-slv-sclk-z {
1522 groups = "tdm_c_slv_sclk_z";
1528 uart_a_pins: uart-a {
1530 groups = "uart_a_tx",
1532 function = "uart_a";
1537 uart_a_cts_rts_pins: uart-a-cts-rts {
1539 groups = "uart_a_cts",
1541 function = "uart_a";
1546 uart_b_pins: uart-b {
1548 groups = "uart_b_tx",
1550 function = "uart_b";
1555 uart_c_pins: uart-c {
1557 groups = "uart_c_tx",
1559 function = "uart_c";
1564 uart_c_cts_rts_pins: uart-c-cts-rts {
1566 groups = "uart_c_cts",
1568 function = "uart_c";
1575 cpu_temp: temperature-sensor@34800 {
1576 compatible = "amlogic,g12a-cpu-thermal",
1577 "amlogic,g12a-thermal";
1578 reg = <0x0 0x34800 0x0 0x50>;
1579 interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>;
1580 clocks = <&clkc CLKID_TS>;
1581 #thermal-sensor-cells = <0>;
1582 amlogic,ao-secure = <&sec_AO>;
1585 ddr_temp: temperature-sensor@34c00 {
1586 compatible = "amlogic,g12a-ddr-thermal",
1587 "amlogic,g12a-thermal";
1588 reg = <0x0 0x34c00 0x0 0x50>;
1589 interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
1590 clocks = <&clkc CLKID_TS>;
1591 #thermal-sensor-cells = <0>;
1592 amlogic,ao-secure = <&sec_AO>;
1595 usb2_phy0: phy@36000 {
1596 compatible = "amlogic,g12a-usb2-phy";
1597 reg = <0x0 0x36000 0x0 0x2000>;
1599 clock-names = "xtal";
1600 resets = <&reset RESET_USB_PHY20>;
1601 reset-names = "phy";
1606 compatible = "simple-bus";
1607 reg = <0x0 0x38000 0x0 0x400>;
1608 #address-cells = <2>;
1610 ranges = <0x0 0x0 0x0 0x38000 0x0 0x400>;
1612 canvas: video-lut@48 {
1613 compatible = "amlogic,canvas";
1614 reg = <0x0 0x48 0x0 0x14>;
1618 usb2_phy1: phy@3a000 {
1619 compatible = "amlogic,g12a-usb2-phy";
1620 reg = <0x0 0x3a000 0x0 0x2000>;
1622 clock-names = "xtal";
1623 resets = <&reset RESET_USB_PHY21>;
1624 reset-names = "phy";
1629 compatible = "simple-bus";
1630 reg = <0x0 0x3c000 0x0 0x1400>;
1631 #address-cells = <2>;
1633 ranges = <0x0 0x0 0x0 0x3c000 0x0 0x1400>;
1635 hhi: system-controller@0 {
1636 compatible = "amlogic,meson-gx-hhi-sysctrl",
1637 "simple-mfd", "syscon";
1638 reg = <0 0 0 0x400>;
1640 clkc: clock-controller {
1641 compatible = "amlogic,g12a-clkc";
1644 clock-names = "xtal";
1647 pwrc: power-controller {
1648 compatible = "amlogic,meson-g12a-pwrc";
1649 #power-domain-cells = <1>;
1650 amlogic,ao-sysctrl = <&rti>;
1651 resets = <&reset RESET_VIU>,
1652 <&reset RESET_VENC>,
1653 <&reset RESET_VCBUS>,
1654 <&reset RESET_BT656>,
1655 <&reset RESET_RDMA>,
1656 <&reset RESET_VENCI>,
1657 <&reset RESET_VENCP>,
1658 <&reset RESET_VDAC>,
1659 <&reset RESET_VDI6>,
1660 <&reset RESET_VENCL>,
1661 <&reset RESET_VID_LOCK>;
1662 reset-names = "viu", "venc", "vcbus", "bt656",
1663 "rdma", "venci", "vencp", "vdac",
1664 "vdi6", "vencl", "vid_lock";
1665 clocks = <&clkc CLKID_VPU>,
1667 clock-names = "vpu", "vapb";
1669 * VPU clocking is provided by two identical clock paths
1670 * VPU_0 and VPU_1 muxed to a single clock by a glitch
1671 * free mux to safely change frequency while running.
1672 * Same for VAPB but with a final gate after the glitch free mux.
1674 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
1675 <&clkc CLKID_VPU_0>,
1676 <&clkc CLKID_VPU>, /* Glitch free mux */
1677 <&clkc CLKID_VAPB_0_SEL>,
1678 <&clkc CLKID_VAPB_0>,
1679 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
1680 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
1681 <0>, /* Do Nothing */
1682 <&clkc CLKID_VPU_0>,
1683 <&clkc CLKID_FCLK_DIV4>,
1684 <0>, /* Do Nothing */
1685 <&clkc CLKID_VAPB_0>;
1686 assigned-clock-rates = <0>, /* Do Nothing */
1688 <0>, /* Do Nothing */
1689 <0>, /* Do Nothing */
1691 <0>; /* Do Nothing */
1696 usb3_pcie_phy: phy@46000 {
1697 compatible = "amlogic,g12a-usb3-pcie-phy";
1698 reg = <0x0 0x46000 0x0 0x2000>;
1699 clocks = <&clkc CLKID_PCIE_PLL>;
1700 clock-names = "ref_clk";
1701 resets = <&reset RESET_PCIE_PHY>;
1702 reset-names = "phy";
1703 assigned-clocks = <&clkc CLKID_PCIE_PLL>;
1704 assigned-clock-rates = <100000000>;
1708 eth_phy: mdio-multiplexer@4c000 {
1709 compatible = "amlogic,g12a-mdio-mux";
1710 reg = <0x0 0x4c000 0x0 0xa4>;
1711 clocks = <&clkc CLKID_ETH_PHY>,
1713 <&clkc CLKID_MPLL_50M>;
1714 clock-names = "pclk", "clkin0", "clkin1";
1715 mdio-parent-bus = <&mdio0>;
1716 #address-cells = <1>;
1721 #address-cells = <1>;
1727 #address-cells = <1>;
1730 internal_ephy: ethernet_phy@8 {
1731 compatible = "ethernet-phy-id0180.3301",
1732 "ethernet-phy-ieee802.3-c22";
1733 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
1741 aobus: bus@ff800000 {
1742 compatible = "simple-bus";
1743 reg = <0x0 0xff800000 0x0 0x100000>;
1744 #address-cells = <2>;
1746 ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
1749 compatible = "amlogic,meson-gx-ao-sysctrl",
1750 "simple-mfd", "syscon";
1751 reg = <0x0 0x0 0x0 0x100>;
1752 #address-cells = <2>;
1754 ranges = <0x0 0x0 0x0 0x0 0x0 0x100>;
1756 clkc_AO: clock-controller {
1757 compatible = "amlogic,meson-g12a-aoclkc";
1760 clocks = <&xtal>, <&clkc CLKID_CLK81>;
1761 clock-names = "xtal", "mpeg-clk";
1764 ao_pinctrl: pinctrl@14 {
1765 compatible = "amlogic,meson-g12a-aobus-pinctrl";
1766 #address-cells = <2>;
1771 reg = <0x0 0x14 0x0 0x8>,
1773 <0x0 0x24 0x0 0x14>;
1779 gpio-ranges = <&ao_pinctrl 0 0 15>;
1782 i2c_ao_sck_pins: i2c_ao_sck_pins {
1784 groups = "i2c_ao_sck";
1785 function = "i2c_ao";
1787 drive-strength-microamp = <3000>;
1791 i2c_ao_sda_pins: i2c_ao_sda {
1793 groups = "i2c_ao_sda";
1794 function = "i2c_ao";
1796 drive-strength-microamp = <3000>;
1800 i2c_ao_sck_e_pins: i2c_ao_sck_e {
1802 groups = "i2c_ao_sck_e";
1803 function = "i2c_ao";
1805 drive-strength-microamp = <3000>;
1809 i2c_ao_sda_e_pins: i2c_ao_sda_e {
1811 groups = "i2c_ao_sda_e";
1812 function = "i2c_ao";
1814 drive-strength-microamp = <3000>;
1818 mclk0_ao_pins: mclk0-ao {
1820 groups = "mclk0_ao";
1821 function = "mclk0_ao";
1823 drive-strength-microamp = <3000>;
1827 tdm_ao_b_din0_pins: tdm-ao-b-din0 {
1829 groups = "tdm_ao_b_din0";
1830 function = "tdm_ao_b";
1835 spdif_ao_out_pins: spdif-ao-out {
1837 groups = "spdif_ao_out";
1838 function = "spdif_ao_out";
1839 drive-strength-microamp = <500>;
1844 tdm_ao_b_din1_pins: tdm-ao-b-din1 {
1846 groups = "tdm_ao_b_din1";
1847 function = "tdm_ao_b";
1852 tdm_ao_b_din2_pins: tdm-ao-b-din2 {
1854 groups = "tdm_ao_b_din2";
1855 function = "tdm_ao_b";
1860 tdm_ao_b_dout0_pins: tdm-ao-b-dout0 {
1862 groups = "tdm_ao_b_dout0";
1863 function = "tdm_ao_b";
1865 drive-strength-microamp = <3000>;
1869 tdm_ao_b_dout1_pins: tdm-ao-b-dout1 {
1871 groups = "tdm_ao_b_dout1";
1872 function = "tdm_ao_b";
1874 drive-strength-microamp = <3000>;
1878 tdm_ao_b_dout2_pins: tdm-ao-b-dout2 {
1880 groups = "tdm_ao_b_dout2";
1881 function = "tdm_ao_b";
1883 drive-strength-microamp = <3000>;
1887 tdm_ao_b_fs_pins: tdm-ao-b-fs {
1889 groups = "tdm_ao_b_fs";
1890 function = "tdm_ao_b";
1892 drive-strength-microamp = <3000>;
1896 tdm_ao_b_sclk_pins: tdm-ao-b-sclk {
1898 groups = "tdm_ao_b_sclk";
1899 function = "tdm_ao_b";
1901 drive-strength-microamp = <3000>;
1905 tdm_ao_b_slv_fs_pins: tdm-ao-b-slv-fs {
1907 groups = "tdm_ao_b_slv_fs";
1908 function = "tdm_ao_b";
1913 tdm_ao_b_slv_sclk_pins: tdm-ao-b-slv-sclk {
1915 groups = "tdm_ao_b_slv_sclk";
1916 function = "tdm_ao_b";
1921 uart_ao_a_pins: uart-a-ao {
1923 groups = "uart_ao_a_tx",
1925 function = "uart_ao_a";
1930 uart_ao_a_cts_rts_pins: uart-ao-a-cts-rts {
1932 groups = "uart_ao_a_cts",
1934 function = "uart_ao_a";
1939 pwm_a_e_pins: pwm-a-e {
1942 function = "pwm_a_e";
1947 pwm_ao_a_pins: pwm-ao-a {
1949 groups = "pwm_ao_a";
1950 function = "pwm_ao_a";
1955 pwm_ao_b_pins: pwm-ao-b {
1957 groups = "pwm_ao_b";
1958 function = "pwm_ao_b";
1963 pwm_ao_c_4_pins: pwm-ao-c-4 {
1965 groups = "pwm_ao_c_4";
1966 function = "pwm_ao_c";
1971 pwm_ao_c_6_pins: pwm-ao-c-6 {
1973 groups = "pwm_ao_c_6";
1974 function = "pwm_ao_c";
1979 pwm_ao_d_5_pins: pwm-ao-d-5 {
1981 groups = "pwm_ao_d_5";
1982 function = "pwm_ao_d";
1987 pwm_ao_d_10_pins: pwm-ao-d-10 {
1989 groups = "pwm_ao_d_10";
1990 function = "pwm_ao_d";
1995 pwm_ao_d_e_pins: pwm-ao-d-e {
1997 groups = "pwm_ao_d_e";
1998 function = "pwm_ao_d";
2002 remote_input_ao_pins: remote-input-ao {
2004 groups = "remote_ao_input";
2005 function = "remote_ao_input";
2013 compatible = "amlogic,meson-vrtc";
2014 reg = <0x0 0x000a8 0x0 0x4>;
2018 compatible = "amlogic,meson-gx-ao-cec";
2019 reg = <0x0 0x00100 0x0 0x14>;
2020 interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
2021 clocks = <&clkc_AO CLKID_AO_CEC>;
2022 clock-names = "core";
2023 status = "disabled";
2026 sec_AO: ao-secure@140 {
2027 compatible = "amlogic,meson-gx-ao-secure", "syscon";
2028 reg = <0x0 0x140 0x0 0x140>;
2029 amlogic,has-chip-id;
2033 compatible = "amlogic,meson-g12a-ao-cec";
2034 reg = <0x0 0x00280 0x0 0x1c>;
2035 interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
2036 clocks = <&clkc_AO CLKID_AO_CTS_OSCIN>;
2037 clock-names = "oscin";
2038 status = "disabled";
2041 pwm_AO_cd: pwm@2000 {
2042 compatible = "amlogic,meson-g12a-ao-pwm-cd";
2043 reg = <0x0 0x2000 0x0 0x20>;
2045 status = "disabled";
2048 uart_AO: serial@3000 {
2049 compatible = "amlogic,meson-gx-uart",
2050 "amlogic,meson-ao-uart";
2051 reg = <0x0 0x3000 0x0 0x18>;
2052 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
2053 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART>, <&xtal>;
2054 clock-names = "xtal", "pclk", "baud";
2055 status = "disabled";
2058 uart_AO_B: serial@4000 {
2059 compatible = "amlogic,meson-gx-uart",
2060 "amlogic,meson-ao-uart";
2061 reg = <0x0 0x4000 0x0 0x18>;
2062 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
2063 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
2064 clock-names = "xtal", "pclk", "baud";
2065 status = "disabled";
2069 compatible = "amlogic,meson-axg-i2c";
2070 status = "disabled";
2071 reg = <0x0 0x05000 0x0 0x20>;
2072 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
2073 #address-cells = <1>;
2075 clocks = <&clkc CLKID_I2C>;
2078 pwm_AO_ab: pwm@7000 {
2079 compatible = "amlogic,meson-g12a-ao-pwm-ab";
2080 reg = <0x0 0x7000 0x0 0x20>;
2082 status = "disabled";
2086 compatible = "amlogic,meson-gxbb-ir";
2087 reg = <0x0 0x8000 0x0 0x20>;
2088 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
2089 status = "disabled";
2093 compatible = "amlogic,meson-g12a-saradc",
2094 "amlogic,meson-saradc";
2095 reg = <0x0 0x9000 0x0 0x48>;
2096 #io-channel-cells = <1>;
2097 interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
2099 <&clkc_AO CLKID_AO_SAR_ADC>,
2100 <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
2101 <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
2102 clock-names = "clkin", "core", "adc_clk", "adc_sel";
2103 status = "disabled";
2107 vdec: video-decoder@ff620000 {
2108 compatible = "amlogic,g12a-vdec";
2109 reg = <0x0 0xff620000 0x0 0x10000>,
2110 <0x0 0xffd0e180 0x0 0xe4>;
2111 reg-names = "dos", "esparser";
2112 interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
2113 <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
2114 interrupt-names = "vdec", "esparser";
2116 amlogic,ao-sysctrl = <&rti>;
2117 amlogic,canvas = <&canvas>;
2119 clocks = <&clkc CLKID_PARSER>,
2121 <&clkc CLKID_VDEC_1>,
2122 <&clkc CLKID_VDEC_HEVC>,
2123 <&clkc CLKID_VDEC_HEVCF>;
2124 clock-names = "dos_parser", "dos", "vdec_1",
2125 "vdec_hevc", "vdec_hevcf";
2126 resets = <&reset RESET_PARSER>;
2127 reset-names = "esparser";
2131 compatible = "amlogic,meson-g12a-vpu";
2132 reg = <0x0 0xff900000 0x0 0x100000>,
2133 <0x0 0xff63c000 0x0 0x1000>;
2134 reg-names = "vpu", "hhi";
2135 interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
2136 #address-cells = <1>;
2138 amlogic,canvas = <&canvas>;
2140 /* CVBS VDAC output port */
2141 cvbs_vdac_port: port@0 {
2145 /* HDMI-TX output port */
2146 hdmi_tx_port: port@1 {
2149 hdmi_tx_out: endpoint {
2150 remote-endpoint = <&hdmi_tx_in>;
2155 gic: interrupt-controller@ffc01000 {
2156 compatible = "arm,gic-400";
2157 reg = <0x0 0xffc01000 0 0x1000>,
2158 <0x0 0xffc02000 0 0x2000>,
2159 <0x0 0xffc04000 0 0x2000>,
2160 <0x0 0xffc06000 0 0x2000>;
2161 interrupt-controller;
2162 interrupts = <GIC_PPI 9
2163 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2164 #interrupt-cells = <3>;
2165 #address-cells = <0>;
2168 cbus: bus@ffd00000 {
2169 compatible = "simple-bus";
2170 reg = <0x0 0xffd00000 0x0 0x100000>;
2171 #address-cells = <2>;
2173 ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>;
2175 reset: reset-controller@1004 {
2176 compatible = "amlogic,meson-axg-reset";
2177 reg = <0x0 0x1004 0x0 0x9c>;
2181 gpio_intc: interrupt-controller@f080 {
2182 compatible = "amlogic,meson-g12a-gpio-intc",
2183 "amlogic,meson-gpio-intc";
2184 reg = <0x0 0xf080 0x0 0x10>;
2185 interrupt-controller;
2186 #interrupt-cells = <2>;
2187 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
2190 watchdog: watchdog@f0d0 {
2191 compatible = "amlogic,meson-gxbb-wdt";
2192 reg = <0x0 0xf0d0 0x0 0x10>;
2197 compatible = "amlogic,meson-g12a-spicc";
2198 reg = <0x0 0x13000 0x0 0x44>;
2199 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
2200 clocks = <&clkc CLKID_SPICC0>,
2201 <&clkc CLKID_SPICC0_SCLK>;
2202 clock-names = "core", "pclk";
2203 #address-cells = <1>;
2205 status = "disabled";
2209 compatible = "amlogic,meson-g12a-spicc";
2210 reg = <0x0 0x15000 0x0 0x44>;
2211 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
2212 clocks = <&clkc CLKID_SPICC1>,
2213 <&clkc CLKID_SPICC1_SCLK>;
2214 clock-names = "core", "pclk";
2215 #address-cells = <1>;
2217 status = "disabled";
2221 compatible = "amlogic,meson-gxbb-spifc";
2222 status = "disabled";
2223 reg = <0x0 0x14000 0x0 0x80>;
2224 #address-cells = <1>;
2226 clocks = <&clkc CLKID_CLK81>;
2230 compatible = "amlogic,meson-g12a-ee-pwm";
2231 reg = <0x0 0x19000 0x0 0x20>;
2233 status = "disabled";
2237 compatible = "amlogic,meson-g12a-ee-pwm";
2238 reg = <0x0 0x1a000 0x0 0x20>;
2240 status = "disabled";
2244 compatible = "amlogic,meson-g12a-ee-pwm";
2245 reg = <0x0 0x1b000 0x0 0x20>;
2247 status = "disabled";
2251 compatible = "amlogic,meson-axg-i2c";
2252 status = "disabled";
2253 reg = <0x0 0x1c000 0x0 0x20>;
2254 interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
2255 #address-cells = <1>;
2257 clocks = <&clkc CLKID_I2C>;
2261 compatible = "amlogic,meson-axg-i2c";
2262 status = "disabled";
2263 reg = <0x0 0x1d000 0x0 0x20>;
2264 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
2265 #address-cells = <1>;
2267 clocks = <&clkc CLKID_I2C>;
2271 compatible = "amlogic,meson-axg-i2c";
2272 status = "disabled";
2273 reg = <0x0 0x1e000 0x0 0x20>;
2274 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
2275 #address-cells = <1>;
2277 clocks = <&clkc CLKID_I2C>;
2281 compatible = "amlogic,meson-axg-i2c";
2282 status = "disabled";
2283 reg = <0x0 0x1f000 0x0 0x20>;
2284 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
2285 #address-cells = <1>;
2287 clocks = <&clkc CLKID_I2C>;
2290 clk_msr: clock-measure@18000 {
2291 compatible = "amlogic,meson-g12a-clk-measure";
2292 reg = <0x0 0x18000 0x0 0x10>;
2295 uart_C: serial@22000 {
2296 compatible = "amlogic,meson-gx-uart";
2297 reg = <0x0 0x22000 0x0 0x18>;
2298 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
2299 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
2300 clock-names = "xtal", "pclk", "baud";
2301 status = "disabled";
2304 uart_B: serial@23000 {
2305 compatible = "amlogic,meson-gx-uart";
2306 reg = <0x0 0x23000 0x0 0x18>;
2307 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
2308 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
2309 clock-names = "xtal", "pclk", "baud";
2310 status = "disabled";
2313 uart_A: serial@24000 {
2314 compatible = "amlogic,meson-gx-uart";
2315 reg = <0x0 0x24000 0x0 0x18>;
2316 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
2317 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
2318 clock-names = "xtal", "pclk", "baud";
2319 status = "disabled";
2323 sd_emmc_a: sd@ffe03000 {
2324 compatible = "amlogic,meson-axg-mmc";
2325 reg = <0x0 0xffe03000 0x0 0x800>;
2326 interrupts = <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
2327 status = "disabled";
2328 clocks = <&clkc CLKID_SD_EMMC_A>,
2329 <&clkc CLKID_SD_EMMC_A_CLK0>,
2330 <&clkc CLKID_FCLK_DIV2>;
2331 clock-names = "core", "clkin0", "clkin1";
2332 resets = <&reset RESET_SD_EMMC_A>;
2335 sd_emmc_b: sd@ffe05000 {
2336 compatible = "amlogic,meson-axg-mmc";
2337 reg = <0x0 0xffe05000 0x0 0x800>;
2338 interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
2339 status = "disabled";
2340 clocks = <&clkc CLKID_SD_EMMC_B>,
2341 <&clkc CLKID_SD_EMMC_B_CLK0>,
2342 <&clkc CLKID_FCLK_DIV2>;
2343 clock-names = "core", "clkin0", "clkin1";
2344 resets = <&reset RESET_SD_EMMC_B>;
2347 sd_emmc_c: mmc@ffe07000 {
2348 compatible = "amlogic,meson-axg-mmc";
2349 reg = <0x0 0xffe07000 0x0 0x800>;
2350 interrupts = <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>;
2351 status = "disabled";
2352 clocks = <&clkc CLKID_SD_EMMC_C>,
2353 <&clkc CLKID_SD_EMMC_C_CLK0>,
2354 <&clkc CLKID_FCLK_DIV2>;
2355 clock-names = "core", "clkin0", "clkin1";
2356 resets = <&reset RESET_SD_EMMC_C>;
2360 status = "disabled";
2361 compatible = "amlogic,meson-g12a-usb-ctrl";
2362 reg = <0x0 0xffe09000 0x0 0xa0>;
2363 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2364 #address-cells = <2>;
2368 clocks = <&clkc CLKID_USB>;
2369 resets = <&reset RESET_USB>;
2373 phys = <&usb2_phy0>, <&usb2_phy1>,
2374 <&usb3_pcie_phy PHY_TYPE_USB3>;
2375 phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
2377 dwc2: usb@ff400000 {
2378 compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
2379 reg = <0x0 0xff400000 0x0 0x40000>;
2380 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
2381 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
2382 clock-names = "otg";
2383 phys = <&usb2_phy1>;
2384 phy-names = "usb2-phy";
2385 dr_mode = "peripheral";
2386 g-rx-fifo-size = <192>;
2387 g-np-tx-fifo-size = <128>;
2388 g-tx-fifo-size = <128 128 16 16 16>;
2391 dwc3: usb@ff500000 {
2392 compatible = "snps,dwc3";
2393 reg = <0x0 0xff500000 0x0 0x100000>;
2394 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
2396 snps,dis_u2_susphy_quirk;
2397 snps,quirk-frame-length-adjustment = <0x20>;
2398 snps,parkmode-disable-ss-quirk;
2402 mali: gpu@ffe40000 {
2403 compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
2404 reg = <0x0 0xffe40000 0x0 0x40000>;
2405 interrupt-parent = <&gic>;
2406 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
2407 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
2408 <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
2409 interrupt-names = "job", "mmu", "gpu";
2410 clocks = <&clkc CLKID_MALI>;
2411 resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
2412 operating-points-v2 = <&gpu_opp_table>;
2413 #cooling-cells = <2>;
2418 compatible = "arm,armv8-timer";
2419 interrupts = <GIC_PPI 13
2420 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2422 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2424 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2426 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
2427 arm,no-tick-in-suspend;
2431 compatible = "fixed-clock";
2432 clock-frequency = <24000000>;
2433 clock-output-names = "xtal";