arch/arm64/boot/dts/amlogic/meson-axg-s400.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
   4  */
   5
   6 /dts-v1/;
   7
   8 #include "meson-axg.dtsi"
   9
  10 / {
  11         compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg";
  12         model = "Amlogic Meson AXG S400 Development Board";
  13
  14         aliases {
  15                 serial0 = &uart_AO;
  16                 serial1 = &uart_A;
  17         };
  18
  19         vddio_boot: regulator-vddio_boot {
  20                 compatible = "regulator-fixed";
  21                 regulator-name = "VDDIO_BOOT";
  22                 regulator-min-microvolt = <1800000>;
  23                 regulator-max-microvolt = <1800000>;
  24         };
  25
  26         vddao_3v3: regulator-vddao_3v3 {
  27                 compatible = "regulator-fixed";
  28                 regulator-name = "VDDAO_3V3";
  29                 regulator-min-microvolt = <3300000>;
  30                 regulator-max-microvolt = <3300000>;
  31         };
  32
  33         vddio_ao18: regulator-vddio_ao18 {
  34                 compatible = "regulator-fixed";
  35                 regulator-name = "VDDIO_AO18";
  36                 regulator-min-microvolt = <1800000>;
  37                 regulator-max-microvolt = <1800000>;
  38         };
  39
  40         vcc_3v3: regulator-vcc_3v3 {
  41                 compatible = "regulator-fixed";
  42                 regulator-name = "VCC_3V3";
  43                 regulator-min-microvolt = <3300000>;
  44                 regulator-max-microvolt = <3300000>;
  45         };
  46
  47         emmc_pwrseq: emmc-pwrseq {
  48                 compatible = "mmc-pwrseq-emmc";
  49                 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
  50         };
  51
  52         sdio_pwrseq: sdio-pwrseq {
  53                 compatible = "mmc-pwrseq-simple";
  54                 reset-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>;
  55                 clocks = <&wifi32k>;
  56                 clock-names = "ext_clock";
  57         };
  58
  59         wifi32k: wifi32k {
  60                 compatible = "pwm-clock";
  61                 #clock-cells = <0>;
  62                 clock-frequency = <32768>;
  63                 pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */
  64         };
  65
  66         speaker-leds {
  67                 compatible = "gpio-leds";
  68
  69                 aled1 {
  70                         label = "speaker:aled1";
  71                         gpios = <&gpio_speaker 7 0>;
  72                 };
  73
  74                 aled2 {
  75                         label = "speaker:aled2";
  76                         gpios = <&gpio_speaker 6 0>;
  77                 };
  78
  79                 aled3 {
  80                         label = "speaker:aled3";
  81                         gpios = <&gpio_speaker 5 0>;
  82                 };
  83
  84                 aled4 {
  85                         label = "speaker:aled4";
  86                         gpios = <&gpio_speaker 4 0>;
  87                 };
  88
  89                 aled5 {
  90                         label = "speaker:aled5";
  91                         gpios = <&gpio_speaker 3 0>;
  92                 };
  93
  94                 aled6 {
  95                         label = "speaker:aled6";
  96                         gpios = <&gpio_speaker 2 0>;
  97                 };
  98         };
  99 };
 100
 101 &ethmac {
 102         status = "okay";
 103         phy-mode = "rgmii";
 104         pinctrl-0 = <&eth_rgmii_y_pins>;
 105         pinctrl-names = "default";
 106 };
 107
 108 &uart_A {
 109         status = "okay";
 110         pinctrl-0 = <&uart_a_pins>;
 111         pinctrl-names = "default";
 112 };
 113
 114 &uart_AO {
 115         status = "okay";
 116         pinctrl-0 = <&uart_ao_a_pins>;
 117         pinctrl-names = "default";
 118 };
 119
 120 &ir {
 121         status = "okay";
 122         pinctrl-0 = <&remote_input_ao_pins>;
 123         pinctrl-names = "default";
 124 };
 125
 126 &i2c1 {
 127         status = "okay";
 128         pinctrl-0 = <&i2c1_z_pins>;
 129         pinctrl-names = "default";
 130 };
 131
 132 &i2c_AO {
 133         status = "okay";
 134         pinctrl-0 = <&i2c_ao_sck_10_pins>, <&i2c_ao_sda_11_pins>;
 135         pinctrl-names = "default";
 136
 137         gpio_speaker: gpio-controller@1f {
 138                 compatible = "nxp,pca9557";
 139                 reg = <0x1f>;
 140                 gpio-controller;
 141                 #gpio-cells = <2>;
 142                 vcc-supply = <&vddao_3v3>;
 143         };
 144 };
 145
 146 &pwm_ab {
 147         status = "okay";
 148         pinctrl-0 = <&pwm_a_x20_pins>;
 149         pinctrl-names = "default";
 150 };
 151
 152 /* emmc storage */
 153 &sd_emmc_c {
 154         status = "okay";
 155         pinctrl-0 = <&emmc_pins>;
 156         pinctrl-1 = <&emmc_clk_gate_pins>;
 157         pinctrl-names = "default", "clk-gate";
 158
 159         bus-width = <8>;
 160         cap-sd-highspeed;
 161         cap-mmc-highspeed;
 162         max-frequency = <180000000>;
 163         non-removable;
 164         disable-wp;
 165         mmc-ddr-1_8v;
 166         mmc-hs200-1_8v;
 167
 168         vmmc-supply = <&vcc_3v3>;
 169         vqmmc-supply = <&vddio_boot>;
 170 };
 171
 172 /* wifi module */
 173 &sd_emmc_b {
 174         status = "okay";
 175         #address-cells = <1>;
 176         #size-cells = <0>;
 177
 178         pinctrl-0 = <&sdio_pins>;
 179         pinctrl-1 = <&sdio_clk_gate_pins>;
 180         pinctrl-names = "default", "clk-gate";
 181
 182         bus-width = <4>;
 183         cap-sd-highspeed;
 184         max-frequency = <100000000>;
 185         non-removable;
 186         disable-wp;
 187
 188         mmc-pwrseq = <&sdio_pwrseq>;
 189
 190         vmmc-supply = <&vddao_3v3>;
 191         vqmmc-supply = <&vddio_boot>;
 192
 193         brcmf: wifi@1 {
 194                 reg = <1>;
 195                 compatible = "brcm,bcm4329-fmac";
 196         };
 197 };