Merge tag 'nfs-for-4.17-2' of git://git.linux-nfs.org/projects/anna/linux-nfs
[linux-2.6-microblaze.git] / arch / arm64 / boot / dts / allwinner / sun50i-a64-bananapi-m64.dts
1 /*
2  * Copyright (c) 2016 ARM Ltd.
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This library is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This library is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 /dts-v1/;
44
45 #include "sun50i-a64.dtsi"
46
47 #include <dt-bindings/gpio/gpio.h>
48
49 / {
50         model = "BananaPi-M64";
51         compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
52
53         aliases {
54                 ethernet0 = &emac;
55                 serial0 = &uart0;
56                 serial1 = &uart1;
57         };
58
59         chosen {
60                 stdout-path = "serial0:115200n8";
61         };
62
63         leds {
64                 compatible = "gpio-leds";
65
66                 pwr-led {
67                         label = "bananapi-m64:red:pwr";
68                         gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
69                         default-state = "on";
70                 };
71
72                 green {
73                         label = "bananapi-m64:green:user";
74                         gpios = <&pio 4 14 GPIO_ACTIVE_HIGH>; /* PE14 */
75                 };
76
77                 blue {
78                         label = "bananapi-m64:blue:user";
79                         gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */
80                 };
81         };
82
83         wifi_pwrseq: wifi_pwrseq {
84                 compatible = "mmc-pwrseq-simple";
85                 reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
86         };
87 };
88
89 &ehci1 {
90         status = "okay";
91 };
92
93 &emac {
94         pinctrl-names = "default";
95         pinctrl-0 = <&rgmii_pins>;
96         phy-mode = "rgmii";
97         phy-handle = <&ext_rgmii_phy>;
98         phy-supply = <&reg_dc1sw>;
99         status = "okay";
100 };
101
102 &i2c1 {
103         pinctrl-names = "default";
104         pinctrl-0 = <&i2c1_pins>;
105         status = "okay";
106 };
107
108 &i2c1_pins {
109         bias-pull-up;
110 };
111
112 &mdio {
113         ext_rgmii_phy: ethernet-phy@1 {
114                 compatible = "ethernet-phy-ieee802.3-c22";
115                 reg = <1>;
116         };
117 };
118
119 &mmc0 {
120         pinctrl-names = "default";
121         pinctrl-0 = <&mmc0_pins>;
122         vmmc-supply = <&reg_dcdc1>;
123         cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
124         disable-wp;
125         bus-width = <4>;
126         status = "okay";
127 };
128
129 &mmc1 {
130         pinctrl-names = "default";
131         pinctrl-0 = <&mmc1_pins>;
132         vmmc-supply = <&reg_dldo2>;
133         vqmmc-supply = <&reg_dldo4>;
134         mmc-pwrseq = <&wifi_pwrseq>;
135         bus-width = <4>;
136         non-removable;
137         status = "okay";
138
139         brcmf: wifi@1 {
140                 reg = <1>;
141                 compatible = "brcm,bcm4329-fmac";
142                 interrupt-parent = <&r_pio>;
143                 interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
144                 interrupt-names = "host-wake";
145         };
146 };
147
148 &mmc2 {
149         pinctrl-names = "default";
150         pinctrl-0 = <&mmc2_pins>;
151         vmmc-supply = <&reg_dcdc1>;
152         bus-width = <8>;
153         non-removable;
154         cap-mmc-hw-reset;
155         status = "okay";
156 };
157
158 &ohci1 {
159         status = "okay";
160 };
161
162 &r_rsb {
163         status = "okay";
164
165         axp803: pmic@3a3 {
166                 compatible = "x-powers,axp803";
167                 reg = <0x3a3>;
168                 interrupt-parent = <&r_intc>;
169                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
170         };
171 };
172
173 #include "axp803.dtsi"
174
175 &reg_aldo1 {
176         /*
177          * This regulator also drives the PE pingroup GPIOs,
178          * which also controls two LEDs.
179          */
180         regulator-always-on;
181         regulator-min-microvolt = <2800000>;
182         regulator-max-microvolt = <2800000>;
183         regulator-name = "afvcc-csi";
184 };
185
186 &reg_aldo2 {
187         regulator-always-on;
188         regulator-min-microvolt = <1800000>;
189         regulator-max-microvolt = <3300000>;
190         regulator-name = "vcc-pl";
191 };
192
193 &reg_aldo3 {
194         regulator-always-on;
195         regulator-min-microvolt = <3000000>;
196         regulator-max-microvolt = <3000000>;
197         regulator-name = "vcc-pll-avcc";
198 };
199
200 &reg_dc1sw {
201         /*
202          * This regulator also indirectly drives the PD pingroup GPIOs,
203          * which also controls the power LED.
204          */
205         regulator-always-on;
206         regulator-name = "vcc-phy";
207 };
208
209 &reg_dcdc1 {
210         regulator-always-on;
211         regulator-min-microvolt = <3300000>;
212         regulator-max-microvolt = <3300000>;
213         regulator-name = "vcc-3v3";
214 };
215
216 &reg_dcdc2 {
217         regulator-always-on;
218         regulator-min-microvolt = <1040000>;
219         regulator-max-microvolt = <1300000>;
220         regulator-name = "vdd-cpux";
221 };
222
223 /* DCDC3 is polyphased with DCDC2 */
224
225 &reg_dcdc5 {
226         regulator-always-on;
227         regulator-min-microvolt = <1500000>;
228         regulator-max-microvolt = <1500000>;
229         regulator-name = "vcc-dram";
230 };
231
232 &reg_dcdc6 {
233         regulator-always-on;
234         regulator-min-microvolt = <1100000>;
235         regulator-max-microvolt = <1100000>;
236         regulator-name = "vdd-sys";
237 };
238
239 &reg_dldo1 {
240         regulator-min-microvolt = <3300000>;
241         regulator-max-microvolt = <3300000>;
242         regulator-name = "vcc-hdmi-dsi";
243 };
244
245 &reg_dldo2 {
246         regulator-min-microvolt = <3300000>;
247         regulator-max-microvolt = <3300000>;
248         regulator-name = "vcc-wifi";
249 };
250
251 &reg_dldo4 {
252         regulator-min-microvolt = <1800000>;
253         regulator-max-microvolt = <3300000>;
254         regulator-name = "vcc-wifi-io";
255 };
256
257 &reg_eldo1 {
258         regulator-min-microvolt = <1800000>;
259         regulator-max-microvolt = <1800000>;
260         regulator-name = "cpvdd";
261 };
262
263 &reg_fldo1 {
264         regulator-min-microvolt = <1200000>;
265         regulator-max-microvolt = <1200000>;
266         regulator-name = "vcc-1v2-hsic";
267 };
268
269 /*
270  * The A64 chip cannot work without this regulator off, although
271  * it seems to be only driving the AR100 core.
272  * Maybe we don't still know well about CPUs domain.
273  */
274 &reg_fldo2 {
275         regulator-always-on;
276         regulator-min-microvolt = <1100000>;
277         regulator-max-microvolt = <1100000>;
278         regulator-name = "vdd-cpus";
279 };
280
281 &reg_rtc_ldo {
282         regulator-name = "vcc-rtc";
283 };
284
285 &uart0 {
286         pinctrl-names = "default";
287         pinctrl-0 = <&uart0_pins_a>;
288         status = "okay";
289 };
290
291 &uart1 {
292         pinctrl-names = "default";
293         pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
294         status = "okay";
295 };
296
297 &usbphy {
298         status = "okay";
299 };