2 * Based on linux/arch/arm/pmsa-v7.c
4 * ARM PMSAv8 supporting functions.
7 #include <linux/memblock.h>
8 #include <linux/range.h>
11 #include <asm/cputype.h>
14 #include <asm/memory.h>
15 #include <asm/sections.h>
19 #ifndef CONFIG_CPU_V7M
21 #define PRSEL __ACCESS_CP15(c6, 0, c2, 1)
22 #define PRBAR __ACCESS_CP15(c6, 0, c3, 0)
23 #define PRLAR __ACCESS_CP15(c6, 0, c3, 1)
25 static inline u32 prlar_read(void)
27 return read_sysreg(PRLAR);
30 static inline u32 prbar_read(void)
32 return read_sysreg(PRBAR);
35 static inline void prsel_write(u32 v)
37 write_sysreg(v, PRSEL);
40 static inline void prbar_write(u32 v)
42 write_sysreg(v, PRBAR);
45 static inline void prlar_write(u32 v)
47 write_sysreg(v, PRLAR);
51 static inline u32 prlar_read(void)
53 return readl_relaxed(BASEADDR_V7M_SCB + PMSAv8_RLAR);
56 static inline u32 prbar_read(void)
58 return readl_relaxed(BASEADDR_V7M_SCB + PMSAv8_RBAR);
61 static inline void prsel_write(u32 v)
63 writel_relaxed(v, BASEADDR_V7M_SCB + PMSAv8_RNR);
66 static inline void prbar_write(u32 v)
68 writel_relaxed(v, BASEADDR_V7M_SCB + PMSAv8_RBAR);
71 static inline void prlar_write(u32 v)
73 writel_relaxed(v, BASEADDR_V7M_SCB + PMSAv8_RLAR);
78 static struct range __initdata io[MPU_MAX_REGIONS];
79 static struct range __initdata mem[MPU_MAX_REGIONS];
81 static unsigned int __initdata mpu_max_regions;
83 static __init bool is_region_fixed(int number)
86 case PMSAv8_XIP_REGION:
87 case PMSAv8_KERNEL_REGION:
94 void __init pmsav8_adjust_lowmem_bounds(void)
97 phys_addr_t reg_start, reg_end;
100 for_each_mem_range(i, ®_start, ®_end) {
102 phys_addr_t phys_offset = PHYS_OFFSET;
105 * Initially only use memory continuous from
107 if (reg_start != phys_offset)
108 panic("First memory bank must be contiguous from PHYS_OFFSET");
112 * memblock auto merges contiguous blocks, remove
113 * all blocks afterwards in one go (we can't remove
114 * blocks separately while iterating)
116 pr_notice("Ignoring RAM after %pa, memory at %pa ignored\n",
117 &mem_end, ®_start);
118 memblock_remove(reg_start, 0 - reg_start);
124 static int __init __mpu_max_regions(void)
126 static int max_regions;
132 mpuir = read_cpuid_mputype();
134 max_regions = (mpuir & MPUIR_DREGION_SZMASK) >> MPUIR_DREGION;
139 static int __init __pmsav8_setup_region(unsigned int number, u32 bar, u32 lar)
141 if (number > mpu_max_regions
142 || number >= MPU_MAX_REGIONS)
151 mpu_rgn_info.rgns[number].prbar = bar;
152 mpu_rgn_info.rgns[number].prlar = lar;
159 static int __init pmsav8_setup_ram(unsigned int number, phys_addr_t start,phys_addr_t end)
163 if (is_region_fixed(number))
167 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1);
169 bar |= PMSAv8_AP_PL1RW_PL0RW | PMSAv8_RGN_SHARED;
170 lar |= PMSAv8_LAR_IDX(PMSAv8_RGN_NORMAL) | PMSAv8_LAR_EN;
172 return __pmsav8_setup_region(number, bar, lar);
175 static int __init pmsav8_setup_io(unsigned int number, phys_addr_t start,phys_addr_t end)
179 if (is_region_fixed(number))
183 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1);
185 bar |= PMSAv8_AP_PL1RW_PL0RW | PMSAv8_RGN_SHARED | PMSAv8_BAR_XN;
186 lar |= PMSAv8_LAR_IDX(PMSAv8_RGN_DEVICE_nGnRnE) | PMSAv8_LAR_EN;
188 return __pmsav8_setup_region(number, bar, lar);
191 static int __init pmsav8_setup_fixed(unsigned int number, phys_addr_t start,phys_addr_t end)
195 if (!is_region_fixed(number))
199 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1);
201 bar |= PMSAv8_AP_PL1RW_PL0NA | PMSAv8_RGN_SHARED;
202 lar |= PMSAv8_LAR_IDX(PMSAv8_RGN_NORMAL) | PMSAv8_LAR_EN;
207 if (prbar_read() != bar || prlar_read() != lar)
210 /* Reserved region was set up early, we just need a record for secondaries */
211 mpu_rgn_info.rgns[number].prbar = bar;
212 mpu_rgn_info.rgns[number].prlar = lar;
219 #ifndef CONFIG_CPU_V7M
220 static int __init pmsav8_setup_vector(unsigned int number, phys_addr_t start,phys_addr_t end)
224 if (number == PMSAv8_KERNEL_REGION)
228 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1);
230 bar |= PMSAv8_AP_PL1RW_PL0NA | PMSAv8_RGN_SHARED;
231 lar |= PMSAv8_LAR_IDX(PMSAv8_RGN_NORMAL) | PMSAv8_LAR_EN;
233 return __pmsav8_setup_region(number, bar, lar);
237 void __init pmsav8_setup(void)
240 int region = PMSAv8_KERNEL_REGION;
242 /* How many regions are supported ? */
243 mpu_max_regions = __mpu_max_regions();
245 /* RAM: single chunk of memory */
246 add_range(mem, ARRAY_SIZE(mem), 0, memblock.memory.regions[0].base,
247 memblock.memory.regions[0].base + memblock.memory.regions[0].size);
249 /* IO: cover full 4G range */
250 add_range(io, ARRAY_SIZE(io), 0, 0, 0xffffffff);
252 /* RAM and IO: exclude kernel */
253 subtract_range(mem, ARRAY_SIZE(mem), __pa(KERNEL_START), __pa(KERNEL_END));
254 subtract_range(io, ARRAY_SIZE(io), __pa(KERNEL_START), __pa(KERNEL_END));
256 #ifdef CONFIG_XIP_KERNEL
257 /* RAM and IO: exclude xip */
258 subtract_range(mem, ARRAY_SIZE(mem), CONFIG_XIP_PHYS_ADDR, __pa(_exiprom));
259 subtract_range(io, ARRAY_SIZE(io), CONFIG_XIP_PHYS_ADDR, __pa(_exiprom));
262 #ifndef CONFIG_CPU_V7M
263 /* RAM and IO: exclude vectors */
264 subtract_range(mem, ARRAY_SIZE(mem), vectors_base, vectors_base + 2 * PAGE_SIZE);
265 subtract_range(io, ARRAY_SIZE(io), vectors_base, vectors_base + 2 * PAGE_SIZE);
267 /* IO: exclude RAM */
268 for (i = 0; i < ARRAY_SIZE(mem); i++)
269 subtract_range(io, ARRAY_SIZE(io), mem[i].start, mem[i].end);
271 /* Now program MPU */
273 #ifdef CONFIG_XIP_KERNEL
275 err |= pmsav8_setup_fixed(PMSAv8_XIP_REGION, CONFIG_XIP_PHYS_ADDR, __pa(_exiprom));
278 err |= pmsav8_setup_fixed(region++, __pa(KERNEL_START), __pa(KERNEL_END));
282 for (i = 0; i < ARRAY_SIZE(io); i++) {
286 err |= pmsav8_setup_io(region++, io[i].start, io[i].end);
290 for (i = 0; i < ARRAY_SIZE(mem); i++) {
294 err |= pmsav8_setup_ram(region++, mem[i].start, mem[i].end);
298 #ifndef CONFIG_CPU_V7M
299 err |= pmsav8_setup_vector(region++, vectors_base, vectors_base + 2 * PAGE_SIZE);
302 pr_warn("MPU region initialization failure! %d", err);
304 pr_info("Using ARM PMSAv8 Compliant MPU. Used %d of %d regions\n",
305 mpu_rgn_info.used, mpu_max_regions);