2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/bootmem.h>
13 #include <linux/module.h>
15 #include <linux/genalloc.h>
16 #include <linux/gfp.h>
17 #include <linux/errno.h>
18 #include <linux/list.h>
19 #include <linux/init.h>
20 #include <linux/device.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/dma-contiguous.h>
23 #include <linux/highmem.h>
24 #include <linux/memblock.h>
25 #include <linux/slab.h>
26 #include <linux/iommu.h>
28 #include <linux/vmalloc.h>
29 #include <linux/sizes.h>
30 #include <linux/cma.h>
32 #include <asm/memory.h>
33 #include <asm/highmem.h>
34 #include <asm/cacheflush.h>
35 #include <asm/tlbflush.h>
36 #include <asm/mach/arch.h>
37 #include <asm/dma-iommu.h>
38 #include <asm/mach/map.h>
39 #include <asm/system_info.h>
40 #include <asm/dma-contiguous.h>
45 struct arm_dma_alloc_args {
55 struct arm_dma_free_args {
66 struct arm_dma_allocator {
67 void *(*alloc)(struct arm_dma_alloc_args *args,
68 struct page **ret_page);
69 void (*free)(struct arm_dma_free_args *args);
72 struct arm_dma_buffer {
73 struct list_head list;
75 struct arm_dma_allocator *allocator;
78 static LIST_HEAD(arm_dma_bufs);
79 static DEFINE_SPINLOCK(arm_dma_bufs_lock);
81 static struct arm_dma_buffer *arm_dma_buffer_find(void *virt)
83 struct arm_dma_buffer *buf, *found = NULL;
86 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
87 list_for_each_entry(buf, &arm_dma_bufs, list) {
88 if (buf->virt == virt) {
94 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
99 * The DMA API is built upon the notion of "buffer ownership". A buffer
100 * is either exclusively owned by the CPU (and therefore may be accessed
101 * by it) or exclusively owned by the DMA device. These helper functions
102 * represent the transitions between these two ownership states.
104 * Note, however, that on later ARMs, this notion does not work due to
105 * speculative prefetches. We model our approach on the assumption that
106 * the CPU does do speculative prefetches, which means we clean caches
107 * before transfers and delay cache invalidation until transfer completion.
110 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
111 size_t, enum dma_data_direction);
112 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
113 size_t, enum dma_data_direction);
116 * arm_dma_map_page - map a portion of a page for streaming DMA
117 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
118 * @page: page that buffer resides in
119 * @offset: offset into page for start of buffer
120 * @size: size of buffer to map
121 * @dir: DMA transfer direction
123 * Ensure that any data held in the cache is appropriately discarded
126 * The device owns this memory once this call has completed. The CPU
127 * can regain ownership by calling dma_unmap_page().
129 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
130 unsigned long offset, size_t size, enum dma_data_direction dir,
133 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
134 __dma_page_cpu_to_dev(page, offset, size, dir);
135 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
138 static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
139 unsigned long offset, size_t size, enum dma_data_direction dir,
142 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
146 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
147 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
148 * @handle: DMA address of buffer
149 * @size: size of buffer (same as passed to dma_map_page)
150 * @dir: DMA transfer direction (same as passed to dma_map_page)
152 * Unmap a page streaming mode DMA translation. The handle and size
153 * must match what was provided in the previous dma_map_page() call.
154 * All other usages are undefined.
156 * After this call, reads by the CPU to the buffer are guaranteed to see
157 * whatever the device wrote there.
159 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
160 size_t size, enum dma_data_direction dir, unsigned long attrs)
162 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
163 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
164 handle & ~PAGE_MASK, size, dir);
167 static void arm_dma_sync_single_for_cpu(struct device *dev,
168 dma_addr_t handle, size_t size, enum dma_data_direction dir)
170 unsigned int offset = handle & (PAGE_SIZE - 1);
171 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
172 __dma_page_dev_to_cpu(page, offset, size, dir);
175 static void arm_dma_sync_single_for_device(struct device *dev,
176 dma_addr_t handle, size_t size, enum dma_data_direction dir)
178 unsigned int offset = handle & (PAGE_SIZE - 1);
179 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
180 __dma_page_cpu_to_dev(page, offset, size, dir);
183 static int arm_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
185 return dma_addr == ARM_MAPPING_ERROR;
188 const struct dma_map_ops arm_dma_ops = {
189 .alloc = arm_dma_alloc,
190 .free = arm_dma_free,
191 .mmap = arm_dma_mmap,
192 .get_sgtable = arm_dma_get_sgtable,
193 .map_page = arm_dma_map_page,
194 .unmap_page = arm_dma_unmap_page,
195 .map_sg = arm_dma_map_sg,
196 .unmap_sg = arm_dma_unmap_sg,
197 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
198 .sync_single_for_device = arm_dma_sync_single_for_device,
199 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
200 .sync_sg_for_device = arm_dma_sync_sg_for_device,
201 .mapping_error = arm_dma_mapping_error,
202 .dma_supported = arm_dma_supported,
204 EXPORT_SYMBOL(arm_dma_ops);
206 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
207 dma_addr_t *handle, gfp_t gfp, unsigned long attrs);
208 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
209 dma_addr_t handle, unsigned long attrs);
210 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
211 void *cpu_addr, dma_addr_t dma_addr, size_t size,
212 unsigned long attrs);
214 const struct dma_map_ops arm_coherent_dma_ops = {
215 .alloc = arm_coherent_dma_alloc,
216 .free = arm_coherent_dma_free,
217 .mmap = arm_coherent_dma_mmap,
218 .get_sgtable = arm_dma_get_sgtable,
219 .map_page = arm_coherent_dma_map_page,
220 .map_sg = arm_dma_map_sg,
221 .mapping_error = arm_dma_mapping_error,
222 .dma_supported = arm_dma_supported,
224 EXPORT_SYMBOL(arm_coherent_dma_ops);
226 static int __dma_supported(struct device *dev, u64 mask, bool warn)
228 unsigned long max_dma_pfn;
231 * If the mask allows for more memory than we can address,
232 * and we actually have that much memory, then we must
233 * indicate that DMA to this device is not supported.
235 if (sizeof(mask) != sizeof(dma_addr_t) &&
236 mask > (dma_addr_t)~0 &&
237 dma_to_pfn(dev, ~0) < max_pfn - 1) {
239 dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
241 dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
246 max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
249 * Translate the device's DMA mask to a PFN limit. This
250 * PFN number includes the page which we can DMA to.
252 if (dma_to_pfn(dev, mask) < max_dma_pfn) {
254 dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
256 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
264 static u64 get_coherent_dma_mask(struct device *dev)
266 u64 mask = (u64)DMA_BIT_MASK(32);
269 mask = dev->coherent_dma_mask;
272 * Sanity check the DMA mask - it must be non-zero, and
273 * must be able to be satisfied by a DMA allocation.
276 dev_warn(dev, "coherent DMA mask is unset\n");
280 if (!__dma_supported(dev, mask, true))
287 static void __dma_clear_buffer(struct page *page, size_t size, int coherent_flag)
290 * Ensure that the allocated pages are zeroed, and that any data
291 * lurking in the kernel direct-mapped region is invalidated.
293 if (PageHighMem(page)) {
294 phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
295 phys_addr_t end = base + size;
297 void *ptr = kmap_atomic(page);
298 memset(ptr, 0, PAGE_SIZE);
299 if (coherent_flag != COHERENT)
300 dmac_flush_range(ptr, ptr + PAGE_SIZE);
305 if (coherent_flag != COHERENT)
306 outer_flush_range(base, end);
308 void *ptr = page_address(page);
309 memset(ptr, 0, size);
310 if (coherent_flag != COHERENT) {
311 dmac_flush_range(ptr, ptr + size);
312 outer_flush_range(__pa(ptr), __pa(ptr) + size);
318 * Allocate a DMA buffer for 'dev' of size 'size' using the
319 * specified gfp mask. Note that 'size' must be page aligned.
321 static struct page *__dma_alloc_buffer(struct device *dev, size_t size,
322 gfp_t gfp, int coherent_flag)
324 unsigned long order = get_order(size);
325 struct page *page, *p, *e;
327 page = alloc_pages(gfp, order);
332 * Now split the huge page and free the excess pages
334 split_page(page, order);
335 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
338 __dma_clear_buffer(page, size, coherent_flag);
344 * Free a DMA buffer. 'size' must be page aligned.
346 static void __dma_free_buffer(struct page *page, size_t size)
348 struct page *e = page + (size >> PAGE_SHIFT);
356 static void *__alloc_from_contiguous(struct device *dev, size_t size,
357 pgprot_t prot, struct page **ret_page,
358 const void *caller, bool want_vaddr,
359 int coherent_flag, gfp_t gfp);
361 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
362 pgprot_t prot, struct page **ret_page,
363 const void *caller, bool want_vaddr);
366 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
370 * DMA allocation can be mapped to user space, so lets
371 * set VM_USERMAP flags too.
373 return dma_common_contiguous_remap(page, size,
374 VM_ARM_DMA_CONSISTENT | VM_USERMAP,
378 static void __dma_free_remap(void *cpu_addr, size_t size)
380 dma_common_free_remap(cpu_addr, size,
381 VM_ARM_DMA_CONSISTENT | VM_USERMAP);
384 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
385 static struct gen_pool *atomic_pool __ro_after_init;
387 static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
389 static int __init early_coherent_pool(char *p)
391 atomic_pool_size = memparse(p, &p);
394 early_param("coherent_pool", early_coherent_pool);
397 * Initialise the coherent pool for atomic allocations.
399 static int __init atomic_pool_init(void)
401 pgprot_t prot = pgprot_dmacoherent(PAGE_KERNEL);
402 gfp_t gfp = GFP_KERNEL | GFP_DMA;
406 atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
410 * The atomic pool is only used for non-coherent allocations
411 * so we must pass NORMAL for coherent_flag.
413 if (dev_get_cma_area(NULL))
414 ptr = __alloc_from_contiguous(NULL, atomic_pool_size, prot,
415 &page, atomic_pool_init, true, NORMAL,
418 ptr = __alloc_remap_buffer(NULL, atomic_pool_size, gfp, prot,
419 &page, atomic_pool_init, true);
423 ret = gen_pool_add_virt(atomic_pool, (unsigned long)ptr,
425 atomic_pool_size, -1);
427 goto destroy_genpool;
429 gen_pool_set_algo(atomic_pool,
430 gen_pool_first_fit_order_align,
432 pr_info("DMA: preallocated %zu KiB pool for atomic coherent allocations\n",
433 atomic_pool_size / 1024);
438 gen_pool_destroy(atomic_pool);
441 pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
442 atomic_pool_size / 1024);
446 * CMA is activated by core_initcall, so we must be called after it.
448 postcore_initcall(atomic_pool_init);
450 struct dma_contig_early_reserve {
455 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
457 static int dma_mmu_remap_num __initdata;
459 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
461 dma_mmu_remap[dma_mmu_remap_num].base = base;
462 dma_mmu_remap[dma_mmu_remap_num].size = size;
466 void __init dma_contiguous_remap(void)
469 for (i = 0; i < dma_mmu_remap_num; i++) {
470 phys_addr_t start = dma_mmu_remap[i].base;
471 phys_addr_t end = start + dma_mmu_remap[i].size;
475 if (end > arm_lowmem_limit)
476 end = arm_lowmem_limit;
480 map.pfn = __phys_to_pfn(start);
481 map.virtual = __phys_to_virt(start);
482 map.length = end - start;
483 map.type = MT_MEMORY_DMA_READY;
486 * Clear previous low-memory mapping to ensure that the
487 * TLB does not see any conflicting entries, then flush
488 * the TLB of the old entries before creating new mappings.
490 * This ensures that any speculatively loaded TLB entries
491 * (even though they may be rare) can not cause any problems,
492 * and ensures that this code is architecturally compliant.
494 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
496 pmd_clear(pmd_off_k(addr));
498 flush_tlb_kernel_range(__phys_to_virt(start),
499 __phys_to_virt(end));
501 iotable_init(&map, 1);
505 static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
508 struct page *page = virt_to_page(addr);
509 pgprot_t prot = *(pgprot_t *)data;
511 set_pte_ext(pte, mk_pte(page, prot), 0);
515 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
517 unsigned long start = (unsigned long) page_address(page);
518 unsigned end = start + size;
520 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
521 flush_tlb_kernel_range(start, end);
524 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
525 pgprot_t prot, struct page **ret_page,
526 const void *caller, bool want_vaddr)
531 * __alloc_remap_buffer is only called when the device is
534 page = __dma_alloc_buffer(dev, size, gfp, NORMAL);
540 ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
542 __dma_free_buffer(page, size);
551 static void *__alloc_from_pool(size_t size, struct page **ret_page)
557 WARN(1, "coherent pool not initialised!\n");
561 val = gen_pool_alloc(atomic_pool, size);
563 phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
565 *ret_page = phys_to_page(phys);
572 static bool __in_atomic_pool(void *start, size_t size)
574 return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
577 static int __free_from_pool(void *start, size_t size)
579 if (!__in_atomic_pool(start, size))
582 gen_pool_free(atomic_pool, (unsigned long)start, size);
587 static void *__alloc_from_contiguous(struct device *dev, size_t size,
588 pgprot_t prot, struct page **ret_page,
589 const void *caller, bool want_vaddr,
590 int coherent_flag, gfp_t gfp)
592 unsigned long order = get_order(size);
593 size_t count = size >> PAGE_SHIFT;
597 page = dma_alloc_from_contiguous(dev, count, order, gfp);
601 __dma_clear_buffer(page, size, coherent_flag);
606 if (PageHighMem(page)) {
607 ptr = __dma_alloc_remap(page, size, GFP_KERNEL, prot, caller);
609 dma_release_from_contiguous(dev, page, count);
613 __dma_remap(page, size, prot);
614 ptr = page_address(page);
622 static void __free_from_contiguous(struct device *dev, struct page *page,
623 void *cpu_addr, size_t size, bool want_vaddr)
626 if (PageHighMem(page))
627 __dma_free_remap(cpu_addr, size);
629 __dma_remap(page, size, PAGE_KERNEL);
631 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
634 static inline pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot)
636 prot = (attrs & DMA_ATTR_WRITE_COMBINE) ?
637 pgprot_writecombine(prot) :
638 pgprot_dmacoherent(prot);
642 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
643 struct page **ret_page)
646 /* __alloc_simple_buffer is only called when the device is coherent */
647 page = __dma_alloc_buffer(dev, size, gfp, COHERENT);
652 return page_address(page);
655 static void *simple_allocator_alloc(struct arm_dma_alloc_args *args,
656 struct page **ret_page)
658 return __alloc_simple_buffer(args->dev, args->size, args->gfp,
662 static void simple_allocator_free(struct arm_dma_free_args *args)
664 __dma_free_buffer(args->page, args->size);
667 static struct arm_dma_allocator simple_allocator = {
668 .alloc = simple_allocator_alloc,
669 .free = simple_allocator_free,
672 static void *cma_allocator_alloc(struct arm_dma_alloc_args *args,
673 struct page **ret_page)
675 return __alloc_from_contiguous(args->dev, args->size, args->prot,
676 ret_page, args->caller,
677 args->want_vaddr, args->coherent_flag,
681 static void cma_allocator_free(struct arm_dma_free_args *args)
683 __free_from_contiguous(args->dev, args->page, args->cpu_addr,
684 args->size, args->want_vaddr);
687 static struct arm_dma_allocator cma_allocator = {
688 .alloc = cma_allocator_alloc,
689 .free = cma_allocator_free,
692 static void *pool_allocator_alloc(struct arm_dma_alloc_args *args,
693 struct page **ret_page)
695 return __alloc_from_pool(args->size, ret_page);
698 static void pool_allocator_free(struct arm_dma_free_args *args)
700 __free_from_pool(args->cpu_addr, args->size);
703 static struct arm_dma_allocator pool_allocator = {
704 .alloc = pool_allocator_alloc,
705 .free = pool_allocator_free,
708 static void *remap_allocator_alloc(struct arm_dma_alloc_args *args,
709 struct page **ret_page)
711 return __alloc_remap_buffer(args->dev, args->size, args->gfp,
712 args->prot, ret_page, args->caller,
716 static void remap_allocator_free(struct arm_dma_free_args *args)
718 if (args->want_vaddr)
719 __dma_free_remap(args->cpu_addr, args->size);
721 __dma_free_buffer(args->page, args->size);
724 static struct arm_dma_allocator remap_allocator = {
725 .alloc = remap_allocator_alloc,
726 .free = remap_allocator_free,
729 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
730 gfp_t gfp, pgprot_t prot, bool is_coherent,
731 unsigned long attrs, const void *caller)
733 u64 mask = get_coherent_dma_mask(dev);
734 struct page *page = NULL;
736 bool allowblock, cma;
737 struct arm_dma_buffer *buf;
738 struct arm_dma_alloc_args args = {
740 .size = PAGE_ALIGN(size),
744 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
745 .coherent_flag = is_coherent ? COHERENT : NORMAL,
748 #ifdef CONFIG_DMA_API_DEBUG
749 u64 limit = (mask + 1) & ~mask;
750 if (limit && size >= limit) {
751 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
760 buf = kzalloc(sizeof(*buf),
761 gfp & ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM));
765 if (mask < 0xffffffffULL)
769 * Following is a work-around (a.k.a. hack) to prevent pages
770 * with __GFP_COMP being passed to split_page() which cannot
771 * handle them. The real problem is that this flag probably
772 * should be 0 on ARM as it is not supported on this
773 * platform; see CONFIG_HUGETLBFS.
775 gfp &= ~(__GFP_COMP);
778 *handle = ARM_MAPPING_ERROR;
779 allowblock = gfpflags_allow_blocking(gfp);
780 cma = allowblock ? dev_get_cma_area(dev) : false;
783 buf->allocator = &cma_allocator;
784 else if (is_coherent)
785 buf->allocator = &simple_allocator;
787 buf->allocator = &remap_allocator;
789 buf->allocator = &pool_allocator;
791 addr = buf->allocator->alloc(&args, &page);
796 *handle = pfn_to_dma(dev, page_to_pfn(page));
797 buf->virt = args.want_vaddr ? addr : page;
799 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
800 list_add(&buf->list, &arm_dma_bufs);
801 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
806 return args.want_vaddr ? addr : page;
810 * Allocate DMA-coherent memory space and return both the kernel remapped
811 * virtual and bus address for that space.
813 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
814 gfp_t gfp, unsigned long attrs)
816 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
818 return __dma_alloc(dev, size, handle, gfp, prot, false,
819 attrs, __builtin_return_address(0));
822 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
823 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
825 return __dma_alloc(dev, size, handle, gfp, PAGE_KERNEL, true,
826 attrs, __builtin_return_address(0));
829 static int __arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
830 void *cpu_addr, dma_addr_t dma_addr, size_t size,
834 unsigned long nr_vma_pages = vma_pages(vma);
835 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
836 unsigned long pfn = dma_to_pfn(dev, dma_addr);
837 unsigned long off = vma->vm_pgoff;
839 if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
842 if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
843 ret = remap_pfn_range(vma, vma->vm_start,
845 vma->vm_end - vma->vm_start,
853 * Create userspace mapping for the DMA-coherent memory.
855 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
856 void *cpu_addr, dma_addr_t dma_addr, size_t size,
859 return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
862 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
863 void *cpu_addr, dma_addr_t dma_addr, size_t size,
866 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
867 return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
871 * Free a buffer as defined by the above mapping.
873 static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
874 dma_addr_t handle, unsigned long attrs,
877 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
878 struct arm_dma_buffer *buf;
879 struct arm_dma_free_args args = {
881 .size = PAGE_ALIGN(size),
882 .cpu_addr = cpu_addr,
884 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
887 buf = arm_dma_buffer_find(cpu_addr);
888 if (WARN(!buf, "Freeing invalid buffer %p\n", cpu_addr))
891 buf->allocator->free(&args);
895 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
896 dma_addr_t handle, unsigned long attrs)
898 __arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
901 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
902 dma_addr_t handle, unsigned long attrs)
904 __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
908 * The whole dma_get_sgtable() idea is fundamentally unsafe - it seems
909 * that the intention is to allow exporting memory allocated via the
910 * coherent DMA APIs through the dma_buf API, which only accepts a
911 * scattertable. This presents a couple of problems:
912 * 1. Not all memory allocated via the coherent DMA APIs is backed by
914 * 2. Passing coherent DMA memory into the streaming APIs is not allowed
915 * as we will try to flush the memory through a different alias to that
916 * actually being used (and the flushes are redundant.)
918 int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
919 void *cpu_addr, dma_addr_t handle, size_t size,
922 unsigned long pfn = dma_to_pfn(dev, handle);
926 /* If the PFN is not valid, we do not have a struct page */
930 page = pfn_to_page(pfn);
932 ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
936 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
940 static void dma_cache_maint_page(struct page *page, unsigned long offset,
941 size_t size, enum dma_data_direction dir,
942 void (*op)(const void *, size_t, int))
947 pfn = page_to_pfn(page) + offset / PAGE_SIZE;
951 * A single sg entry may refer to multiple physically contiguous
952 * pages. But we still need to process highmem pages individually.
953 * If highmem is not configured then the bulk of this loop gets
960 page = pfn_to_page(pfn);
962 if (PageHighMem(page)) {
963 if (len + offset > PAGE_SIZE)
964 len = PAGE_SIZE - offset;
966 if (cache_is_vipt_nonaliasing()) {
967 vaddr = kmap_atomic(page);
968 op(vaddr + offset, len, dir);
969 kunmap_atomic(vaddr);
971 vaddr = kmap_high_get(page);
973 op(vaddr + offset, len, dir);
978 vaddr = page_address(page) + offset;
988 * Make an area consistent for devices.
989 * Note: Drivers should NOT use this function directly, as it will break
990 * platforms with CONFIG_DMABOUNCE.
991 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
993 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
994 size_t size, enum dma_data_direction dir)
998 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
1000 paddr = page_to_phys(page) + off;
1001 if (dir == DMA_FROM_DEVICE) {
1002 outer_inv_range(paddr, paddr + size);
1004 outer_clean_range(paddr, paddr + size);
1006 /* FIXME: non-speculating: flush on bidirectional mappings? */
1009 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
1010 size_t size, enum dma_data_direction dir)
1012 phys_addr_t paddr = page_to_phys(page) + off;
1014 /* FIXME: non-speculating: not required */
1015 /* in any case, don't bother invalidating if DMA to device */
1016 if (dir != DMA_TO_DEVICE) {
1017 outer_inv_range(paddr, paddr + size);
1019 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
1023 * Mark the D-cache clean for these pages to avoid extra flushing.
1025 if (dir != DMA_TO_DEVICE && size >= PAGE_SIZE) {
1029 pfn = page_to_pfn(page) + off / PAGE_SIZE;
1033 left -= PAGE_SIZE - off;
1035 while (left >= PAGE_SIZE) {
1036 page = pfn_to_page(pfn++);
1037 set_bit(PG_dcache_clean, &page->flags);
1044 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
1045 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1046 * @sg: list of buffers
1047 * @nents: number of buffers to map
1048 * @dir: DMA transfer direction
1050 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1051 * This is the scatter-gather version of the dma_map_single interface.
1052 * Here the scatter gather list elements are each tagged with the
1053 * appropriate dma address and length. They are obtained via
1054 * sg_dma_{address,length}.
1056 * Device ownership issues as mentioned for dma_map_single are the same
1059 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1060 enum dma_data_direction dir, unsigned long attrs)
1062 const struct dma_map_ops *ops = get_dma_ops(dev);
1063 struct scatterlist *s;
1066 for_each_sg(sg, s, nents, i) {
1067 #ifdef CONFIG_NEED_SG_DMA_LENGTH
1068 s->dma_length = s->length;
1070 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
1071 s->length, dir, attrs);
1072 if (dma_mapping_error(dev, s->dma_address))
1078 for_each_sg(sg, s, i, j)
1079 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1084 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1085 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1086 * @sg: list of buffers
1087 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1088 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1090 * Unmap a set of streaming mode DMA translations. Again, CPU access
1091 * rules concerning calls here are the same as for dma_unmap_single().
1093 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1094 enum dma_data_direction dir, unsigned long attrs)
1096 const struct dma_map_ops *ops = get_dma_ops(dev);
1097 struct scatterlist *s;
1101 for_each_sg(sg, s, nents, i)
1102 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1106 * arm_dma_sync_sg_for_cpu
1107 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1108 * @sg: list of buffers
1109 * @nents: number of buffers to map (returned from dma_map_sg)
1110 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1112 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1113 int nents, enum dma_data_direction dir)
1115 const struct dma_map_ops *ops = get_dma_ops(dev);
1116 struct scatterlist *s;
1119 for_each_sg(sg, s, nents, i)
1120 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
1125 * arm_dma_sync_sg_for_device
1126 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1127 * @sg: list of buffers
1128 * @nents: number of buffers to map (returned from dma_map_sg)
1129 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1131 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1132 int nents, enum dma_data_direction dir)
1134 const struct dma_map_ops *ops = get_dma_ops(dev);
1135 struct scatterlist *s;
1138 for_each_sg(sg, s, nents, i)
1139 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
1144 * Return whether the given device DMA address mask can be supported
1145 * properly. For example, if your device can only drive the low 24-bits
1146 * during bus mastering, then you would pass 0x00ffffff as the mask
1149 int arm_dma_supported(struct device *dev, u64 mask)
1151 return __dma_supported(dev, mask, false);
1154 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1156 static int __dma_info_to_prot(enum dma_data_direction dir, unsigned long attrs)
1160 if (attrs & DMA_ATTR_PRIVILEGED)
1164 case DMA_BIDIRECTIONAL:
1165 return prot | IOMMU_READ | IOMMU_WRITE;
1167 return prot | IOMMU_READ;
1168 case DMA_FROM_DEVICE:
1169 return prot | IOMMU_WRITE;
1177 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping);
1179 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
1182 unsigned int order = get_order(size);
1183 unsigned int align = 0;
1184 unsigned int count, start;
1185 size_t mapping_size = mapping->bits << PAGE_SHIFT;
1186 unsigned long flags;
1190 if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
1191 order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
1193 count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1194 align = (1 << order) - 1;
1196 spin_lock_irqsave(&mapping->lock, flags);
1197 for (i = 0; i < mapping->nr_bitmaps; i++) {
1198 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1199 mapping->bits, 0, count, align);
1201 if (start > mapping->bits)
1204 bitmap_set(mapping->bitmaps[i], start, count);
1209 * No unused range found. Try to extend the existing mapping
1210 * and perform a second attempt to reserve an IO virtual
1211 * address range of size bytes.
1213 if (i == mapping->nr_bitmaps) {
1214 if (extend_iommu_mapping(mapping)) {
1215 spin_unlock_irqrestore(&mapping->lock, flags);
1216 return ARM_MAPPING_ERROR;
1219 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1220 mapping->bits, 0, count, align);
1222 if (start > mapping->bits) {
1223 spin_unlock_irqrestore(&mapping->lock, flags);
1224 return ARM_MAPPING_ERROR;
1227 bitmap_set(mapping->bitmaps[i], start, count);
1229 spin_unlock_irqrestore(&mapping->lock, flags);
1231 iova = mapping->base + (mapping_size * i);
1232 iova += start << PAGE_SHIFT;
1237 static inline void __free_iova(struct dma_iommu_mapping *mapping,
1238 dma_addr_t addr, size_t size)
1240 unsigned int start, count;
1241 size_t mapping_size = mapping->bits << PAGE_SHIFT;
1242 unsigned long flags;
1243 dma_addr_t bitmap_base;
1249 bitmap_index = (u32) (addr - mapping->base) / (u32) mapping_size;
1250 BUG_ON(addr < mapping->base || bitmap_index > mapping->extensions);
1252 bitmap_base = mapping->base + mapping_size * bitmap_index;
1254 start = (addr - bitmap_base) >> PAGE_SHIFT;
1256 if (addr + size > bitmap_base + mapping_size) {
1258 * The address range to be freed reaches into the iova
1259 * range of the next bitmap. This should not happen as
1260 * we don't allow this in __alloc_iova (at the
1265 count = size >> PAGE_SHIFT;
1267 spin_lock_irqsave(&mapping->lock, flags);
1268 bitmap_clear(mapping->bitmaps[bitmap_index], start, count);
1269 spin_unlock_irqrestore(&mapping->lock, flags);
1272 /* We'll try 2M, 1M, 64K, and finally 4K; array must end with 0! */
1273 static const int iommu_order_array[] = { 9, 8, 4, 0 };
1275 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
1276 gfp_t gfp, unsigned long attrs,
1279 struct page **pages;
1280 int count = size >> PAGE_SHIFT;
1281 int array_size = count * sizeof(struct page *);
1285 if (array_size <= PAGE_SIZE)
1286 pages = kzalloc(array_size, GFP_KERNEL);
1288 pages = vzalloc(array_size);
1292 if (attrs & DMA_ATTR_FORCE_CONTIGUOUS)
1294 unsigned long order = get_order(size);
1297 page = dma_alloc_from_contiguous(dev, count, order, gfp);
1301 __dma_clear_buffer(page, size, coherent_flag);
1303 for (i = 0; i < count; i++)
1304 pages[i] = page + i;
1309 /* Go straight to 4K chunks if caller says it's OK. */
1310 if (attrs & DMA_ATTR_ALLOC_SINGLE_PAGES)
1311 order_idx = ARRAY_SIZE(iommu_order_array) - 1;
1314 * IOMMU can map any pages, so himem can also be used here
1316 gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
1321 order = iommu_order_array[order_idx];
1323 /* Drop down when we get small */
1324 if (__fls(count) < order) {
1330 /* See if it's easy to allocate a high-order chunk */
1331 pages[i] = alloc_pages(gfp | __GFP_NORETRY, order);
1333 /* Go down a notch at first sign of pressure */
1339 pages[i] = alloc_pages(gfp, 0);
1345 split_page(pages[i], order);
1348 pages[i + j] = pages[i] + j;
1351 __dma_clear_buffer(pages[i], PAGE_SIZE << order, coherent_flag);
1353 count -= 1 << order;
1360 __free_pages(pages[i], 0);
1365 static int __iommu_free_buffer(struct device *dev, struct page **pages,
1366 size_t size, unsigned long attrs)
1368 int count = size >> PAGE_SHIFT;
1371 if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
1372 dma_release_from_contiguous(dev, pages[0], count);
1374 for (i = 0; i < count; i++)
1376 __free_pages(pages[i], 0);
1384 * Create a CPU mapping for a specified pages
1387 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1390 return dma_common_pages_remap(pages, size,
1391 VM_ARM_DMA_CONSISTENT | VM_USERMAP, prot, caller);
1395 * Create a mapping in device IO address space for specified pages
1398 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size,
1399 unsigned long attrs)
1401 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1402 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1403 dma_addr_t dma_addr, iova;
1406 dma_addr = __alloc_iova(mapping, size);
1407 if (dma_addr == ARM_MAPPING_ERROR)
1411 for (i = 0; i < count; ) {
1414 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1415 phys_addr_t phys = page_to_phys(pages[i]);
1416 unsigned int len, j;
1418 for (j = i + 1; j < count; j++, next_pfn++)
1419 if (page_to_pfn(pages[j]) != next_pfn)
1422 len = (j - i) << PAGE_SHIFT;
1423 ret = iommu_map(mapping->domain, iova, phys, len,
1424 __dma_info_to_prot(DMA_BIDIRECTIONAL, attrs));
1432 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1433 __free_iova(mapping, dma_addr, size);
1434 return ARM_MAPPING_ERROR;
1437 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1439 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1442 * add optional in-page offset from iova to size and align
1443 * result to page size
1445 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1448 iommu_unmap(mapping->domain, iova, size);
1449 __free_iova(mapping, iova, size);
1453 static struct page **__atomic_get_pages(void *addr)
1458 phys = gen_pool_virt_to_phys(atomic_pool, (unsigned long)addr);
1459 page = phys_to_page(phys);
1461 return (struct page **)page;
1464 static struct page **__iommu_get_pages(void *cpu_addr, unsigned long attrs)
1466 struct vm_struct *area;
1468 if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1469 return __atomic_get_pages(cpu_addr);
1471 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1474 area = find_vm_area(cpu_addr);
1475 if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1480 static void *__iommu_alloc_simple(struct device *dev, size_t size, gfp_t gfp,
1481 dma_addr_t *handle, int coherent_flag,
1482 unsigned long attrs)
1487 if (coherent_flag == COHERENT)
1488 addr = __alloc_simple_buffer(dev, size, gfp, &page);
1490 addr = __alloc_from_pool(size, &page);
1494 *handle = __iommu_create_mapping(dev, &page, size, attrs);
1495 if (*handle == ARM_MAPPING_ERROR)
1501 __free_from_pool(addr, size);
1505 static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1506 dma_addr_t handle, size_t size, int coherent_flag)
1508 __iommu_remove_mapping(dev, handle, size);
1509 if (coherent_flag == COHERENT)
1510 __dma_free_buffer(virt_to_page(cpu_addr), size);
1512 __free_from_pool(cpu_addr, size);
1515 static void *__arm_iommu_alloc_attrs(struct device *dev, size_t size,
1516 dma_addr_t *handle, gfp_t gfp, unsigned long attrs,
1519 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
1520 struct page **pages;
1523 *handle = ARM_MAPPING_ERROR;
1524 size = PAGE_ALIGN(size);
1526 if (coherent_flag == COHERENT || !gfpflags_allow_blocking(gfp))
1527 return __iommu_alloc_simple(dev, size, gfp, handle,
1528 coherent_flag, attrs);
1531 * Following is a work-around (a.k.a. hack) to prevent pages
1532 * with __GFP_COMP being passed to split_page() which cannot
1533 * handle them. The real problem is that this flag probably
1534 * should be 0 on ARM as it is not supported on this
1535 * platform; see CONFIG_HUGETLBFS.
1537 gfp &= ~(__GFP_COMP);
1539 pages = __iommu_alloc_buffer(dev, size, gfp, attrs, coherent_flag);
1543 *handle = __iommu_create_mapping(dev, pages, size, attrs);
1544 if (*handle == ARM_MAPPING_ERROR)
1547 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1550 addr = __iommu_alloc_remap(pages, size, gfp, prot,
1551 __builtin_return_address(0));
1558 __iommu_remove_mapping(dev, *handle, size);
1560 __iommu_free_buffer(dev, pages, size, attrs);
1564 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1565 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1567 return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, NORMAL);
1570 static void *arm_coherent_iommu_alloc_attrs(struct device *dev, size_t size,
1571 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1573 return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, COHERENT);
1576 static int __arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1577 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1578 unsigned long attrs)
1580 unsigned long uaddr = vma->vm_start;
1581 unsigned long usize = vma->vm_end - vma->vm_start;
1582 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1583 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1584 unsigned long off = vma->vm_pgoff;
1589 if (off >= nr_pages || (usize >> PAGE_SHIFT) > nr_pages - off)
1595 int ret = vm_insert_page(vma, uaddr, *pages++);
1597 pr_err("Remapping memory failed: %d\n", ret);
1602 } while (usize > 0);
1606 static int arm_iommu_mmap_attrs(struct device *dev,
1607 struct vm_area_struct *vma, void *cpu_addr,
1608 dma_addr_t dma_addr, size_t size, unsigned long attrs)
1610 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1612 return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1615 static int arm_coherent_iommu_mmap_attrs(struct device *dev,
1616 struct vm_area_struct *vma, void *cpu_addr,
1617 dma_addr_t dma_addr, size_t size, unsigned long attrs)
1619 return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1623 * free a page as defined by the above mapping.
1624 * Must not be called with IRQs disabled.
1626 void __arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1627 dma_addr_t handle, unsigned long attrs, int coherent_flag)
1629 struct page **pages;
1630 size = PAGE_ALIGN(size);
1632 if (coherent_flag == COHERENT || __in_atomic_pool(cpu_addr, size)) {
1633 __iommu_free_atomic(dev, cpu_addr, handle, size, coherent_flag);
1637 pages = __iommu_get_pages(cpu_addr, attrs);
1639 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1643 if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0) {
1644 dma_common_free_remap(cpu_addr, size,
1645 VM_ARM_DMA_CONSISTENT | VM_USERMAP);
1648 __iommu_remove_mapping(dev, handle, size);
1649 __iommu_free_buffer(dev, pages, size, attrs);
1652 void arm_iommu_free_attrs(struct device *dev, size_t size,
1653 void *cpu_addr, dma_addr_t handle, unsigned long attrs)
1655 __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, NORMAL);
1658 void arm_coherent_iommu_free_attrs(struct device *dev, size_t size,
1659 void *cpu_addr, dma_addr_t handle, unsigned long attrs)
1661 __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, COHERENT);
1664 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1665 void *cpu_addr, dma_addr_t dma_addr,
1666 size_t size, unsigned long attrs)
1668 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1669 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1674 return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1679 * Map a part of the scatter-gather list into contiguous io address space
1681 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1682 size_t size, dma_addr_t *handle,
1683 enum dma_data_direction dir, unsigned long attrs,
1686 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1687 dma_addr_t iova, iova_base;
1690 struct scatterlist *s;
1693 size = PAGE_ALIGN(size);
1694 *handle = ARM_MAPPING_ERROR;
1696 iova_base = iova = __alloc_iova(mapping, size);
1697 if (iova == ARM_MAPPING_ERROR)
1700 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1701 phys_addr_t phys = page_to_phys(sg_page(s));
1702 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1704 if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1705 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1707 prot = __dma_info_to_prot(dir, attrs);
1709 ret = iommu_map(mapping->domain, iova, phys, len, prot);
1712 count += len >> PAGE_SHIFT;
1715 *handle = iova_base;
1719 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1720 __free_iova(mapping, iova_base, size);
1724 static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1725 enum dma_data_direction dir, unsigned long attrs,
1728 struct scatterlist *s = sg, *dma = sg, *start = sg;
1730 unsigned int offset = s->offset;
1731 unsigned int size = s->offset + s->length;
1732 unsigned int max = dma_get_max_seg_size(dev);
1734 for (i = 1; i < nents; i++) {
1737 s->dma_address = ARM_MAPPING_ERROR;
1740 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1741 if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1742 dir, attrs, is_coherent) < 0)
1745 dma->dma_address += offset;
1746 dma->dma_length = size - offset;
1748 size = offset = s->offset;
1755 if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
1759 dma->dma_address += offset;
1760 dma->dma_length = size - offset;
1765 for_each_sg(sg, s, count, i)
1766 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1771 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1772 * @dev: valid struct device pointer
1773 * @sg: list of buffers
1774 * @nents: number of buffers to map
1775 * @dir: DMA transfer direction
1777 * Map a set of i/o coherent buffers described by scatterlist in streaming
1778 * mode for DMA. The scatter gather list elements are merged together (if
1779 * possible) and tagged with the appropriate dma address and length. They are
1780 * obtained via sg_dma_{address,length}.
1782 int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1783 int nents, enum dma_data_direction dir, unsigned long attrs)
1785 return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
1789 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1790 * @dev: valid struct device pointer
1791 * @sg: list of buffers
1792 * @nents: number of buffers to map
1793 * @dir: DMA transfer direction
1795 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1796 * The scatter gather list elements are merged together (if possible) and
1797 * tagged with the appropriate dma address and length. They are obtained via
1798 * sg_dma_{address,length}.
1800 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1801 int nents, enum dma_data_direction dir, unsigned long attrs)
1803 return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
1806 static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1807 int nents, enum dma_data_direction dir,
1808 unsigned long attrs, bool is_coherent)
1810 struct scatterlist *s;
1813 for_each_sg(sg, s, nents, i) {
1815 __iommu_remove_mapping(dev, sg_dma_address(s),
1817 if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1818 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1824 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1825 * @dev: valid struct device pointer
1826 * @sg: list of buffers
1827 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1828 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1830 * Unmap a set of streaming mode DMA translations. Again, CPU access
1831 * rules concerning calls here are the same as for dma_unmap_single().
1833 void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1834 int nents, enum dma_data_direction dir,
1835 unsigned long attrs)
1837 __iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
1841 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1842 * @dev: valid struct device pointer
1843 * @sg: list of buffers
1844 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1845 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1847 * Unmap a set of streaming mode DMA translations. Again, CPU access
1848 * rules concerning calls here are the same as for dma_unmap_single().
1850 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1851 enum dma_data_direction dir,
1852 unsigned long attrs)
1854 __iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
1858 * arm_iommu_sync_sg_for_cpu
1859 * @dev: valid struct device pointer
1860 * @sg: list of buffers
1861 * @nents: number of buffers to map (returned from dma_map_sg)
1862 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1864 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1865 int nents, enum dma_data_direction dir)
1867 struct scatterlist *s;
1870 for_each_sg(sg, s, nents, i)
1871 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1876 * arm_iommu_sync_sg_for_device
1877 * @dev: valid struct device pointer
1878 * @sg: list of buffers
1879 * @nents: number of buffers to map (returned from dma_map_sg)
1880 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1882 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1883 int nents, enum dma_data_direction dir)
1885 struct scatterlist *s;
1888 for_each_sg(sg, s, nents, i)
1889 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1894 * arm_coherent_iommu_map_page
1895 * @dev: valid struct device pointer
1896 * @page: page that buffer resides in
1897 * @offset: offset into page for start of buffer
1898 * @size: size of buffer to map
1899 * @dir: DMA transfer direction
1901 * Coherent IOMMU aware version of arm_dma_map_page()
1903 static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1904 unsigned long offset, size_t size, enum dma_data_direction dir,
1905 unsigned long attrs)
1907 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1908 dma_addr_t dma_addr;
1909 int ret, prot, len = PAGE_ALIGN(size + offset);
1911 dma_addr = __alloc_iova(mapping, len);
1912 if (dma_addr == ARM_MAPPING_ERROR)
1915 prot = __dma_info_to_prot(dir, attrs);
1917 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, prot);
1921 return dma_addr + offset;
1923 __free_iova(mapping, dma_addr, len);
1924 return ARM_MAPPING_ERROR;
1928 * arm_iommu_map_page
1929 * @dev: valid struct device pointer
1930 * @page: page that buffer resides in
1931 * @offset: offset into page for start of buffer
1932 * @size: size of buffer to map
1933 * @dir: DMA transfer direction
1935 * IOMMU aware version of arm_dma_map_page()
1937 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1938 unsigned long offset, size_t size, enum dma_data_direction dir,
1939 unsigned long attrs)
1941 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1942 __dma_page_cpu_to_dev(page, offset, size, dir);
1944 return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
1948 * arm_coherent_iommu_unmap_page
1949 * @dev: valid struct device pointer
1950 * @handle: DMA address of buffer
1951 * @size: size of buffer (same as passed to dma_map_page)
1952 * @dir: DMA transfer direction (same as passed to dma_map_page)
1954 * Coherent IOMMU aware version of arm_dma_unmap_page()
1956 static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1957 size_t size, enum dma_data_direction dir, unsigned long attrs)
1959 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1960 dma_addr_t iova = handle & PAGE_MASK;
1961 int offset = handle & ~PAGE_MASK;
1962 int len = PAGE_ALIGN(size + offset);
1967 iommu_unmap(mapping->domain, iova, len);
1968 __free_iova(mapping, iova, len);
1972 * arm_iommu_unmap_page
1973 * @dev: valid struct device pointer
1974 * @handle: DMA address of buffer
1975 * @size: size of buffer (same as passed to dma_map_page)
1976 * @dir: DMA transfer direction (same as passed to dma_map_page)
1978 * IOMMU aware version of arm_dma_unmap_page()
1980 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1981 size_t size, enum dma_data_direction dir, unsigned long attrs)
1983 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1984 dma_addr_t iova = handle & PAGE_MASK;
1985 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1986 int offset = handle & ~PAGE_MASK;
1987 int len = PAGE_ALIGN(size + offset);
1992 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1993 __dma_page_dev_to_cpu(page, offset, size, dir);
1995 iommu_unmap(mapping->domain, iova, len);
1996 __free_iova(mapping, iova, len);
2000 * arm_iommu_map_resource - map a device resource for DMA
2001 * @dev: valid struct device pointer
2002 * @phys_addr: physical address of resource
2003 * @size: size of resource to map
2004 * @dir: DMA transfer direction
2006 static dma_addr_t arm_iommu_map_resource(struct device *dev,
2007 phys_addr_t phys_addr, size_t size,
2008 enum dma_data_direction dir, unsigned long attrs)
2010 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2011 dma_addr_t dma_addr;
2013 phys_addr_t addr = phys_addr & PAGE_MASK;
2014 unsigned int offset = phys_addr & ~PAGE_MASK;
2015 size_t len = PAGE_ALIGN(size + offset);
2017 dma_addr = __alloc_iova(mapping, len);
2018 if (dma_addr == ARM_MAPPING_ERROR)
2021 prot = __dma_info_to_prot(dir, attrs) | IOMMU_MMIO;
2023 ret = iommu_map(mapping->domain, dma_addr, addr, len, prot);
2027 return dma_addr + offset;
2029 __free_iova(mapping, dma_addr, len);
2030 return ARM_MAPPING_ERROR;
2034 * arm_iommu_unmap_resource - unmap a device DMA resource
2035 * @dev: valid struct device pointer
2036 * @dma_handle: DMA address to resource
2037 * @size: size of resource to map
2038 * @dir: DMA transfer direction
2040 static void arm_iommu_unmap_resource(struct device *dev, dma_addr_t dma_handle,
2041 size_t size, enum dma_data_direction dir,
2042 unsigned long attrs)
2044 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2045 dma_addr_t iova = dma_handle & PAGE_MASK;
2046 unsigned int offset = dma_handle & ~PAGE_MASK;
2047 size_t len = PAGE_ALIGN(size + offset);
2052 iommu_unmap(mapping->domain, iova, len);
2053 __free_iova(mapping, iova, len);
2056 static void arm_iommu_sync_single_for_cpu(struct device *dev,
2057 dma_addr_t handle, size_t size, enum dma_data_direction dir)
2059 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2060 dma_addr_t iova = handle & PAGE_MASK;
2061 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
2062 unsigned int offset = handle & ~PAGE_MASK;
2067 __dma_page_dev_to_cpu(page, offset, size, dir);
2070 static void arm_iommu_sync_single_for_device(struct device *dev,
2071 dma_addr_t handle, size_t size, enum dma_data_direction dir)
2073 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2074 dma_addr_t iova = handle & PAGE_MASK;
2075 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
2076 unsigned int offset = handle & ~PAGE_MASK;
2081 __dma_page_cpu_to_dev(page, offset, size, dir);
2084 const struct dma_map_ops iommu_ops = {
2085 .alloc = arm_iommu_alloc_attrs,
2086 .free = arm_iommu_free_attrs,
2087 .mmap = arm_iommu_mmap_attrs,
2088 .get_sgtable = arm_iommu_get_sgtable,
2090 .map_page = arm_iommu_map_page,
2091 .unmap_page = arm_iommu_unmap_page,
2092 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
2093 .sync_single_for_device = arm_iommu_sync_single_for_device,
2095 .map_sg = arm_iommu_map_sg,
2096 .unmap_sg = arm_iommu_unmap_sg,
2097 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
2098 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
2100 .map_resource = arm_iommu_map_resource,
2101 .unmap_resource = arm_iommu_unmap_resource,
2103 .mapping_error = arm_dma_mapping_error,
2104 .dma_supported = arm_dma_supported,
2107 const struct dma_map_ops iommu_coherent_ops = {
2108 .alloc = arm_coherent_iommu_alloc_attrs,
2109 .free = arm_coherent_iommu_free_attrs,
2110 .mmap = arm_coherent_iommu_mmap_attrs,
2111 .get_sgtable = arm_iommu_get_sgtable,
2113 .map_page = arm_coherent_iommu_map_page,
2114 .unmap_page = arm_coherent_iommu_unmap_page,
2116 .map_sg = arm_coherent_iommu_map_sg,
2117 .unmap_sg = arm_coherent_iommu_unmap_sg,
2119 .map_resource = arm_iommu_map_resource,
2120 .unmap_resource = arm_iommu_unmap_resource,
2122 .mapping_error = arm_dma_mapping_error,
2123 .dma_supported = arm_dma_supported,
2127 * arm_iommu_create_mapping
2128 * @bus: pointer to the bus holding the client device (for IOMMU calls)
2129 * @base: start address of the valid IO address space
2130 * @size: maximum size of the valid IO address space
2132 * Creates a mapping structure which holds information about used/unused
2133 * IO address ranges, which is required to perform memory allocation and
2134 * mapping with IOMMU aware functions.
2136 * The client device need to be attached to the mapping with
2137 * arm_iommu_attach_device function.
2139 struct dma_iommu_mapping *
2140 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size)
2142 unsigned int bits = size >> PAGE_SHIFT;
2143 unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long);
2144 struct dma_iommu_mapping *mapping;
2148 /* currently only 32-bit DMA address space is supported */
2149 if (size > DMA_BIT_MASK(32) + 1)
2150 return ERR_PTR(-ERANGE);
2153 return ERR_PTR(-EINVAL);
2155 if (bitmap_size > PAGE_SIZE) {
2156 extensions = bitmap_size / PAGE_SIZE;
2157 bitmap_size = PAGE_SIZE;
2160 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
2164 mapping->bitmap_size = bitmap_size;
2165 mapping->bitmaps = kzalloc(extensions * sizeof(unsigned long *),
2167 if (!mapping->bitmaps)
2170 mapping->bitmaps[0] = kzalloc(bitmap_size, GFP_KERNEL);
2171 if (!mapping->bitmaps[0])
2174 mapping->nr_bitmaps = 1;
2175 mapping->extensions = extensions;
2176 mapping->base = base;
2177 mapping->bits = BITS_PER_BYTE * bitmap_size;
2179 spin_lock_init(&mapping->lock);
2181 mapping->domain = iommu_domain_alloc(bus);
2182 if (!mapping->domain)
2185 kref_init(&mapping->kref);
2188 kfree(mapping->bitmaps[0]);
2190 kfree(mapping->bitmaps);
2194 return ERR_PTR(err);
2196 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
2198 static void release_iommu_mapping(struct kref *kref)
2201 struct dma_iommu_mapping *mapping =
2202 container_of(kref, struct dma_iommu_mapping, kref);
2204 iommu_domain_free(mapping->domain);
2205 for (i = 0; i < mapping->nr_bitmaps; i++)
2206 kfree(mapping->bitmaps[i]);
2207 kfree(mapping->bitmaps);
2211 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping)
2215 if (mapping->nr_bitmaps >= mapping->extensions)
2218 next_bitmap = mapping->nr_bitmaps;
2219 mapping->bitmaps[next_bitmap] = kzalloc(mapping->bitmap_size,
2221 if (!mapping->bitmaps[next_bitmap])
2224 mapping->nr_bitmaps++;
2229 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
2232 kref_put(&mapping->kref, release_iommu_mapping);
2234 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
2236 static int __arm_iommu_attach_device(struct device *dev,
2237 struct dma_iommu_mapping *mapping)
2241 err = iommu_attach_device(mapping->domain, dev);
2245 kref_get(&mapping->kref);
2246 to_dma_iommu_mapping(dev) = mapping;
2248 pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
2253 * arm_iommu_attach_device
2254 * @dev: valid struct device pointer
2255 * @mapping: io address space mapping structure (returned from
2256 * arm_iommu_create_mapping)
2258 * Attaches specified io address space mapping to the provided device.
2259 * This replaces the dma operations (dma_map_ops pointer) with the
2260 * IOMMU aware version.
2262 * More than one client might be attached to the same io address space
2265 int arm_iommu_attach_device(struct device *dev,
2266 struct dma_iommu_mapping *mapping)
2270 err = __arm_iommu_attach_device(dev, mapping);
2274 set_dma_ops(dev, &iommu_ops);
2277 EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
2280 * arm_iommu_detach_device
2281 * @dev: valid struct device pointer
2283 * Detaches the provided device from a previously attached map.
2284 * This voids the dma operations (dma_map_ops pointer)
2286 void arm_iommu_detach_device(struct device *dev)
2288 struct dma_iommu_mapping *mapping;
2290 mapping = to_dma_iommu_mapping(dev);
2292 dev_warn(dev, "Not attached\n");
2296 iommu_detach_device(mapping->domain, dev);
2297 kref_put(&mapping->kref, release_iommu_mapping);
2298 to_dma_iommu_mapping(dev) = NULL;
2299 set_dma_ops(dev, NULL);
2301 pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
2303 EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
2305 static const struct dma_map_ops *arm_get_iommu_dma_map_ops(bool coherent)
2307 return coherent ? &iommu_coherent_ops : &iommu_ops;
2310 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2311 const struct iommu_ops *iommu)
2313 struct dma_iommu_mapping *mapping;
2318 mapping = arm_iommu_create_mapping(dev->bus, dma_base, size);
2319 if (IS_ERR(mapping)) {
2320 pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
2321 size, dev_name(dev));
2325 if (__arm_iommu_attach_device(dev, mapping)) {
2326 pr_warn("Failed to attached device %s to IOMMU_mapping\n",
2328 arm_iommu_release_mapping(mapping);
2335 static void arm_teardown_iommu_dma_ops(struct device *dev)
2337 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2342 arm_iommu_detach_device(dev);
2343 arm_iommu_release_mapping(mapping);
2348 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2349 const struct iommu_ops *iommu)
2354 static void arm_teardown_iommu_dma_ops(struct device *dev) { }
2356 #define arm_get_iommu_dma_map_ops arm_get_dma_map_ops
2358 #endif /* CONFIG_ARM_DMA_USE_IOMMU */
2360 static const struct dma_map_ops *arm_get_dma_map_ops(bool coherent)
2362 return coherent ? &arm_coherent_dma_ops : &arm_dma_ops;
2365 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
2366 const struct iommu_ops *iommu, bool coherent)
2368 const struct dma_map_ops *dma_ops;
2370 dev->archdata.dma_coherent = coherent;
2373 * Don't override the dma_ops if they have already been set. Ideally
2374 * this should be the only location where dma_ops are set, remove this
2375 * check when all other callers of set_dma_ops will have disappeared.
2380 if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu))
2381 dma_ops = arm_get_iommu_dma_map_ops(coherent);
2383 dma_ops = arm_get_dma_map_ops(coherent);
2385 set_dma_ops(dev, dma_ops);
2388 if (xen_initial_domain()) {
2389 dev->archdata.dev_dma_ops = dev->dma_ops;
2390 dev->dma_ops = xen_dma_ops;
2393 dev->archdata.dma_ops_setup = true;
2396 void arch_teardown_dma_ops(struct device *dev)
2398 if (!dev->archdata.dma_ops_setup)
2401 arm_teardown_iommu_dma_ops(dev);