2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/bootmem.h>
13 #include <linux/module.h>
15 #include <linux/genalloc.h>
16 #include <linux/gfp.h>
17 #include <linux/errno.h>
18 #include <linux/list.h>
19 #include <linux/init.h>
20 #include <linux/device.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/dma-contiguous.h>
23 #include <linux/highmem.h>
24 #include <linux/memblock.h>
25 #include <linux/slab.h>
26 #include <linux/iommu.h>
28 #include <linux/vmalloc.h>
29 #include <linux/sizes.h>
30 #include <linux/cma.h>
32 #include <asm/memory.h>
33 #include <asm/highmem.h>
34 #include <asm/cacheflush.h>
35 #include <asm/tlbflush.h>
36 #include <asm/mach/arch.h>
37 #include <asm/dma-iommu.h>
38 #include <asm/mach/map.h>
39 #include <asm/system_info.h>
40 #include <asm/dma-contiguous.h>
45 struct arm_dma_alloc_args {
55 struct arm_dma_free_args {
66 struct arm_dma_allocator {
67 void *(*alloc)(struct arm_dma_alloc_args *args,
68 struct page **ret_page);
69 void (*free)(struct arm_dma_free_args *args);
72 struct arm_dma_buffer {
73 struct list_head list;
75 struct arm_dma_allocator *allocator;
78 static LIST_HEAD(arm_dma_bufs);
79 static DEFINE_SPINLOCK(arm_dma_bufs_lock);
81 static struct arm_dma_buffer *arm_dma_buffer_find(void *virt)
83 struct arm_dma_buffer *buf, *found = NULL;
86 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
87 list_for_each_entry(buf, &arm_dma_bufs, list) {
88 if (buf->virt == virt) {
94 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
99 * The DMA API is built upon the notion of "buffer ownership". A buffer
100 * is either exclusively owned by the CPU (and therefore may be accessed
101 * by it) or exclusively owned by the DMA device. These helper functions
102 * represent the transitions between these two ownership states.
104 * Note, however, that on later ARMs, this notion does not work due to
105 * speculative prefetches. We model our approach on the assumption that
106 * the CPU does do speculative prefetches, which means we clean caches
107 * before transfers and delay cache invalidation until transfer completion.
110 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
111 size_t, enum dma_data_direction);
112 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
113 size_t, enum dma_data_direction);
116 * arm_dma_map_page - map a portion of a page for streaming DMA
117 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
118 * @page: page that buffer resides in
119 * @offset: offset into page for start of buffer
120 * @size: size of buffer to map
121 * @dir: DMA transfer direction
123 * Ensure that any data held in the cache is appropriately discarded
126 * The device owns this memory once this call has completed. The CPU
127 * can regain ownership by calling dma_unmap_page().
129 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
130 unsigned long offset, size_t size, enum dma_data_direction dir,
133 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
134 __dma_page_cpu_to_dev(page, offset, size, dir);
135 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
138 static dma_addr_t arm_coherent_dma_map_page(struct device *dev, struct page *page,
139 unsigned long offset, size_t size, enum dma_data_direction dir,
142 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
146 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
147 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
148 * @handle: DMA address of buffer
149 * @size: size of buffer (same as passed to dma_map_page)
150 * @dir: DMA transfer direction (same as passed to dma_map_page)
152 * Unmap a page streaming mode DMA translation. The handle and size
153 * must match what was provided in the previous dma_map_page() call.
154 * All other usages are undefined.
156 * After this call, reads by the CPU to the buffer are guaranteed to see
157 * whatever the device wrote there.
159 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
160 size_t size, enum dma_data_direction dir, unsigned long attrs)
162 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
163 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
164 handle & ~PAGE_MASK, size, dir);
167 static void arm_dma_sync_single_for_cpu(struct device *dev,
168 dma_addr_t handle, size_t size, enum dma_data_direction dir)
170 unsigned int offset = handle & (PAGE_SIZE - 1);
171 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
172 __dma_page_dev_to_cpu(page, offset, size, dir);
175 static void arm_dma_sync_single_for_device(struct device *dev,
176 dma_addr_t handle, size_t size, enum dma_data_direction dir)
178 unsigned int offset = handle & (PAGE_SIZE - 1);
179 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
180 __dma_page_cpu_to_dev(page, offset, size, dir);
183 struct dma_map_ops arm_dma_ops = {
184 .alloc = arm_dma_alloc,
185 .free = arm_dma_free,
186 .mmap = arm_dma_mmap,
187 .get_sgtable = arm_dma_get_sgtable,
188 .map_page = arm_dma_map_page,
189 .unmap_page = arm_dma_unmap_page,
190 .map_sg = arm_dma_map_sg,
191 .unmap_sg = arm_dma_unmap_sg,
192 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
193 .sync_single_for_device = arm_dma_sync_single_for_device,
194 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
195 .sync_sg_for_device = arm_dma_sync_sg_for_device,
197 EXPORT_SYMBOL(arm_dma_ops);
199 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
200 dma_addr_t *handle, gfp_t gfp, unsigned long attrs);
201 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
202 dma_addr_t handle, unsigned long attrs);
203 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
204 void *cpu_addr, dma_addr_t dma_addr, size_t size,
205 unsigned long attrs);
207 struct dma_map_ops arm_coherent_dma_ops = {
208 .alloc = arm_coherent_dma_alloc,
209 .free = arm_coherent_dma_free,
210 .mmap = arm_coherent_dma_mmap,
211 .get_sgtable = arm_dma_get_sgtable,
212 .map_page = arm_coherent_dma_map_page,
213 .map_sg = arm_dma_map_sg,
215 EXPORT_SYMBOL(arm_coherent_dma_ops);
217 static int __dma_supported(struct device *dev, u64 mask, bool warn)
219 unsigned long max_dma_pfn;
222 * If the mask allows for more memory than we can address,
223 * and we actually have that much memory, then we must
224 * indicate that DMA to this device is not supported.
226 if (sizeof(mask) != sizeof(dma_addr_t) &&
227 mask > (dma_addr_t)~0 &&
228 dma_to_pfn(dev, ~0) < max_pfn - 1) {
230 dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
232 dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
237 max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
240 * Translate the device's DMA mask to a PFN limit. This
241 * PFN number includes the page which we can DMA to.
243 if (dma_to_pfn(dev, mask) < max_dma_pfn) {
245 dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
247 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
255 static u64 get_coherent_dma_mask(struct device *dev)
257 u64 mask = (u64)DMA_BIT_MASK(32);
260 mask = dev->coherent_dma_mask;
263 * Sanity check the DMA mask - it must be non-zero, and
264 * must be able to be satisfied by a DMA allocation.
267 dev_warn(dev, "coherent DMA mask is unset\n");
271 if (!__dma_supported(dev, mask, true))
278 static void __dma_clear_buffer(struct page *page, size_t size, int coherent_flag)
281 * Ensure that the allocated pages are zeroed, and that any data
282 * lurking in the kernel direct-mapped region is invalidated.
284 if (PageHighMem(page)) {
285 phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
286 phys_addr_t end = base + size;
288 void *ptr = kmap_atomic(page);
289 memset(ptr, 0, PAGE_SIZE);
290 if (coherent_flag != COHERENT)
291 dmac_flush_range(ptr, ptr + PAGE_SIZE);
296 if (coherent_flag != COHERENT)
297 outer_flush_range(base, end);
299 void *ptr = page_address(page);
300 memset(ptr, 0, size);
301 if (coherent_flag != COHERENT) {
302 dmac_flush_range(ptr, ptr + size);
303 outer_flush_range(__pa(ptr), __pa(ptr) + size);
309 * Allocate a DMA buffer for 'dev' of size 'size' using the
310 * specified gfp mask. Note that 'size' must be page aligned.
312 static struct page *__dma_alloc_buffer(struct device *dev, size_t size,
313 gfp_t gfp, int coherent_flag)
315 unsigned long order = get_order(size);
316 struct page *page, *p, *e;
318 page = alloc_pages(gfp, order);
323 * Now split the huge page and free the excess pages
325 split_page(page, order);
326 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
329 __dma_clear_buffer(page, size, coherent_flag);
335 * Free a DMA buffer. 'size' must be page aligned.
337 static void __dma_free_buffer(struct page *page, size_t size)
339 struct page *e = page + (size >> PAGE_SHIFT);
349 static void *__alloc_from_contiguous(struct device *dev, size_t size,
350 pgprot_t prot, struct page **ret_page,
351 const void *caller, bool want_vaddr,
354 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
355 pgprot_t prot, struct page **ret_page,
356 const void *caller, bool want_vaddr);
359 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
363 * DMA allocation can be mapped to user space, so lets
364 * set VM_USERMAP flags too.
366 return dma_common_contiguous_remap(page, size,
367 VM_ARM_DMA_CONSISTENT | VM_USERMAP,
371 static void __dma_free_remap(void *cpu_addr, size_t size)
373 dma_common_free_remap(cpu_addr, size,
374 VM_ARM_DMA_CONSISTENT | VM_USERMAP);
377 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
378 static struct gen_pool *atomic_pool;
380 static size_t atomic_pool_size = DEFAULT_DMA_COHERENT_POOL_SIZE;
382 static int __init early_coherent_pool(char *p)
384 atomic_pool_size = memparse(p, &p);
387 early_param("coherent_pool", early_coherent_pool);
389 void __init init_dma_coherent_pool_size(unsigned long size)
392 * Catch any attempt to set the pool size too late.
397 * Set architecture specific coherent pool size only if
398 * it has not been changed by kernel command line parameter.
400 if (atomic_pool_size == DEFAULT_DMA_COHERENT_POOL_SIZE)
401 atomic_pool_size = size;
405 * Initialise the coherent pool for atomic allocations.
407 static int __init atomic_pool_init(void)
409 pgprot_t prot = pgprot_dmacoherent(PAGE_KERNEL);
410 gfp_t gfp = GFP_KERNEL | GFP_DMA;
414 atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
418 * The atomic pool is only used for non-coherent allocations
419 * so we must pass NORMAL for coherent_flag.
421 if (dev_get_cma_area(NULL))
422 ptr = __alloc_from_contiguous(NULL, atomic_pool_size, prot,
423 &page, atomic_pool_init, true, NORMAL);
425 ptr = __alloc_remap_buffer(NULL, atomic_pool_size, gfp, prot,
426 &page, atomic_pool_init, true);
430 ret = gen_pool_add_virt(atomic_pool, (unsigned long)ptr,
432 atomic_pool_size, -1);
434 goto destroy_genpool;
436 gen_pool_set_algo(atomic_pool,
437 gen_pool_first_fit_order_align,
439 pr_info("DMA: preallocated %zu KiB pool for atomic coherent allocations\n",
440 atomic_pool_size / 1024);
445 gen_pool_destroy(atomic_pool);
448 pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
449 atomic_pool_size / 1024);
453 * CMA is activated by core_initcall, so we must be called after it.
455 postcore_initcall(atomic_pool_init);
457 struct dma_contig_early_reserve {
462 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
464 static int dma_mmu_remap_num __initdata;
466 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
468 dma_mmu_remap[dma_mmu_remap_num].base = base;
469 dma_mmu_remap[dma_mmu_remap_num].size = size;
473 void __init dma_contiguous_remap(void)
476 for (i = 0; i < dma_mmu_remap_num; i++) {
477 phys_addr_t start = dma_mmu_remap[i].base;
478 phys_addr_t end = start + dma_mmu_remap[i].size;
482 if (end > arm_lowmem_limit)
483 end = arm_lowmem_limit;
487 map.pfn = __phys_to_pfn(start);
488 map.virtual = __phys_to_virt(start);
489 map.length = end - start;
490 map.type = MT_MEMORY_DMA_READY;
493 * Clear previous low-memory mapping to ensure that the
494 * TLB does not see any conflicting entries, then flush
495 * the TLB of the old entries before creating new mappings.
497 * This ensures that any speculatively loaded TLB entries
498 * (even though they may be rare) can not cause any problems,
499 * and ensures that this code is architecturally compliant.
501 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
503 pmd_clear(pmd_off_k(addr));
505 flush_tlb_kernel_range(__phys_to_virt(start),
506 __phys_to_virt(end));
508 iotable_init(&map, 1);
512 static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
515 struct page *page = virt_to_page(addr);
516 pgprot_t prot = *(pgprot_t *)data;
518 set_pte_ext(pte, mk_pte(page, prot), 0);
522 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
524 unsigned long start = (unsigned long) page_address(page);
525 unsigned end = start + size;
527 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
528 flush_tlb_kernel_range(start, end);
531 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
532 pgprot_t prot, struct page **ret_page,
533 const void *caller, bool want_vaddr)
538 * __alloc_remap_buffer is only called when the device is
541 page = __dma_alloc_buffer(dev, size, gfp, NORMAL);
547 ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
549 __dma_free_buffer(page, size);
558 static void *__alloc_from_pool(size_t size, struct page **ret_page)
564 WARN(1, "coherent pool not initialised!\n");
568 val = gen_pool_alloc(atomic_pool, size);
570 phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
572 *ret_page = phys_to_page(phys);
579 static bool __in_atomic_pool(void *start, size_t size)
581 return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
584 static int __free_from_pool(void *start, size_t size)
586 if (!__in_atomic_pool(start, size))
589 gen_pool_free(atomic_pool, (unsigned long)start, size);
594 static void *__alloc_from_contiguous(struct device *dev, size_t size,
595 pgprot_t prot, struct page **ret_page,
596 const void *caller, bool want_vaddr,
599 unsigned long order = get_order(size);
600 size_t count = size >> PAGE_SHIFT;
604 page = dma_alloc_from_contiguous(dev, count, order);
608 __dma_clear_buffer(page, size, coherent_flag);
613 if (PageHighMem(page)) {
614 ptr = __dma_alloc_remap(page, size, GFP_KERNEL, prot, caller);
616 dma_release_from_contiguous(dev, page, count);
620 __dma_remap(page, size, prot);
621 ptr = page_address(page);
629 static void __free_from_contiguous(struct device *dev, struct page *page,
630 void *cpu_addr, size_t size, bool want_vaddr)
633 if (PageHighMem(page))
634 __dma_free_remap(cpu_addr, size);
636 __dma_remap(page, size, PAGE_KERNEL);
638 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
641 static inline pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot)
643 prot = (attrs & DMA_ATTR_WRITE_COMBINE) ?
644 pgprot_writecombine(prot) :
645 pgprot_dmacoherent(prot);
651 #else /* !CONFIG_MMU */
655 #define __get_dma_pgprot(attrs, prot) __pgprot(0)
656 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c, wv) NULL
657 #define __alloc_from_pool(size, ret_page) NULL
658 #define __alloc_from_contiguous(dev, size, prot, ret, c, wv, coherent_flag) NULL
659 #define __free_from_pool(cpu_addr, size) do { } while (0)
660 #define __free_from_contiguous(dev, page, cpu_addr, size, wv) do { } while (0)
661 #define __dma_free_remap(cpu_addr, size) do { } while (0)
663 #endif /* CONFIG_MMU */
665 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
666 struct page **ret_page)
669 /* __alloc_simple_buffer is only called when the device is coherent */
670 page = __dma_alloc_buffer(dev, size, gfp, COHERENT);
675 return page_address(page);
678 static void *simple_allocator_alloc(struct arm_dma_alloc_args *args,
679 struct page **ret_page)
681 return __alloc_simple_buffer(args->dev, args->size, args->gfp,
685 static void simple_allocator_free(struct arm_dma_free_args *args)
687 __dma_free_buffer(args->page, args->size);
690 static struct arm_dma_allocator simple_allocator = {
691 .alloc = simple_allocator_alloc,
692 .free = simple_allocator_free,
695 static void *cma_allocator_alloc(struct arm_dma_alloc_args *args,
696 struct page **ret_page)
698 return __alloc_from_contiguous(args->dev, args->size, args->prot,
699 ret_page, args->caller,
700 args->want_vaddr, args->coherent_flag);
703 static void cma_allocator_free(struct arm_dma_free_args *args)
705 __free_from_contiguous(args->dev, args->page, args->cpu_addr,
706 args->size, args->want_vaddr);
709 static struct arm_dma_allocator cma_allocator = {
710 .alloc = cma_allocator_alloc,
711 .free = cma_allocator_free,
714 static void *pool_allocator_alloc(struct arm_dma_alloc_args *args,
715 struct page **ret_page)
717 return __alloc_from_pool(args->size, ret_page);
720 static void pool_allocator_free(struct arm_dma_free_args *args)
722 __free_from_pool(args->cpu_addr, args->size);
725 static struct arm_dma_allocator pool_allocator = {
726 .alloc = pool_allocator_alloc,
727 .free = pool_allocator_free,
730 static void *remap_allocator_alloc(struct arm_dma_alloc_args *args,
731 struct page **ret_page)
733 return __alloc_remap_buffer(args->dev, args->size, args->gfp,
734 args->prot, ret_page, args->caller,
738 static void remap_allocator_free(struct arm_dma_free_args *args)
740 if (args->want_vaddr)
741 __dma_free_remap(args->cpu_addr, args->size);
743 __dma_free_buffer(args->page, args->size);
746 static struct arm_dma_allocator remap_allocator = {
747 .alloc = remap_allocator_alloc,
748 .free = remap_allocator_free,
751 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
752 gfp_t gfp, pgprot_t prot, bool is_coherent,
753 unsigned long attrs, const void *caller)
755 u64 mask = get_coherent_dma_mask(dev);
756 struct page *page = NULL;
758 bool allowblock, cma;
759 struct arm_dma_buffer *buf;
760 struct arm_dma_alloc_args args = {
762 .size = PAGE_ALIGN(size),
766 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
767 .coherent_flag = is_coherent ? COHERENT : NORMAL,
770 #ifdef CONFIG_DMA_API_DEBUG
771 u64 limit = (mask + 1) & ~mask;
772 if (limit && size >= limit) {
773 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
782 buf = kzalloc(sizeof(*buf),
783 gfp & ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM));
787 if (mask < 0xffffffffULL)
791 * Following is a work-around (a.k.a. hack) to prevent pages
792 * with __GFP_COMP being passed to split_page() which cannot
793 * handle them. The real problem is that this flag probably
794 * should be 0 on ARM as it is not supported on this
795 * platform; see CONFIG_HUGETLBFS.
797 gfp &= ~(__GFP_COMP);
800 *handle = DMA_ERROR_CODE;
801 allowblock = gfpflags_allow_blocking(gfp);
802 cma = allowblock ? dev_get_cma_area(dev) : false;
805 buf->allocator = &cma_allocator;
806 else if (nommu() || is_coherent)
807 buf->allocator = &simple_allocator;
809 buf->allocator = &remap_allocator;
811 buf->allocator = &pool_allocator;
813 addr = buf->allocator->alloc(&args, &page);
818 *handle = pfn_to_dma(dev, page_to_pfn(page));
819 buf->virt = args.want_vaddr ? addr : page;
821 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
822 list_add(&buf->list, &arm_dma_bufs);
823 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
828 return args.want_vaddr ? addr : page;
832 * Allocate DMA-coherent memory space and return both the kernel remapped
833 * virtual and bus address for that space.
835 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
836 gfp_t gfp, unsigned long attrs)
838 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
840 return __dma_alloc(dev, size, handle, gfp, prot, false,
841 attrs, __builtin_return_address(0));
844 static void *arm_coherent_dma_alloc(struct device *dev, size_t size,
845 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
847 return __dma_alloc(dev, size, handle, gfp, PAGE_KERNEL, true,
848 attrs, __builtin_return_address(0));
851 static int __arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
852 void *cpu_addr, dma_addr_t dma_addr, size_t size,
857 unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
858 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
859 unsigned long pfn = dma_to_pfn(dev, dma_addr);
860 unsigned long off = vma->vm_pgoff;
862 if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
865 if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
866 ret = remap_pfn_range(vma, vma->vm_start,
868 vma->vm_end - vma->vm_start,
872 ret = vm_iomap_memory(vma, vma->vm_start,
873 (vma->vm_end - vma->vm_start));
874 #endif /* CONFIG_MMU */
880 * Create userspace mapping for the DMA-coherent memory.
882 static int arm_coherent_dma_mmap(struct device *dev, struct vm_area_struct *vma,
883 void *cpu_addr, dma_addr_t dma_addr, size_t size,
886 return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
889 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
890 void *cpu_addr, dma_addr_t dma_addr, size_t size,
894 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
895 #endif /* CONFIG_MMU */
896 return __arm_dma_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
900 * Free a buffer as defined by the above mapping.
902 static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
903 dma_addr_t handle, unsigned long attrs,
906 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
907 struct arm_dma_buffer *buf;
908 struct arm_dma_free_args args = {
910 .size = PAGE_ALIGN(size),
911 .cpu_addr = cpu_addr,
913 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
916 buf = arm_dma_buffer_find(cpu_addr);
917 if (WARN(!buf, "Freeing invalid buffer %p\n", cpu_addr))
920 buf->allocator->free(&args);
924 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
925 dma_addr_t handle, unsigned long attrs)
927 __arm_dma_free(dev, size, cpu_addr, handle, attrs, false);
930 static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_addr,
931 dma_addr_t handle, unsigned long attrs)
933 __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
936 int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
937 void *cpu_addr, dma_addr_t handle, size_t size,
940 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
943 ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
947 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
951 static void dma_cache_maint_page(struct page *page, unsigned long offset,
952 size_t size, enum dma_data_direction dir,
953 void (*op)(const void *, size_t, int))
958 pfn = page_to_pfn(page) + offset / PAGE_SIZE;
962 * A single sg entry may refer to multiple physically contiguous
963 * pages. But we still need to process highmem pages individually.
964 * If highmem is not configured then the bulk of this loop gets
971 page = pfn_to_page(pfn);
973 if (PageHighMem(page)) {
974 if (len + offset > PAGE_SIZE)
975 len = PAGE_SIZE - offset;
977 if (cache_is_vipt_nonaliasing()) {
978 vaddr = kmap_atomic(page);
979 op(vaddr + offset, len, dir);
980 kunmap_atomic(vaddr);
982 vaddr = kmap_high_get(page);
984 op(vaddr + offset, len, dir);
989 vaddr = page_address(page) + offset;
999 * Make an area consistent for devices.
1000 * Note: Drivers should NOT use this function directly, as it will break
1001 * platforms with CONFIG_DMABOUNCE.
1002 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
1004 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
1005 size_t size, enum dma_data_direction dir)
1009 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
1011 paddr = page_to_phys(page) + off;
1012 if (dir == DMA_FROM_DEVICE) {
1013 outer_inv_range(paddr, paddr + size);
1015 outer_clean_range(paddr, paddr + size);
1017 /* FIXME: non-speculating: flush on bidirectional mappings? */
1020 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
1021 size_t size, enum dma_data_direction dir)
1023 phys_addr_t paddr = page_to_phys(page) + off;
1025 /* FIXME: non-speculating: not required */
1026 /* in any case, don't bother invalidating if DMA to device */
1027 if (dir != DMA_TO_DEVICE) {
1028 outer_inv_range(paddr, paddr + size);
1030 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
1034 * Mark the D-cache clean for these pages to avoid extra flushing.
1036 if (dir != DMA_TO_DEVICE && size >= PAGE_SIZE) {
1040 pfn = page_to_pfn(page) + off / PAGE_SIZE;
1044 left -= PAGE_SIZE - off;
1046 while (left >= PAGE_SIZE) {
1047 page = pfn_to_page(pfn++);
1048 set_bit(PG_dcache_clean, &page->flags);
1055 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
1056 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1057 * @sg: list of buffers
1058 * @nents: number of buffers to map
1059 * @dir: DMA transfer direction
1061 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1062 * This is the scatter-gather version of the dma_map_single interface.
1063 * Here the scatter gather list elements are each tagged with the
1064 * appropriate dma address and length. They are obtained via
1065 * sg_dma_{address,length}.
1067 * Device ownership issues as mentioned for dma_map_single are the same
1070 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1071 enum dma_data_direction dir, unsigned long attrs)
1073 struct dma_map_ops *ops = get_dma_ops(dev);
1074 struct scatterlist *s;
1077 for_each_sg(sg, s, nents, i) {
1078 #ifdef CONFIG_NEED_SG_DMA_LENGTH
1079 s->dma_length = s->length;
1081 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
1082 s->length, dir, attrs);
1083 if (dma_mapping_error(dev, s->dma_address))
1089 for_each_sg(sg, s, i, j)
1090 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1095 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1096 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1097 * @sg: list of buffers
1098 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1099 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1101 * Unmap a set of streaming mode DMA translations. Again, CPU access
1102 * rules concerning calls here are the same as for dma_unmap_single().
1104 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1105 enum dma_data_direction dir, unsigned long attrs)
1107 struct dma_map_ops *ops = get_dma_ops(dev);
1108 struct scatterlist *s;
1112 for_each_sg(sg, s, nents, i)
1113 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
1117 * arm_dma_sync_sg_for_cpu
1118 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1119 * @sg: list of buffers
1120 * @nents: number of buffers to map (returned from dma_map_sg)
1121 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1123 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1124 int nents, enum dma_data_direction dir)
1126 struct dma_map_ops *ops = get_dma_ops(dev);
1127 struct scatterlist *s;
1130 for_each_sg(sg, s, nents, i)
1131 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
1136 * arm_dma_sync_sg_for_device
1137 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1138 * @sg: list of buffers
1139 * @nents: number of buffers to map (returned from dma_map_sg)
1140 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1142 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1143 int nents, enum dma_data_direction dir)
1145 struct dma_map_ops *ops = get_dma_ops(dev);
1146 struct scatterlist *s;
1149 for_each_sg(sg, s, nents, i)
1150 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
1155 * Return whether the given device DMA address mask can be supported
1156 * properly. For example, if your device can only drive the low 24-bits
1157 * during bus mastering, then you would pass 0x00ffffff as the mask
1160 int dma_supported(struct device *dev, u64 mask)
1162 return __dma_supported(dev, mask, false);
1164 EXPORT_SYMBOL(dma_supported);
1166 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
1168 static int __init dma_debug_do_init(void)
1170 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
1173 core_initcall(dma_debug_do_init);
1175 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1179 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping);
1181 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
1184 unsigned int order = get_order(size);
1185 unsigned int align = 0;
1186 unsigned int count, start;
1187 size_t mapping_size = mapping->bits << PAGE_SHIFT;
1188 unsigned long flags;
1192 if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
1193 order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
1195 count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1196 align = (1 << order) - 1;
1198 spin_lock_irqsave(&mapping->lock, flags);
1199 for (i = 0; i < mapping->nr_bitmaps; i++) {
1200 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1201 mapping->bits, 0, count, align);
1203 if (start > mapping->bits)
1206 bitmap_set(mapping->bitmaps[i], start, count);
1211 * No unused range found. Try to extend the existing mapping
1212 * and perform a second attempt to reserve an IO virtual
1213 * address range of size bytes.
1215 if (i == mapping->nr_bitmaps) {
1216 if (extend_iommu_mapping(mapping)) {
1217 spin_unlock_irqrestore(&mapping->lock, flags);
1218 return DMA_ERROR_CODE;
1221 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
1222 mapping->bits, 0, count, align);
1224 if (start > mapping->bits) {
1225 spin_unlock_irqrestore(&mapping->lock, flags);
1226 return DMA_ERROR_CODE;
1229 bitmap_set(mapping->bitmaps[i], start, count);
1231 spin_unlock_irqrestore(&mapping->lock, flags);
1233 iova = mapping->base + (mapping_size * i);
1234 iova += start << PAGE_SHIFT;
1239 static inline void __free_iova(struct dma_iommu_mapping *mapping,
1240 dma_addr_t addr, size_t size)
1242 unsigned int start, count;
1243 size_t mapping_size = mapping->bits << PAGE_SHIFT;
1244 unsigned long flags;
1245 dma_addr_t bitmap_base;
1251 bitmap_index = (u32) (addr - mapping->base) / (u32) mapping_size;
1252 BUG_ON(addr < mapping->base || bitmap_index > mapping->extensions);
1254 bitmap_base = mapping->base + mapping_size * bitmap_index;
1256 start = (addr - bitmap_base) >> PAGE_SHIFT;
1258 if (addr + size > bitmap_base + mapping_size) {
1260 * The address range to be freed reaches into the iova
1261 * range of the next bitmap. This should not happen as
1262 * we don't allow this in __alloc_iova (at the
1267 count = size >> PAGE_SHIFT;
1269 spin_lock_irqsave(&mapping->lock, flags);
1270 bitmap_clear(mapping->bitmaps[bitmap_index], start, count);
1271 spin_unlock_irqrestore(&mapping->lock, flags);
1274 /* We'll try 2M, 1M, 64K, and finally 4K; array must end with 0! */
1275 static const int iommu_order_array[] = { 9, 8, 4, 0 };
1277 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
1278 gfp_t gfp, unsigned long attrs,
1281 struct page **pages;
1282 int count = size >> PAGE_SHIFT;
1283 int array_size = count * sizeof(struct page *);
1287 if (array_size <= PAGE_SIZE)
1288 pages = kzalloc(array_size, GFP_KERNEL);
1290 pages = vzalloc(array_size);
1294 if (attrs & DMA_ATTR_FORCE_CONTIGUOUS)
1296 unsigned long order = get_order(size);
1299 page = dma_alloc_from_contiguous(dev, count, order);
1303 __dma_clear_buffer(page, size, coherent_flag);
1305 for (i = 0; i < count; i++)
1306 pages[i] = page + i;
1311 /* Go straight to 4K chunks if caller says it's OK. */
1312 if (attrs & DMA_ATTR_ALLOC_SINGLE_PAGES)
1313 order_idx = ARRAY_SIZE(iommu_order_array) - 1;
1316 * IOMMU can map any pages, so himem can also be used here
1318 gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
1323 order = iommu_order_array[order_idx];
1325 /* Drop down when we get small */
1326 if (__fls(count) < order) {
1332 /* See if it's easy to allocate a high-order chunk */
1333 pages[i] = alloc_pages(gfp | __GFP_NORETRY, order);
1335 /* Go down a notch at first sign of pressure */
1341 pages[i] = alloc_pages(gfp, 0);
1347 split_page(pages[i], order);
1350 pages[i + j] = pages[i] + j;
1353 __dma_clear_buffer(pages[i], PAGE_SIZE << order, coherent_flag);
1355 count -= 1 << order;
1362 __free_pages(pages[i], 0);
1367 static int __iommu_free_buffer(struct device *dev, struct page **pages,
1368 size_t size, unsigned long attrs)
1370 int count = size >> PAGE_SHIFT;
1373 if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
1374 dma_release_from_contiguous(dev, pages[0], count);
1376 for (i = 0; i < count; i++)
1378 __free_pages(pages[i], 0);
1386 * Create a CPU mapping for a specified pages
1389 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1392 return dma_common_pages_remap(pages, size,
1393 VM_ARM_DMA_CONSISTENT | VM_USERMAP, prot, caller);
1397 * Create a mapping in device IO address space for specified pages
1400 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
1402 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1403 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1404 dma_addr_t dma_addr, iova;
1407 dma_addr = __alloc_iova(mapping, size);
1408 if (dma_addr == DMA_ERROR_CODE)
1412 for (i = 0; i < count; ) {
1415 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1416 phys_addr_t phys = page_to_phys(pages[i]);
1417 unsigned int len, j;
1419 for (j = i + 1; j < count; j++, next_pfn++)
1420 if (page_to_pfn(pages[j]) != next_pfn)
1423 len = (j - i) << PAGE_SHIFT;
1424 ret = iommu_map(mapping->domain, iova, phys, len,
1425 IOMMU_READ|IOMMU_WRITE);
1433 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1434 __free_iova(mapping, dma_addr, size);
1435 return DMA_ERROR_CODE;
1438 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1440 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1443 * add optional in-page offset from iova to size and align
1444 * result to page size
1446 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1449 iommu_unmap(mapping->domain, iova, size);
1450 __free_iova(mapping, iova, size);
1454 static struct page **__atomic_get_pages(void *addr)
1459 phys = gen_pool_virt_to_phys(atomic_pool, (unsigned long)addr);
1460 page = phys_to_page(phys);
1462 return (struct page **)page;
1465 static struct page **__iommu_get_pages(void *cpu_addr, unsigned long attrs)
1467 struct vm_struct *area;
1469 if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1470 return __atomic_get_pages(cpu_addr);
1472 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1475 area = find_vm_area(cpu_addr);
1476 if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1481 static void *__iommu_alloc_simple(struct device *dev, size_t size, gfp_t gfp,
1482 dma_addr_t *handle, int coherent_flag)
1487 if (coherent_flag == COHERENT)
1488 addr = __alloc_simple_buffer(dev, size, gfp, &page);
1490 addr = __alloc_from_pool(size, &page);
1494 *handle = __iommu_create_mapping(dev, &page, size);
1495 if (*handle == DMA_ERROR_CODE)
1501 __free_from_pool(addr, size);
1505 static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1506 dma_addr_t handle, size_t size, int coherent_flag)
1508 __iommu_remove_mapping(dev, handle, size);
1509 if (coherent_flag == COHERENT)
1510 __dma_free_buffer(virt_to_page(cpu_addr), size);
1512 __free_from_pool(cpu_addr, size);
1515 static void *__arm_iommu_alloc_attrs(struct device *dev, size_t size,
1516 dma_addr_t *handle, gfp_t gfp, unsigned long attrs,
1519 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
1520 struct page **pages;
1523 *handle = DMA_ERROR_CODE;
1524 size = PAGE_ALIGN(size);
1526 if (coherent_flag == COHERENT || !gfpflags_allow_blocking(gfp))
1527 return __iommu_alloc_simple(dev, size, gfp, handle,
1531 * Following is a work-around (a.k.a. hack) to prevent pages
1532 * with __GFP_COMP being passed to split_page() which cannot
1533 * handle them. The real problem is that this flag probably
1534 * should be 0 on ARM as it is not supported on this
1535 * platform; see CONFIG_HUGETLBFS.
1537 gfp &= ~(__GFP_COMP);
1539 pages = __iommu_alloc_buffer(dev, size, gfp, attrs, coherent_flag);
1543 *handle = __iommu_create_mapping(dev, pages, size);
1544 if (*handle == DMA_ERROR_CODE)
1547 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1550 addr = __iommu_alloc_remap(pages, size, gfp, prot,
1551 __builtin_return_address(0));
1558 __iommu_remove_mapping(dev, *handle, size);
1560 __iommu_free_buffer(dev, pages, size, attrs);
1564 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1565 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1567 return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, NORMAL);
1570 static void *arm_coherent_iommu_alloc_attrs(struct device *dev, size_t size,
1571 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1573 return __arm_iommu_alloc_attrs(dev, size, handle, gfp, attrs, COHERENT);
1576 static int __arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1577 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1578 unsigned long attrs)
1580 unsigned long uaddr = vma->vm_start;
1581 unsigned long usize = vma->vm_end - vma->vm_start;
1582 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1583 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1584 unsigned long off = vma->vm_pgoff;
1589 if (off >= nr_pages || (usize >> PAGE_SHIFT) > nr_pages - off)
1595 int ret = vm_insert_page(vma, uaddr, *pages++);
1597 pr_err("Remapping memory failed: %d\n", ret);
1602 } while (usize > 0);
1606 static int arm_iommu_mmap_attrs(struct device *dev,
1607 struct vm_area_struct *vma, void *cpu_addr,
1608 dma_addr_t dma_addr, size_t size, unsigned long attrs)
1610 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1612 return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1615 static int arm_coherent_iommu_mmap_attrs(struct device *dev,
1616 struct vm_area_struct *vma, void *cpu_addr,
1617 dma_addr_t dma_addr, size_t size, unsigned long attrs)
1619 return __arm_iommu_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, attrs);
1623 * free a page as defined by the above mapping.
1624 * Must not be called with IRQs disabled.
1626 void __arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1627 dma_addr_t handle, unsigned long attrs, int coherent_flag)
1629 struct page **pages;
1630 size = PAGE_ALIGN(size);
1632 if (coherent_flag == COHERENT || __in_atomic_pool(cpu_addr, size)) {
1633 __iommu_free_atomic(dev, cpu_addr, handle, size, coherent_flag);
1637 pages = __iommu_get_pages(cpu_addr, attrs);
1639 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1643 if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0) {
1644 dma_common_free_remap(cpu_addr, size,
1645 VM_ARM_DMA_CONSISTENT | VM_USERMAP);
1648 __iommu_remove_mapping(dev, handle, size);
1649 __iommu_free_buffer(dev, pages, size, attrs);
1652 void arm_iommu_free_attrs(struct device *dev, size_t size,
1653 void *cpu_addr, dma_addr_t handle, unsigned long attrs)
1655 __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, NORMAL);
1658 void arm_coherent_iommu_free_attrs(struct device *dev, size_t size,
1659 void *cpu_addr, dma_addr_t handle, unsigned long attrs)
1661 __arm_iommu_free_attrs(dev, size, cpu_addr, handle, attrs, COHERENT);
1664 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1665 void *cpu_addr, dma_addr_t dma_addr,
1666 size_t size, unsigned long attrs)
1668 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1669 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1674 return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1678 static int __dma_direction_to_prot(enum dma_data_direction dir)
1683 case DMA_BIDIRECTIONAL:
1684 prot = IOMMU_READ | IOMMU_WRITE;
1689 case DMA_FROM_DEVICE:
1700 * Map a part of the scatter-gather list into contiguous io address space
1702 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1703 size_t size, dma_addr_t *handle,
1704 enum dma_data_direction dir, unsigned long attrs,
1707 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1708 dma_addr_t iova, iova_base;
1711 struct scatterlist *s;
1714 size = PAGE_ALIGN(size);
1715 *handle = DMA_ERROR_CODE;
1717 iova_base = iova = __alloc_iova(mapping, size);
1718 if (iova == DMA_ERROR_CODE)
1721 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1722 phys_addr_t phys = page_to_phys(sg_page(s));
1723 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1725 if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1726 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1728 prot = __dma_direction_to_prot(dir);
1730 ret = iommu_map(mapping->domain, iova, phys, len, prot);
1733 count += len >> PAGE_SHIFT;
1736 *handle = iova_base;
1740 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1741 __free_iova(mapping, iova_base, size);
1745 static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1746 enum dma_data_direction dir, unsigned long attrs,
1749 struct scatterlist *s = sg, *dma = sg, *start = sg;
1751 unsigned int offset = s->offset;
1752 unsigned int size = s->offset + s->length;
1753 unsigned int max = dma_get_max_seg_size(dev);
1755 for (i = 1; i < nents; i++) {
1758 s->dma_address = DMA_ERROR_CODE;
1761 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1762 if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1763 dir, attrs, is_coherent) < 0)
1766 dma->dma_address += offset;
1767 dma->dma_length = size - offset;
1769 size = offset = s->offset;
1776 if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
1780 dma->dma_address += offset;
1781 dma->dma_length = size - offset;
1786 for_each_sg(sg, s, count, i)
1787 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1792 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1793 * @dev: valid struct device pointer
1794 * @sg: list of buffers
1795 * @nents: number of buffers to map
1796 * @dir: DMA transfer direction
1798 * Map a set of i/o coherent buffers described by scatterlist in streaming
1799 * mode for DMA. The scatter gather list elements are merged together (if
1800 * possible) and tagged with the appropriate dma address and length. They are
1801 * obtained via sg_dma_{address,length}.
1803 int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1804 int nents, enum dma_data_direction dir, unsigned long attrs)
1806 return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
1810 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1811 * @dev: valid struct device pointer
1812 * @sg: list of buffers
1813 * @nents: number of buffers to map
1814 * @dir: DMA transfer direction
1816 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1817 * The scatter gather list elements are merged together (if possible) and
1818 * tagged with the appropriate dma address and length. They are obtained via
1819 * sg_dma_{address,length}.
1821 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1822 int nents, enum dma_data_direction dir, unsigned long attrs)
1824 return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
1827 static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1828 int nents, enum dma_data_direction dir,
1829 unsigned long attrs, bool is_coherent)
1831 struct scatterlist *s;
1834 for_each_sg(sg, s, nents, i) {
1836 __iommu_remove_mapping(dev, sg_dma_address(s),
1838 if (!is_coherent && (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1839 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1845 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1846 * @dev: valid struct device pointer
1847 * @sg: list of buffers
1848 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1849 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1851 * Unmap a set of streaming mode DMA translations. Again, CPU access
1852 * rules concerning calls here are the same as for dma_unmap_single().
1854 void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
1855 int nents, enum dma_data_direction dir,
1856 unsigned long attrs)
1858 __iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
1862 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1863 * @dev: valid struct device pointer
1864 * @sg: list of buffers
1865 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1866 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1868 * Unmap a set of streaming mode DMA translations. Again, CPU access
1869 * rules concerning calls here are the same as for dma_unmap_single().
1871 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1872 enum dma_data_direction dir,
1873 unsigned long attrs)
1875 __iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
1879 * arm_iommu_sync_sg_for_cpu
1880 * @dev: valid struct device pointer
1881 * @sg: list of buffers
1882 * @nents: number of buffers to map (returned from dma_map_sg)
1883 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1885 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1886 int nents, enum dma_data_direction dir)
1888 struct scatterlist *s;
1891 for_each_sg(sg, s, nents, i)
1892 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1897 * arm_iommu_sync_sg_for_device
1898 * @dev: valid struct device pointer
1899 * @sg: list of buffers
1900 * @nents: number of buffers to map (returned from dma_map_sg)
1901 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1903 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1904 int nents, enum dma_data_direction dir)
1906 struct scatterlist *s;
1909 for_each_sg(sg, s, nents, i)
1910 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1915 * arm_coherent_iommu_map_page
1916 * @dev: valid struct device pointer
1917 * @page: page that buffer resides in
1918 * @offset: offset into page for start of buffer
1919 * @size: size of buffer to map
1920 * @dir: DMA transfer direction
1922 * Coherent IOMMU aware version of arm_dma_map_page()
1924 static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
1925 unsigned long offset, size_t size, enum dma_data_direction dir,
1926 unsigned long attrs)
1928 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1929 dma_addr_t dma_addr;
1930 int ret, prot, len = PAGE_ALIGN(size + offset);
1932 dma_addr = __alloc_iova(mapping, len);
1933 if (dma_addr == DMA_ERROR_CODE)
1936 prot = __dma_direction_to_prot(dir);
1938 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, prot);
1942 return dma_addr + offset;
1944 __free_iova(mapping, dma_addr, len);
1945 return DMA_ERROR_CODE;
1949 * arm_iommu_map_page
1950 * @dev: valid struct device pointer
1951 * @page: page that buffer resides in
1952 * @offset: offset into page for start of buffer
1953 * @size: size of buffer to map
1954 * @dir: DMA transfer direction
1956 * IOMMU aware version of arm_dma_map_page()
1958 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1959 unsigned long offset, size_t size, enum dma_data_direction dir,
1960 unsigned long attrs)
1962 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
1963 __dma_page_cpu_to_dev(page, offset, size, dir);
1965 return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
1969 * arm_coherent_iommu_unmap_page
1970 * @dev: valid struct device pointer
1971 * @handle: DMA address of buffer
1972 * @size: size of buffer (same as passed to dma_map_page)
1973 * @dir: DMA transfer direction (same as passed to dma_map_page)
1975 * Coherent IOMMU aware version of arm_dma_unmap_page()
1977 static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1978 size_t size, enum dma_data_direction dir, unsigned long attrs)
1980 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1981 dma_addr_t iova = handle & PAGE_MASK;
1982 int offset = handle & ~PAGE_MASK;
1983 int len = PAGE_ALIGN(size + offset);
1988 iommu_unmap(mapping->domain, iova, len);
1989 __free_iova(mapping, iova, len);
1993 * arm_iommu_unmap_page
1994 * @dev: valid struct device pointer
1995 * @handle: DMA address of buffer
1996 * @size: size of buffer (same as passed to dma_map_page)
1997 * @dir: DMA transfer direction (same as passed to dma_map_page)
1999 * IOMMU aware version of arm_dma_unmap_page()
2001 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
2002 size_t size, enum dma_data_direction dir, unsigned long attrs)
2004 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2005 dma_addr_t iova = handle & PAGE_MASK;
2006 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
2007 int offset = handle & ~PAGE_MASK;
2008 int len = PAGE_ALIGN(size + offset);
2013 if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
2014 __dma_page_dev_to_cpu(page, offset, size, dir);
2016 iommu_unmap(mapping->domain, iova, len);
2017 __free_iova(mapping, iova, len);
2021 * arm_iommu_map_resource - map a device resource for DMA
2022 * @dev: valid struct device pointer
2023 * @phys_addr: physical address of resource
2024 * @size: size of resource to map
2025 * @dir: DMA transfer direction
2027 static dma_addr_t arm_iommu_map_resource(struct device *dev,
2028 phys_addr_t phys_addr, size_t size,
2029 enum dma_data_direction dir, unsigned long attrs)
2031 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2032 dma_addr_t dma_addr;
2034 phys_addr_t addr = phys_addr & PAGE_MASK;
2035 unsigned int offset = phys_addr & ~PAGE_MASK;
2036 size_t len = PAGE_ALIGN(size + offset);
2038 dma_addr = __alloc_iova(mapping, len);
2039 if (dma_addr == DMA_ERROR_CODE)
2042 prot = __dma_direction_to_prot(dir) | IOMMU_MMIO;
2044 ret = iommu_map(mapping->domain, dma_addr, addr, len, prot);
2048 return dma_addr + offset;
2050 __free_iova(mapping, dma_addr, len);
2051 return DMA_ERROR_CODE;
2055 * arm_iommu_unmap_resource - unmap a device DMA resource
2056 * @dev: valid struct device pointer
2057 * @dma_handle: DMA address to resource
2058 * @size: size of resource to map
2059 * @dir: DMA transfer direction
2061 static void arm_iommu_unmap_resource(struct device *dev, dma_addr_t dma_handle,
2062 size_t size, enum dma_data_direction dir,
2063 unsigned long attrs)
2065 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2066 dma_addr_t iova = dma_handle & PAGE_MASK;
2067 unsigned int offset = dma_handle & ~PAGE_MASK;
2068 size_t len = PAGE_ALIGN(size + offset);
2073 iommu_unmap(mapping->domain, iova, len);
2074 __free_iova(mapping, iova, len);
2077 static void arm_iommu_sync_single_for_cpu(struct device *dev,
2078 dma_addr_t handle, size_t size, enum dma_data_direction dir)
2080 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2081 dma_addr_t iova = handle & PAGE_MASK;
2082 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
2083 unsigned int offset = handle & ~PAGE_MASK;
2088 __dma_page_dev_to_cpu(page, offset, size, dir);
2091 static void arm_iommu_sync_single_for_device(struct device *dev,
2092 dma_addr_t handle, size_t size, enum dma_data_direction dir)
2094 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2095 dma_addr_t iova = handle & PAGE_MASK;
2096 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
2097 unsigned int offset = handle & ~PAGE_MASK;
2102 __dma_page_cpu_to_dev(page, offset, size, dir);
2105 struct dma_map_ops iommu_ops = {
2106 .alloc = arm_iommu_alloc_attrs,
2107 .free = arm_iommu_free_attrs,
2108 .mmap = arm_iommu_mmap_attrs,
2109 .get_sgtable = arm_iommu_get_sgtable,
2111 .map_page = arm_iommu_map_page,
2112 .unmap_page = arm_iommu_unmap_page,
2113 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
2114 .sync_single_for_device = arm_iommu_sync_single_for_device,
2116 .map_sg = arm_iommu_map_sg,
2117 .unmap_sg = arm_iommu_unmap_sg,
2118 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
2119 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
2121 .map_resource = arm_iommu_map_resource,
2122 .unmap_resource = arm_iommu_unmap_resource,
2125 struct dma_map_ops iommu_coherent_ops = {
2126 .alloc = arm_coherent_iommu_alloc_attrs,
2127 .free = arm_coherent_iommu_free_attrs,
2128 .mmap = arm_coherent_iommu_mmap_attrs,
2129 .get_sgtable = arm_iommu_get_sgtable,
2131 .map_page = arm_coherent_iommu_map_page,
2132 .unmap_page = arm_coherent_iommu_unmap_page,
2134 .map_sg = arm_coherent_iommu_map_sg,
2135 .unmap_sg = arm_coherent_iommu_unmap_sg,
2137 .map_resource = arm_iommu_map_resource,
2138 .unmap_resource = arm_iommu_unmap_resource,
2142 * arm_iommu_create_mapping
2143 * @bus: pointer to the bus holding the client device (for IOMMU calls)
2144 * @base: start address of the valid IO address space
2145 * @size: maximum size of the valid IO address space
2147 * Creates a mapping structure which holds information about used/unused
2148 * IO address ranges, which is required to perform memory allocation and
2149 * mapping with IOMMU aware functions.
2151 * The client device need to be attached to the mapping with
2152 * arm_iommu_attach_device function.
2154 struct dma_iommu_mapping *
2155 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size)
2157 unsigned int bits = size >> PAGE_SHIFT;
2158 unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long);
2159 struct dma_iommu_mapping *mapping;
2163 /* currently only 32-bit DMA address space is supported */
2164 if (size > DMA_BIT_MASK(32) + 1)
2165 return ERR_PTR(-ERANGE);
2168 return ERR_PTR(-EINVAL);
2170 if (bitmap_size > PAGE_SIZE) {
2171 extensions = bitmap_size / PAGE_SIZE;
2172 bitmap_size = PAGE_SIZE;
2175 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
2179 mapping->bitmap_size = bitmap_size;
2180 mapping->bitmaps = kzalloc(extensions * sizeof(unsigned long *),
2182 if (!mapping->bitmaps)
2185 mapping->bitmaps[0] = kzalloc(bitmap_size, GFP_KERNEL);
2186 if (!mapping->bitmaps[0])
2189 mapping->nr_bitmaps = 1;
2190 mapping->extensions = extensions;
2191 mapping->base = base;
2192 mapping->bits = BITS_PER_BYTE * bitmap_size;
2194 spin_lock_init(&mapping->lock);
2196 mapping->domain = iommu_domain_alloc(bus);
2197 if (!mapping->domain)
2200 kref_init(&mapping->kref);
2203 kfree(mapping->bitmaps[0]);
2205 kfree(mapping->bitmaps);
2209 return ERR_PTR(err);
2211 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
2213 static void release_iommu_mapping(struct kref *kref)
2216 struct dma_iommu_mapping *mapping =
2217 container_of(kref, struct dma_iommu_mapping, kref);
2219 iommu_domain_free(mapping->domain);
2220 for (i = 0; i < mapping->nr_bitmaps; i++)
2221 kfree(mapping->bitmaps[i]);
2222 kfree(mapping->bitmaps);
2226 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping)
2230 if (mapping->nr_bitmaps >= mapping->extensions)
2233 next_bitmap = mapping->nr_bitmaps;
2234 mapping->bitmaps[next_bitmap] = kzalloc(mapping->bitmap_size,
2236 if (!mapping->bitmaps[next_bitmap])
2239 mapping->nr_bitmaps++;
2244 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
2247 kref_put(&mapping->kref, release_iommu_mapping);
2249 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
2251 static int __arm_iommu_attach_device(struct device *dev,
2252 struct dma_iommu_mapping *mapping)
2256 err = iommu_attach_device(mapping->domain, dev);
2260 kref_get(&mapping->kref);
2261 to_dma_iommu_mapping(dev) = mapping;
2263 pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
2268 * arm_iommu_attach_device
2269 * @dev: valid struct device pointer
2270 * @mapping: io address space mapping structure (returned from
2271 * arm_iommu_create_mapping)
2273 * Attaches specified io address space mapping to the provided device.
2274 * This replaces the dma operations (dma_map_ops pointer) with the
2275 * IOMMU aware version.
2277 * More than one client might be attached to the same io address space
2280 int arm_iommu_attach_device(struct device *dev,
2281 struct dma_iommu_mapping *mapping)
2285 err = __arm_iommu_attach_device(dev, mapping);
2289 set_dma_ops(dev, &iommu_ops);
2292 EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
2294 static void __arm_iommu_detach_device(struct device *dev)
2296 struct dma_iommu_mapping *mapping;
2298 mapping = to_dma_iommu_mapping(dev);
2300 dev_warn(dev, "Not attached\n");
2304 iommu_detach_device(mapping->domain, dev);
2305 kref_put(&mapping->kref, release_iommu_mapping);
2306 to_dma_iommu_mapping(dev) = NULL;
2308 pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
2312 * arm_iommu_detach_device
2313 * @dev: valid struct device pointer
2315 * Detaches the provided device from a previously attached map.
2316 * This voids the dma operations (dma_map_ops pointer)
2318 void arm_iommu_detach_device(struct device *dev)
2320 __arm_iommu_detach_device(dev);
2321 set_dma_ops(dev, NULL);
2323 EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
2325 static struct dma_map_ops *arm_get_iommu_dma_map_ops(bool coherent)
2327 return coherent ? &iommu_coherent_ops : &iommu_ops;
2330 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2331 const struct iommu_ops *iommu)
2333 struct dma_iommu_mapping *mapping;
2338 mapping = arm_iommu_create_mapping(dev->bus, dma_base, size);
2339 if (IS_ERR(mapping)) {
2340 pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
2341 size, dev_name(dev));
2345 if (__arm_iommu_attach_device(dev, mapping)) {
2346 pr_warn("Failed to attached device %s to IOMMU_mapping\n",
2348 arm_iommu_release_mapping(mapping);
2355 static void arm_teardown_iommu_dma_ops(struct device *dev)
2357 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
2362 __arm_iommu_detach_device(dev);
2363 arm_iommu_release_mapping(mapping);
2368 static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
2369 const struct iommu_ops *iommu)
2374 static void arm_teardown_iommu_dma_ops(struct device *dev) { }
2376 #define arm_get_iommu_dma_map_ops arm_get_dma_map_ops
2378 #endif /* CONFIG_ARM_DMA_USE_IOMMU */
2380 static struct dma_map_ops *arm_get_dma_map_ops(bool coherent)
2382 return coherent ? &arm_coherent_dma_ops : &arm_dma_ops;
2385 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
2386 const struct iommu_ops *iommu, bool coherent)
2388 struct dma_map_ops *dma_ops;
2390 dev->archdata.dma_coherent = coherent;
2391 if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu))
2392 dma_ops = arm_get_iommu_dma_map_ops(coherent);
2394 dma_ops = arm_get_dma_map_ops(coherent);
2396 set_dma_ops(dev, dma_ops);
2399 void arch_teardown_dma_ops(struct device *dev)
2401 arm_teardown_iommu_dma_ops(dev);