2 * arch/arm/mach-tegra/fuse.c
4 * Copyright (C) 2010 Google, Inc.
7 * Colin Cross <ccross@android.com>
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
20 #include <linux/kernel.h>
23 #include <mach/iomap.h>
28 #define FUSE_UID_LOW 0x108
29 #define FUSE_UID_HIGH 0x10c
30 #define FUSE_SKU_INFO 0x110
31 #define FUSE_SPARE_BIT 0x200
34 int tegra_cpu_process_id;
35 int tegra_core_process_id;
36 enum tegra_revision tegra_revision;
38 static const char *tegra_revision_name[TEGRA_REVISION_MAX] = {
39 [TEGRA_REVISION_UNKNOWN] = "unknown",
40 [TEGRA_REVISION_A01] = "A01",
41 [TEGRA_REVISION_A02] = "A02",
42 [TEGRA_REVISION_A03] = "A03",
43 [TEGRA_REVISION_A03p] = "A03 prime",
44 [TEGRA_REVISION_A04] = "A04",
47 static inline u32 tegra_fuse_readl(unsigned long offset)
49 return tegra_apb_readl(TEGRA_FUSE_BASE + offset);
52 static inline bool get_spare_fuse(int bit)
54 return tegra_fuse_readl(FUSE_SPARE_BIT + bit * 4);
57 static enum tegra_revision tegra_get_revision(void)
59 void __iomem *chip_id = IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804;
60 u32 id = readl(chip_id);
61 u32 minor_rev = (id >> 16) & 0xf;
62 u32 chipid = (id >> 8) & 0xff;
66 return TEGRA_REVISION_A01;
68 return TEGRA_REVISION_A02;
70 if (chipid == 0x20 && (get_spare_fuse(18) || get_spare_fuse(19)))
71 return TEGRA_REVISION_A03p;
73 return TEGRA_REVISION_A03;
75 return TEGRA_REVISION_A04;
77 return TEGRA_REVISION_UNKNOWN;
81 void tegra_init_fuse(void)
83 u32 reg = readl(IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48));
85 writel(reg, IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48));
87 reg = tegra_fuse_readl(FUSE_SKU_INFO);
88 tegra_sku_id = reg & 0xFF;
90 reg = tegra_fuse_readl(FUSE_SPARE_BIT);
91 tegra_cpu_process_id = (reg >> 6) & 3;
93 reg = tegra_fuse_readl(FUSE_SPARE_BIT);
94 tegra_core_process_id = (reg >> 12) & 3;
96 tegra_revision = tegra_get_revision();
98 pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n",
99 tegra_revision_name[tegra_get_revision()],
100 tegra_sku_id, tegra_cpu_process_id,
101 tegra_core_process_id);
104 unsigned long long tegra_chip_uid(void)
106 unsigned long long lo, hi;
108 lo = tegra_fuse_readl(FUSE_UID_LOW);
109 hi = tegra_fuse_readl(FUSE_UID_HIGH);
110 return (hi << 32ull) | lo;