Merge tag 'riscv-for-linus-5.13-mw0' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6-microblaze.git] / arch / arm / mach-spear / spear3xx.c
1 /*
2  * arch/arm/mach-spear3xx/spear3xx.c
3  *
4  * SPEAr3XX machines common source file
5  *
6  * Copyright (C) 2009-2012 ST Microelectronics
7  * Viresh Kumar <vireshk@kernel.org>
8  *
9  * This file is licensed under the terms of the GNU General Public
10  * License version 2. This program is licensed "as is" without any
11  * warranty of any kind, whether express or implied.
12  */
13
14 #define pr_fmt(fmt) "SPEAr3xx: " fmt
15
16 #include <linux/amba/pl022.h>
17 #include <linux/amba/pl080.h>
18 #include <linux/clk.h>
19 #include <linux/io.h>
20 #include <asm/mach/map.h>
21 #include "pl080.h"
22 #include "generic.h"
23 #include <mach/spear.h>
24 #include <mach/misc_regs.h>
25
26 /* ssp device registration */
27 struct pl022_ssp_controller pl022_plat_data = {
28         .bus_id = 0,
29         .enable_dma = 1,
30         .dma_filter = pl08x_filter_id,
31         .dma_tx_param = "ssp0_tx",
32         .dma_rx_param = "ssp0_rx",
33 };
34
35 /* dmac device registration */
36 struct pl08x_platform_data pl080_plat_data = {
37         .memcpy_burst_size = PL08X_BURST_SZ_16,
38         .memcpy_bus_width = PL08X_BUS_WIDTH_32_BITS,
39         .memcpy_prot_buff = true,
40         .memcpy_prot_cache = true,
41         .lli_buses = PL08X_AHB1,
42         .mem_buses = PL08X_AHB1,
43         .get_xfer_signal = pl080_get_signal,
44         .put_xfer_signal = pl080_put_signal,
45 };
46
47 /*
48  * Following will create 16MB static virtual/physical mappings
49  * PHYSICAL             VIRTUAL
50  * 0xD0000000           0xFD000000
51  * 0xFC000000           0xFC000000
52  */
53 struct map_desc spear3xx_io_desc[] __initdata = {
54         {
55                 .virtual        = (unsigned long)VA_SPEAR_ICM1_2_BASE,
56                 .pfn            = __phys_to_pfn(SPEAR_ICM1_2_BASE),
57                 .length         = SZ_16M,
58                 .type           = MT_DEVICE
59         }, {
60                 .virtual        = (unsigned long)VA_SPEAR_ICM3_SMI_CTRL_BASE,
61                 .pfn            = __phys_to_pfn(SPEAR_ICM3_SMI_CTRL_BASE),
62                 .length         = SZ_16M,
63                 .type           = MT_DEVICE
64         },
65 };
66
67 /* This will create static memory mapping for selected devices */
68 void __init spear3xx_map_io(void)
69 {
70         iotable_init(spear3xx_io_desc, ARRAY_SIZE(spear3xx_io_desc));
71 }
72
73 void __init spear3xx_timer_init(void)
74 {
75         char pclk_name[] = "pll3_clk";
76         struct clk *gpt_clk, *pclk;
77
78         spear3xx_clk_init(MISC_BASE, VA_SPEAR320_SOC_CONFIG_BASE);
79
80         /* get the system timer clock */
81         gpt_clk = clk_get_sys("gpt0", NULL);
82         if (IS_ERR(gpt_clk)) {
83                 pr_err("%s:couldn't get clk for gpt\n", __func__);
84                 BUG();
85         }
86
87         /* get the suitable parent clock for timer*/
88         pclk = clk_get(NULL, pclk_name);
89         if (IS_ERR(pclk)) {
90                 pr_err("%s:couldn't get %s as parent for gpt\n",
91                                 __func__, pclk_name);
92                 BUG();
93         }
94
95         clk_set_parent(gpt_clk, pclk);
96         clk_put(gpt_clk);
97         clk_put(pclk);
98
99         spear_setup_of_timer();
100 }