1 // SPDX-License-Identifier: GPL-2.0-only
3 * Support for the Arcom ZEUS.
5 * Copyright (C) 2006 Arcom Control Systems Ltd.
7 * Loosely based on Arcom's 2.6.16.28.
8 * Maintained by Marc Zyngier <maz@misterjones.org>
11 #include <linux/cpufreq.h>
12 #include <linux/interrupt.h>
13 #include <linux/leds.h>
14 #include <linux/irq.h>
16 #include <linux/property.h>
17 #include <linux/gpio.h>
18 #include <linux/gpio/machine.h>
19 #include <linux/serial_8250.h>
20 #include <linux/dm9000.h>
21 #include <linux/mmc/host.h>
22 #include <linux/spi/spi.h>
23 #include <linux/spi/pxa2xx_spi.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
26 #include <linux/mtd/physmap.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_data/i2c-pxa.h>
29 #include <linux/platform_data/pca953x.h>
30 #include <linux/apm-emulation.h>
31 #include <linux/regulator/fixed.h>
32 #include <linux/regulator/machine.h>
34 #include <asm/mach-types.h>
35 #include <asm/suspend.h>
36 #include <asm/system_info.h>
37 #include <asm/mach/arch.h>
38 #include <asm/mach/map.h>
42 #include <mach/regs-uart.h>
43 #include <linux/platform_data/usb-ohci-pxa27x.h>
44 #include <linux/platform_data/mmc-pxamci.h>
45 #include "pxa27x-udc.h"
47 #include <linux/platform_data/video-pxafb.h>
49 #include <mach/audio.h>
50 #include <linux/platform_data/pcmcia-pxa2xx_viper.h>
52 #include <mach/smemc.h>
60 static unsigned long zeus_irq_enabled_mask;
61 static const int zeus_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, };
62 static const int zeus_isa_irq_map[] = {
63 0, /* ISA irq #0, invalid */
64 0, /* ISA irq #1, invalid */
65 0, /* ISA irq #2, invalid */
66 1 << 0, /* ISA irq #3 */
67 1 << 1, /* ISA irq #4 */
68 1 << 2, /* ISA irq #5 */
69 1 << 3, /* ISA irq #6 */
70 1 << 4, /* ISA irq #7 */
71 0, /* ISA irq #8, invalid */
72 0, /* ISA irq #9, invalid */
73 1 << 5, /* ISA irq #10 */
74 1 << 6, /* ISA irq #11 */
75 1 << 7, /* ISA irq #12 */
78 static inline int zeus_irq_to_bitmask(unsigned int irq)
80 return zeus_isa_irq_map[irq - PXA_ISA_IRQ(0)];
83 static inline int zeus_bit_to_irq(int bit)
85 return zeus_isa_irqs[bit] + PXA_ISA_IRQ(0);
88 static void zeus_ack_irq(struct irq_data *d)
90 __raw_writew(zeus_irq_to_bitmask(d->irq), ZEUS_CPLD_ISA_IRQ);
93 static void zeus_mask_irq(struct irq_data *d)
95 zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(d->irq));
98 static void zeus_unmask_irq(struct irq_data *d)
100 zeus_irq_enabled_mask |= zeus_irq_to_bitmask(d->irq);
103 static inline unsigned long zeus_irq_pending(void)
105 return __raw_readw(ZEUS_CPLD_ISA_IRQ) & zeus_irq_enabled_mask;
108 static void zeus_irq_handler(struct irq_desc *desc)
111 unsigned long pending;
113 pending = zeus_irq_pending();
115 /* we're in a chained irq handler,
116 * so ack the interrupt by hand */
117 desc->irq_data.chip->irq_ack(&desc->irq_data);
119 if (likely(pending)) {
120 irq = zeus_bit_to_irq(__ffs(pending));
121 generic_handle_irq(irq);
123 pending = zeus_irq_pending();
127 static struct irq_chip zeus_irq_chip = {
129 .irq_ack = zeus_ack_irq,
130 .irq_mask = zeus_mask_irq,
131 .irq_unmask = zeus_unmask_irq,
134 static void __init zeus_init_irq(void)
141 /* Peripheral IRQs. It would be nice to move those inside driver
142 configuration, but it is not supported at the moment. */
143 irq_set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO), IRQ_TYPE_EDGE_RISING);
144 irq_set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO), IRQ_TYPE_EDGE_RISING);
145 irq_set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO), IRQ_TYPE_EDGE_RISING);
146 irq_set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO),
147 IRQ_TYPE_EDGE_FALLING);
148 irq_set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO), IRQ_TYPE_EDGE_FALLING);
151 for (level = 0; level < ARRAY_SIZE(zeus_isa_irqs); level++) {
152 isa_irq = zeus_bit_to_irq(level);
153 irq_set_chip_and_handler(isa_irq, &zeus_irq_chip,
155 irq_clear_status_flags(isa_irq, IRQ_NOREQUEST | IRQ_NOPROBE);
158 irq_set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING);
159 irq_set_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO), zeus_irq_handler);
168 static struct resource zeus_mtd_resources[] = {
169 [0] = { /* NOR Flash (up to 64MB) */
170 .start = ZEUS_FLASH_PHYS,
171 .end = ZEUS_FLASH_PHYS + SZ_64M - 1,
172 .flags = IORESOURCE_MEM,
175 .start = ZEUS_SRAM_PHYS,
176 .end = ZEUS_SRAM_PHYS + SZ_512K - 1,
177 .flags = IORESOURCE_MEM,
181 static struct physmap_flash_data zeus_flash_data[] = {
189 static struct platform_device zeus_mtd_devices[] = {
191 .name = "physmap-flash",
194 .platform_data = &zeus_flash_data[0],
196 .resource = &zeus_mtd_resources[0],
202 static struct resource zeus_serial_resources[] = {
206 .flags = IORESOURCE_MEM,
211 .flags = IORESOURCE_MEM,
216 .flags = IORESOURCE_MEM,
221 .flags = IORESOURCE_MEM,
226 .flags = IORESOURCE_MEM,
231 .flags = IORESOURCE_MEM,
235 static struct plat_serial8250_port serial_platform_data[] = {
237 /* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */
239 .mapbase = 0x10000000,
240 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTA_GPIO),
241 .irqflags = IRQF_TRIGGER_RISING,
244 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
248 .mapbase = 0x10800000,
249 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTB_GPIO),
250 .irqflags = IRQF_TRIGGER_RISING,
253 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
257 .mapbase = 0x11000000,
258 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTC_GPIO),
259 .irqflags = IRQF_TRIGGER_RISING,
262 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
266 .mapbase = 0x11800000,
267 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTD_GPIO),
268 .irqflags = IRQF_TRIGGER_RISING,
271 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
276 .membase = (void *)&FFUART,
277 .mapbase = __PREG(FFUART),
279 .uartclk = 921600 * 16,
281 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
285 .membase = (void *)&BTUART,
286 .mapbase = __PREG(BTUART),
288 .uartclk = 921600 * 16,
290 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
294 .membase = (void *)&STUART,
295 .mapbase = __PREG(STUART),
297 .uartclk = 921600 * 16,
299 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
305 static struct platform_device zeus_serial_device = {
306 .name = "serial8250",
307 .id = PLAT8250_DEV_PLATFORM,
309 .platform_data = serial_platform_data,
311 .num_resources = ARRAY_SIZE(zeus_serial_resources),
312 .resource = zeus_serial_resources,
316 static struct resource zeus_dm9k0_resource[] = {
318 .start = ZEUS_ETH0_PHYS,
319 .end = ZEUS_ETH0_PHYS + 1,
320 .flags = IORESOURCE_MEM
323 .start = ZEUS_ETH0_PHYS + 2,
324 .end = ZEUS_ETH0_PHYS + 3,
325 .flags = IORESOURCE_MEM
328 .start = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
329 .end = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
330 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
334 static struct resource zeus_dm9k1_resource[] = {
336 .start = ZEUS_ETH1_PHYS,
337 .end = ZEUS_ETH1_PHYS + 1,
338 .flags = IORESOURCE_MEM
341 .start = ZEUS_ETH1_PHYS + 2,
342 .end = ZEUS_ETH1_PHYS + 3,
343 .flags = IORESOURCE_MEM,
346 .start = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
347 .end = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
348 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
352 static struct dm9000_plat_data zeus_dm9k_platdata = {
353 .flags = DM9000_PLATF_16BITONLY,
356 static struct platform_device zeus_dm9k0_device = {
359 .num_resources = ARRAY_SIZE(zeus_dm9k0_resource),
360 .resource = zeus_dm9k0_resource,
362 .platform_data = &zeus_dm9k_platdata,
366 static struct platform_device zeus_dm9k1_device = {
369 .num_resources = ARRAY_SIZE(zeus_dm9k1_resource),
370 .resource = zeus_dm9k1_resource,
372 .platform_data = &zeus_dm9k_platdata,
377 static struct resource zeus_sram_resource = {
378 .start = ZEUS_SRAM_PHYS,
379 .end = ZEUS_SRAM_PHYS + ZEUS_SRAM_SIZE * 2 - 1,
380 .flags = IORESOURCE_MEM,
383 static struct platform_device zeus_sram_device = {
384 .name = "pxa2xx-8bit-sram",
387 .resource = &zeus_sram_resource,
390 /* SPI interface on SSP3 */
391 static struct pxa2xx_spi_controller pxa2xx_spi_ssp3_master_info = {
397 static struct regulator_consumer_supply can_regulator_consumer =
398 REGULATOR_SUPPLY("vdd", "spi3.0");
400 static struct regulator_init_data can_regulator_init_data = {
402 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
404 .consumer_supplies = &can_regulator_consumer,
405 .num_consumer_supplies = 1,
408 static struct fixed_voltage_config can_regulator_pdata = {
409 .supply_name = "CAN_SHDN",
410 .microvolts = 3300000,
411 .init_data = &can_regulator_init_data,
414 static struct platform_device can_regulator_device = {
415 .name = "reg-fixed-voltage",
418 .platform_data = &can_regulator_pdata,
422 static struct gpiod_lookup_table can_regulator_gpiod_table = {
423 .dev_id = "reg-fixed-voltage.0",
425 GPIO_LOOKUP("gpio-pxa", ZEUS_CAN_SHDN_GPIO,
426 NULL, GPIO_ACTIVE_LOW),
431 static const struct property_entry mcp251x_properties[] = {
432 PROPERTY_ENTRY_U32("clock-frequency", 16000000),
436 static const struct software_node mcp251x_node = {
437 .properties = mcp251x_properties,
440 static struct spi_board_info zeus_spi_board_info[] = {
442 .modalias = "mcp2515",
443 .swnode = &mcp251x_node,
444 .irq = PXA_GPIO_TO_IRQ(ZEUS_CAN_GPIO),
445 .max_speed_hz = 1*1000*1000,
453 static struct gpio_led zeus_leds[] = {
455 .name = "zeus:yellow:1",
456 .default_trigger = "heartbeat",
457 .gpio = ZEUS_EXT0_GPIO(3),
461 .name = "zeus:yellow:2",
462 .default_trigger = "default-on",
463 .gpio = ZEUS_EXT0_GPIO(4),
467 .name = "zeus:yellow:3",
468 .default_trigger = "default-on",
469 .gpio = ZEUS_EXT0_GPIO(5),
474 static struct gpio_led_platform_data zeus_leds_info = {
476 .num_leds = ARRAY_SIZE(zeus_leds),
479 static struct platform_device zeus_leds_device = {
483 .platform_data = &zeus_leds_info,
487 static void zeus_cf_reset(int state)
489 u16 cpld_state = __raw_readw(ZEUS_CPLD_CONTROL);
492 cpld_state |= ZEUS_CPLD_CONTROL_CF_RST;
494 cpld_state &= ~ZEUS_CPLD_CONTROL_CF_RST;
496 __raw_writew(cpld_state, ZEUS_CPLD_CONTROL);
499 static struct arcom_pcmcia_pdata zeus_pcmcia_info = {
500 .cd_gpio = ZEUS_CF_CD_GPIO,
501 .rdy_gpio = ZEUS_CF_RDY_GPIO,
502 .pwr_gpio = ZEUS_CF_PWEN_GPIO,
503 .reset = zeus_cf_reset,
506 static struct platform_device zeus_pcmcia_device = {
507 .name = "zeus-pcmcia",
510 .platform_data = &zeus_pcmcia_info,
514 static struct resource zeus_max6369_resource = {
515 .start = ZEUS_CPLD_EXTWDOG_PHYS,
516 .end = ZEUS_CPLD_EXTWDOG_PHYS,
517 .flags = IORESOURCE_MEM,
520 struct platform_device zeus_max6369_device = {
521 .name = "max6369_wdt",
523 .resource = &zeus_max6369_resource,
528 static pxa2xx_audio_ops_t zeus_ac97_info = {
537 static struct regulator_consumer_supply zeus_ohci_regulator_supplies[] = {
538 REGULATOR_SUPPLY("vbus2", "pxa27x-ohci"),
541 static struct regulator_init_data zeus_ohci_regulator_data = {
543 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
545 .num_consumer_supplies = ARRAY_SIZE(zeus_ohci_regulator_supplies),
546 .consumer_supplies = zeus_ohci_regulator_supplies,
549 static struct fixed_voltage_config zeus_ohci_regulator_config = {
550 .supply_name = "vbus2",
551 .microvolts = 5000000, /* 5.0V */
553 .init_data = &zeus_ohci_regulator_data,
556 static struct platform_device zeus_ohci_regulator_device = {
557 .name = "reg-fixed-voltage",
560 .platform_data = &zeus_ohci_regulator_config,
564 static struct gpiod_lookup_table zeus_ohci_regulator_gpiod_table = {
565 .dev_id = "reg-fixed-voltage.0",
567 GPIO_LOOKUP("gpio-pxa", ZEUS_USB2_PWREN_GPIO,
568 NULL, GPIO_ACTIVE_HIGH),
573 static struct pxaohci_platform_data zeus_ohci_platform_data = {
574 .port_mode = PMM_NPS_MODE,
575 /* Clear Power Control Polarity Low and set Power Sense
576 * Polarity Low. Supply power to USB ports. */
577 .flags = ENABLE_PORT_ALL | POWER_SENSE_LOW,
580 static void __init zeus_register_ohci(void)
582 /* Port 2 is shared between host and client interface. */
583 UP2OCR = UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;
585 pxa_set_ohci_info(&zeus_ohci_platform_data);
592 static void zeus_lcd_power(int on, struct fb_var_screeninfo *si)
594 gpio_set_value(ZEUS_LCD_EN_GPIO, on);
597 static void zeus_backlight_power(int on)
599 gpio_set_value(ZEUS_BKLEN_GPIO, on);
602 static int zeus_setup_fb_gpios(void)
606 if ((err = gpio_request(ZEUS_LCD_EN_GPIO, "LCD_EN")))
609 if ((err = gpio_direction_output(ZEUS_LCD_EN_GPIO, 0)))
612 if ((err = gpio_request(ZEUS_BKLEN_GPIO, "BKLEN")))
615 if ((err = gpio_direction_output(ZEUS_BKLEN_GPIO, 0)))
621 gpio_free(ZEUS_BKLEN_GPIO);
623 gpio_free(ZEUS_LCD_EN_GPIO);
628 static struct pxafb_mode_info zeus_fb_mode_info[] = {
649 static struct pxafb_mach_info zeus_fb_info = {
650 .modes = zeus_fb_mode_info,
652 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
653 .pxafb_lcd_power = zeus_lcd_power,
654 .pxafb_backlight_power = zeus_backlight_power,
660 * The card detect interrupt isn't debounced so we delay it by 250ms
661 * to give the card a chance to fully insert/eject.
664 static struct pxamci_platform_data zeus_mci_platform_data = {
665 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
666 .detect_delay_ms = 250,
667 .gpio_card_ro_invert = 1,
670 static struct gpiod_lookup_table zeus_mci_gpio_table = {
671 .dev_id = "pxa2xx-mci.0",
673 GPIO_LOOKUP("gpio-pxa", ZEUS_MMC_CD_GPIO,
674 "cd", GPIO_ACTIVE_LOW),
675 GPIO_LOOKUP("gpio-pxa", ZEUS_MMC_WP_GPIO,
676 "wp", GPIO_ACTIVE_HIGH),
682 * USB Device Controller
684 static void zeus_udc_command(int cmd)
687 case PXA2XX_UDC_CMD_DISCONNECT:
688 pr_info("zeus: disconnecting USB client\n");
689 UP2OCR = UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;
692 case PXA2XX_UDC_CMD_CONNECT:
693 pr_info("zeus: connecting USB client\n");
694 UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE;
699 static struct pxa2xx_udc_mach_info zeus_udc_info = {
700 .udc_command = zeus_udc_command,
703 static struct platform_device *zeus_devices[] __initdata = {
705 &zeus_mtd_devices[0],
711 &zeus_max6369_device,
712 &can_regulator_device,
713 &zeus_ohci_regulator_device,
717 static void zeus_power_off(void)
720 cpu_suspend(PWRMODE_DEEPSLEEP, pxa27x_finish_suspend);
723 #define zeus_power_off NULL
726 #ifdef CONFIG_APM_EMULATION
727 static void zeus_get_power_status(struct apm_power_info *info)
729 /* Power supply is always present */
730 info->ac_line_status = APM_AC_ONLINE;
731 info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT;
732 info->battery_flag = APM_BATTERY_FLAG_NOT_PRESENT;
735 static inline void zeus_setup_apm(void)
737 apm_get_power_status = zeus_get_power_status;
740 static inline void zeus_setup_apm(void)
745 static int zeus_get_pcb_info(struct i2c_client *client, unsigned gpio,
746 unsigned ngpio, void *context)
751 for (i = 0; i < 8; i++) {
752 int pcb_bit = gpio + i + 8;
754 if (gpio_request(pcb_bit, "pcb info")) {
755 dev_err(&client->dev, "Can't request pcb info %d\n", i);
759 if (gpio_direction_input(pcb_bit)) {
760 dev_err(&client->dev, "Can't read pcb info %d\n", i);
765 pcb_info |= !!gpio_get_value(pcb_bit) << i;
770 dev_info(&client->dev, "Zeus PCB version %d issue %d\n",
771 pcb_info >> 4, pcb_info & 0xf);
776 static struct pca953x_platform_data zeus_pca953x_pdata[] = {
777 [0] = { .gpio_base = ZEUS_EXT0_GPIO_BASE, },
779 .gpio_base = ZEUS_EXT1_GPIO_BASE,
780 .setup = zeus_get_pcb_info,
782 [2] = { .gpio_base = ZEUS_USER_GPIO_BASE, },
785 static struct i2c_board_info __initdata zeus_i2c_devices[] = {
787 I2C_BOARD_INFO("pca9535", 0x21),
788 .platform_data = &zeus_pca953x_pdata[0],
791 I2C_BOARD_INFO("pca9535", 0x22),
792 .platform_data = &zeus_pca953x_pdata[1],
795 I2C_BOARD_INFO("pca9535", 0x20),
796 .platform_data = &zeus_pca953x_pdata[2],
797 .irq = PXA_GPIO_TO_IRQ(ZEUS_EXTGPIO_GPIO),
799 { I2C_BOARD_INFO("lm75a", 0x48) },
800 { I2C_BOARD_INFO("24c01", 0x50) },
801 { I2C_BOARD_INFO("isl1208", 0x6f) },
804 static mfp_cfg_t zeus_pin_config[] __initdata = {
807 GPIO29_AC97_SDATA_IN_0,
808 GPIO30_AC97_SDATA_OUT,
851 GPIO36_GPIO, /* CF CD */
852 GPIO97_GPIO, /* CF PWREN */
853 GPIO99_GPIO, /* CF RDY */
857 * DM9k MSCx settings: SRAM, 16 bits
858 * 17 cycles delay first access
859 * 5 cycles delay next access
860 * 13 cycles recovery time
863 #define DM9K_MSC_VALUE 0xe4c9
865 static void __init zeus_init(void)
867 u16 dm9000_msc = DM9K_MSC_VALUE;
870 system_rev = __raw_readw(ZEUS_CPLD_VERSION);
871 pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f));
873 /* Fix timings for dm9000s (CS1/CS2)*/
874 msc0 = (__raw_readl(MSC0) & 0x0000ffff) | (dm9000_msc << 16);
875 msc1 = (__raw_readl(MSC1) & 0xffff0000) | dm9000_msc;
876 __raw_writel(msc0, MSC0);
877 __raw_writel(msc1, MSC1);
879 pm_power_off = zeus_power_off;
882 pxa2xx_mfp_config(ARRAY_AND_SIZE(zeus_pin_config));
884 gpiod_add_lookup_table(&can_regulator_gpiod_table);
885 gpiod_add_lookup_table(&zeus_ohci_regulator_gpiod_table);
886 platform_add_devices(zeus_devices, ARRAY_SIZE(zeus_devices));
888 zeus_register_ohci();
890 if (zeus_setup_fb_gpios())
891 pr_err("Failed to setup fb gpios\n");
893 pxa_set_fb_info(NULL, &zeus_fb_info);
895 gpiod_add_lookup_table(&zeus_mci_gpio_table);
896 pxa_set_mci_info(&zeus_mci_platform_data);
897 pxa_set_udc_info(&zeus_udc_info);
898 pxa_set_ac97_info(&zeus_ac97_info);
899 pxa_set_i2c_info(NULL);
900 i2c_register_board_info(0, ARRAY_AND_SIZE(zeus_i2c_devices));
901 pxa2xx_set_spi_info(3, &pxa2xx_spi_ssp3_master_info);
902 spi_register_board_info(zeus_spi_board_info, ARRAY_SIZE(zeus_spi_board_info));
904 regulator_has_full_constraints();
907 static struct map_desc zeus_io_desc[] __initdata = {
909 .virtual = (unsigned long)ZEUS_CPLD_VERSION,
910 .pfn = __phys_to_pfn(ZEUS_CPLD_VERSION_PHYS),
915 .virtual = (unsigned long)ZEUS_CPLD_ISA_IRQ,
916 .pfn = __phys_to_pfn(ZEUS_CPLD_ISA_IRQ_PHYS),
921 .virtual = (unsigned long)ZEUS_CPLD_CONTROL,
922 .pfn = __phys_to_pfn(ZEUS_CPLD_CONTROL_PHYS),
927 .virtual = (unsigned long)ZEUS_PC104IO,
928 .pfn = __phys_to_pfn(ZEUS_PC104IO_PHYS),
929 .length = 0x00800000,
934 static void __init zeus_map_io(void)
938 iotable_init(zeus_io_desc, ARRAY_SIZE(zeus_io_desc));
940 /* Clear PSPR to ensure a full restart on wake-up. */
943 /* enable internal 32.768Khz oscillator (ignore OSCC_OOK) */
944 writel(readl(OSCC) | OSCC_OON, OSCC);
946 /* Some clock cycles later (from OSCC_ON), programme PCFR (OPDE...).
947 * float chip selects and PCMCIA */
948 PCFR = PCFR_OPDE | PCFR_DC_EN | PCFR_FS | PCFR_FP;
951 MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS")
952 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
953 .atag_offset = 0x100,
954 .map_io = zeus_map_io,
955 .nr_irqs = ZEUS_NR_IRQS,
956 .init_irq = zeus_init_irq,
957 .handle_irq = pxa27x_handle_irq,
958 .init_time = pxa_timer_init,
959 .init_machine = zeus_init,
960 .restart = pxa_restart,