1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "TI OMAP/AM/DM/DRA Family"
3 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
7 depends on ARCH_MULTI_V6
10 select SOC_HAS_OMAP2_SDRC
14 depends on ARCH_MULTI_V7
16 select ARM_CPU_SUSPEND if PM
17 select OMAP_INTERCONNECT
20 select SOC_HAS_OMAP2_SDRC
21 select ARM_ERRATA_430973
25 depends on ARCH_MULTI_V7
27 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
28 select ARM_CPU_SUSPEND if PM
29 select ARM_ERRATA_720789
31 select HAVE_ARM_SCU if SMP
32 select HAVE_ARM_TWD if SMP
33 select OMAP_INTERCONNECT
34 select OMAP_INTERCONNECT_BARRIER
35 select PL310_ERRATA_588369 if CACHE_L2X0
36 select PL310_ERRATA_727915 if CACHE_L2X0
39 select ARM_ERRATA_754322
40 select ARM_ERRATA_775420
41 select OMAP_INTERCONNECT
45 depends on ARCH_MULTI_V7
47 select ARM_CPU_SUSPEND if PM
49 select HAVE_ARM_SCU if SMP
50 select HAVE_ARM_ARCH_TIMER
51 select ARM_ERRATA_798181 if SMP
52 select OMAP_INTERCONNECT
53 select OMAP_INTERCONNECT_BARRIER
55 select ZONE_DMA if ARM_LPAE
59 depends on ARCH_MULTI_V7
61 select ARM_CPU_SUSPEND if PM
65 depends on ARCH_MULTI_V7
68 select MACH_OMAP_GENERIC
70 select GENERIC_CLOCKEVENTS_BROADCAST
72 select ARM_ERRATA_754322
73 select ARM_ERRATA_775420
74 select OMAP_INTERCONNECT
75 select ARM_CPU_SUSPEND if PM
79 depends on ARCH_MULTI_V7
81 select ARM_CPU_SUSPEND if PM
83 select HAVE_ARM_SCU if SMP
84 select HAVE_ARM_ARCH_TIMER
86 select ARM_ERRATA_798181 if SMP
87 select OMAP_INTERCONNECT
88 select OMAP_INTERCONNECT_BARRIER
90 select ZONE_DMA if ARM_LPAE
91 select PINCTRL_TI_IODELAY if OF && PINCTRL
95 select ARCH_HAS_BANDGAP
96 select ARCH_HAS_HOLES_MEMORYMODEL
97 select ARCH_HAS_RESET_CONTROLLER
100 select GENERIC_IRQ_CHIP
102 select MACH_OMAP_GENERIC
108 select RESET_CONTROLLER
114 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
116 config OMAP_INTERCONNECT_BARRIER
123 menu "TI OMAP2/3/4 Specific Features"
125 config ARCH_OMAP2PLUS_TYPICAL
126 bool "Typical OMAP configuration"
132 select MENELAUS if ARCH_OMAP2
133 select NEON if CPU_V7
136 select REGULATOR_FIXED_VOLTAGE
137 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
138 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
141 Compile a kernel suitable for booting most boards
143 config SOC_HAS_OMAP2_SDRC
144 bool "OMAP2 SDRAM Controller support"
146 config SOC_HAS_REALTIME_COUNTER
147 bool "Real time free running counter"
148 depends on SOC_OMAP5 || SOC_DRA7XX
151 comment "OMAP Core Type"
152 depends on ARCH_OMAP2
155 bool "OMAP2420 support"
156 depends on ARCH_OMAP2
159 select SOC_HAS_OMAP2_SDRC
162 bool "OMAP2430 support"
163 depends on ARCH_OMAP2
165 select SOC_HAS_OMAP2_SDRC
168 bool "OMAP3430 support"
169 depends on ARCH_OMAP3
171 select SOC_HAS_OMAP2_SDRC
174 bool "TI81XX support"
175 depends on ARCH_OMAP3
178 config OMAP_PACKAGE_CBC
181 config OMAP_PACKAGE_CBB
184 config OMAP_PACKAGE_CUS
187 config OMAP_PACKAGE_CBP
190 comment "OMAP Legacy Platform Data Board Type"
191 depends on ARCH_OMAP2PLUS
193 config MACH_OMAP_GENERIC
196 config MACH_OMAP2_TUSB6010
198 depends on ARCH_OMAP2 && SOC_OMAP2420
199 default y if MACH_NOKIA_N8X0
201 config MACH_OMAP3517EVM
202 bool "OMAP3517/ AM3517 EVM board"
203 depends on ARCH_OMAP3
206 config MACH_OMAP3_PANDORA
208 depends on ARCH_OMAP3
210 select OMAP_PACKAGE_CBB
212 config MACH_NOKIA_N810
215 config MACH_NOKIA_N810_WIMAX
218 config MACH_NOKIA_N8X0
219 bool "Nokia N800/N810"
220 depends on SOC_OMAP2420
222 select MACH_NOKIA_N810
223 select MACH_NOKIA_N810_WIMAX
225 config OMAP3_SDRC_AC_TIMING
226 bool "Enable SDRC AC timing register changes"
227 depends on ARCH_OMAP3
229 If you know that none of your system initiators will attempt to
230 access SDRAM during CORE DVFS, select Y here. This should boost
231 SDRAM performance at lower CORE OPPs. There are relatively few
232 users who will wish to say yes at this point - almost everyone will
233 wish to say no. Selecting yes without understanding what is
234 going on could result in system crashes;
240 config OMAP5_ERRATA_801819
241 bool "Errata 801819: An eviction from L1 data cache might stall indefinitely"
242 depends on SOC_OMAP5 || SOC_DRA7XX
244 A livelock can occur in the L2 cache arbitration that might prevent
245 a snoop from completing. Under certain conditions this can cause the