1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "TI OMAP/AM/DM/DRA Family"
3 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
10 depends on ARCH_MULTI_V6
14 select SOC_HAS_OMAP2_SDRC
18 depends on ARCH_MULTI_V7
20 select ARM_CPU_SUSPEND
22 select OMAP_INTERCONNECT
24 select SOC_HAS_OMAP2_SDRC
25 select ARM_ERRATA_430973
29 depends on ARCH_MULTI_V7
31 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
32 select ARM_CPU_SUSPEND
33 select ARM_ERRATA_720789
35 select HAVE_ARM_SCU if SMP
36 select HAVE_ARM_TWD if SMP
37 select OMAP_INTERCONNECT
38 select OMAP_INTERCONNECT_BARRIER
39 select PL310_ERRATA_588369 if CACHE_L2X0
40 select PL310_ERRATA_727915 if CACHE_L2X0
43 select ARM_ERRATA_754322
44 select ARM_ERRATA_775420
45 select OMAP_INTERCONNECT
49 depends on ARCH_MULTI_V7
51 select ARM_CPU_SUSPEND
53 select HAVE_ARM_SCU if SMP
54 select HAVE_ARM_ARCH_TIMER
55 select ARM_ERRATA_798181 if SMP
57 select OMAP_INTERCONNECT
58 select OMAP_INTERCONNECT_BARRIER
60 select ZONE_DMA if ARM_LPAE
64 depends on ARCH_MULTI_V7
66 select ARM_CPU_SUSPEND
70 depends on ARCH_MULTI_V7
73 select MACH_OMAP_GENERIC
75 select GENERIC_CLOCKEVENTS_BROADCAST
77 select ARM_ERRATA_754322
78 select ARM_ERRATA_775420
79 select OMAP_INTERCONNECT
80 select ARM_CPU_SUSPEND
84 depends on ARCH_MULTI_V7
86 select ARM_CPU_SUSPEND
88 select HAVE_ARM_SCU if SMP
89 select HAVE_ARM_ARCH_TIMER
91 select ARM_ERRATA_798181 if SMP
93 select OMAP_INTERCONNECT
94 select OMAP_INTERCONNECT_BARRIER
96 select ZONE_DMA if ARM_LPAE
97 select PINCTRL_TI_IODELAY if OF && PINCTRL
101 select ARCH_HAS_BANDGAP
102 select ARCH_HAS_RESET_CONTROLLER
105 select GENERIC_IRQ_CHIP
107 select MACH_OMAP_GENERIC
114 select PM_GENERIC_DOMAINS
115 select PM_GENERIC_DOMAINS_OF
116 select RESET_CONTROLLER
123 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
125 config OMAP_INTERCONNECT_BARRIER
132 menu "TI OMAP2/3/4 Specific Features"
134 config ARCH_OMAP2PLUS_TYPICAL
135 bool "Typical OMAP configuration"
141 select MENELAUS if ARCH_OMAP2
142 select NEON if CPU_V7
144 select REGULATOR_FIXED_VOLTAGE
145 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
146 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
149 Compile a kernel suitable for booting most boards
151 config SOC_HAS_OMAP2_SDRC
152 bool "OMAP2 SDRAM Controller support"
154 config SOC_HAS_REALTIME_COUNTER
155 bool "Real time free running counter"
156 depends on SOC_OMAP5 || SOC_DRA7XX
159 comment "OMAP Core Type"
160 depends on ARCH_OMAP2
163 bool "OMAP2420 support"
164 depends on ARCH_OMAP2
167 select SOC_HAS_OMAP2_SDRC
170 bool "OMAP2430 support"
171 depends on ARCH_OMAP2
173 select SOC_HAS_OMAP2_SDRC
176 bool "OMAP3430 support"
177 depends on ARCH_OMAP3
179 select SOC_HAS_OMAP2_SDRC
182 bool "TI81XX support"
183 depends on ARCH_OMAP3
186 config OMAP_PACKAGE_CBC
189 config OMAP_PACKAGE_CBB
192 config OMAP_PACKAGE_CUS
195 config OMAP_PACKAGE_CBP
198 comment "OMAP Legacy Platform Data Board Type"
199 depends on ARCH_OMAP2PLUS
201 config MACH_OMAP_GENERIC
204 config MACH_OMAP2_TUSB6010
206 depends on ARCH_OMAP2 && SOC_OMAP2420
207 default y if MACH_NOKIA_N8X0
209 config MACH_OMAP3517EVM
210 bool "OMAP3517/ AM3517 EVM board"
211 depends on ARCH_OMAP3
214 config MACH_OMAP3_PANDORA
216 depends on ARCH_OMAP3
218 select OMAP_PACKAGE_CBB
220 config MACH_NOKIA_N810
223 config MACH_NOKIA_N810_WIMAX
226 config MACH_NOKIA_N8X0
227 bool "Nokia N800/N810"
228 depends on SOC_OMAP2420
230 select MACH_NOKIA_N810
231 select MACH_NOKIA_N810_WIMAX
233 config OMAP3_SDRC_AC_TIMING
234 bool "Enable SDRC AC timing register changes"
235 depends on ARCH_OMAP3
237 If you know that none of your system initiators will attempt to
238 access SDRAM during CORE DVFS, select Y here. This should boost
239 SDRAM performance at lower CORE OPPs. There are relatively few
240 users who will wish to say yes at this point - almost everyone will
241 wish to say no. Selecting yes without understanding what is
242 going on could result in system crashes;
248 config OMAP5_ERRATA_801819
249 bool "Errata 801819: An eviction from L1 data cache might stall indefinitely"
250 depends on SOC_OMAP5 || SOC_DRA7XX
252 A livelock can occur in the L2 cache arbitration that might prevent
253 a snoop from completing. Under certain conditions this can cause the