Merge branch 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-microblaze.git] / arch / arm / mach-mmp / gplugd.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  linux/arch/arm/mach-mmp/gplugd.c
4  *
5  *  Support for the Marvell PXA168-based GuruPlug Display (gplugD) Platform.
6  */
7
8 #include <linux/init.h>
9 #include <linux/platform_device.h>
10 #include <linux/gpio.h>
11 #include <linux/gpio-pxa.h>
12
13 #include <asm/mach/arch.h>
14 #include <asm/mach-types.h>
15
16 #include "irqs.h"
17 #include "pxa168.h"
18 #include "mfp-pxa168.h"
19
20 #include "common.h"
21
22 static unsigned long gplugd_pin_config[] __initdata = {
23         /* UART3 */
24         GPIO8_UART3_TXD,
25         GPIO9_UART3_RXD,
26         GPIO1O_UART3_CTS,
27         GPIO11_UART3_RTS,
28
29         /* USB OTG PEN */
30         GPIO18_GPIO,
31
32         /* MMC2 */
33         GPIO28_MMC2_CMD,
34         GPIO29_MMC2_CLK,
35         GPIO30_MMC2_DAT0,
36         GPIO31_MMC2_DAT1,
37         GPIO32_MMC2_DAT2,
38         GPIO33_MMC2_DAT3,
39
40         /* LCD & HDMI clock selection GPIO: 0: 74.176MHz, 1: 74.25 MHz */
41         GPIO35_GPIO,
42         GPIO36_GPIO, /* CEC Interrupt */
43
44         /* MMC1 */
45         GPIO43_MMC1_CLK,
46         GPIO49_MMC1_CMD,
47         GPIO41_MMC1_DAT0,
48         GPIO40_MMC1_DAT1,
49         GPIO52_MMC1_DAT2,
50         GPIO51_MMC1_DAT3,
51         GPIO53_MMC1_CD,
52
53         /* LCD */
54         GPIO56_LCD_FCLK_RD,
55         GPIO57_LCD_LCLK_A0,
56         GPIO58_LCD_PCLK_WR,
57         GPIO59_LCD_DENA_BIAS,
58         GPIO60_LCD_DD0,
59         GPIO61_LCD_DD1,
60         GPIO62_LCD_DD2,
61         GPIO63_LCD_DD3,
62         GPIO64_LCD_DD4,
63         GPIO65_LCD_DD5,
64         GPIO66_LCD_DD6,
65         GPIO67_LCD_DD7,
66         GPIO68_LCD_DD8,
67         GPIO69_LCD_DD9,
68         GPIO70_LCD_DD10,
69         GPIO71_LCD_DD11,
70         GPIO72_LCD_DD12,
71         GPIO73_LCD_DD13,
72         GPIO74_LCD_DD14,
73         GPIO75_LCD_DD15,
74         GPIO76_LCD_DD16,
75         GPIO77_LCD_DD17,
76         GPIO78_LCD_DD18,
77         GPIO79_LCD_DD19,
78         GPIO80_LCD_DD20,
79         GPIO81_LCD_DD21,
80         GPIO82_LCD_DD22,
81         GPIO83_LCD_DD23,
82
83         /* GPIO */
84         GPIO84_GPIO,
85         GPIO85_GPIO,
86
87         /* Fast-Ethernet*/
88         GPIO86_TX_CLK,
89         GPIO87_TX_EN,
90         GPIO88_TX_DQ3,
91         GPIO89_TX_DQ2,
92         GPIO90_TX_DQ1,
93         GPIO91_TX_DQ0,
94         GPIO92_MII_CRS,
95         GPIO93_MII_COL,
96         GPIO94_RX_CLK,
97         GPIO95_RX_ER,
98         GPIO96_RX_DQ3,
99         GPIO97_RX_DQ2,
100         GPIO98_RX_DQ1,
101         GPIO99_RX_DQ0,
102         GPIO100_MII_MDC,
103         GPIO101_MII_MDIO,
104         GPIO103_RX_DV,
105         GPIO104_GPIO,     /* Reset PHY */
106
107         /* RTC interrupt */
108         GPIO102_GPIO,
109
110         /* I2C */
111         GPIO105_CI2C_SDA,
112         GPIO106_CI2C_SCL,
113
114         /* SPI NOR Flash on SSP2 */
115         GPIO107_SSP2_RXD,
116         GPIO108_SSP2_TXD,
117         GPIO110_GPIO,     /* SPI_CSn */
118         GPIO111_SSP2_CLK,
119
120         /* Select JTAG */
121         GPIO109_GPIO,
122
123         /* I2S */
124         GPIO114_I2S_FRM,
125         GPIO115_I2S_BCLK,
126         GPIO116_I2S_TXD
127 };
128
129 static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
130         .irq_base       = MMP_GPIO_TO_IRQ(0),
131 };
132
133 static struct i2c_board_info gplugd_i2c_board_info[] = {
134         {
135                 .type = "isl1208",
136                 .addr = 0x6F,
137         }
138 };
139
140 /* Bring PHY out of reset by setting GPIO 104 */
141 static int gplugd_eth_init(void)
142 {
143         if (unlikely(gpio_request(104, "ETH_RESET_N"))) {
144                 printk(KERN_ERR "Can't get hold of GPIO 104 to bring Ethernet "
145                                 "PHY out of reset\n");
146                 return -EIO;
147         }
148
149         gpio_direction_output(104, 1);
150         gpio_free(104);
151         return 0;
152 }
153
154 struct pxa168_eth_platform_data gplugd_eth_platform_data = {
155         .port_number = 0,
156         .phy_addr    = 0,
157         .speed       = 0, /* Autonagotiation */
158         .intf        = PHY_INTERFACE_MODE_RMII,
159         .init        = gplugd_eth_init,
160 };
161
162 static void __init select_disp_freq(void)
163 {
164         /* set GPIO 35 & clear GPIO 85 to set LCD External Clock to 74.25 MHz */
165         if (unlikely(gpio_request(35, "DISP_FREQ_SEL"))) {
166                 printk(KERN_ERR "Can't get hold of GPIO 35 to select display "
167                                 "frequency\n");
168         } else {
169                 gpio_direction_output(35, 1);
170                 gpio_free(35);
171         }
172
173         if (unlikely(gpio_request(85, "DISP_FREQ_SEL_2"))) {
174                 printk(KERN_ERR "Can't get hold of GPIO 85 to select display "
175                                 "frequency\n");
176         } else {
177                 gpio_direction_output(85, 0);
178                 gpio_free(85);
179         }
180 }
181
182 static void __init gplugd_init(void)
183 {
184         mfp_config(ARRAY_AND_SIZE(gplugd_pin_config));
185
186         select_disp_freq();
187
188         /* on-chip devices */
189         pxa168_add_uart(3);
190         pxa168_add_ssp(1);
191         pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
192         platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata,
193                                  sizeof(struct pxa_gpio_platform_data));
194         platform_device_register(&pxa168_device_gpio);
195
196         pxa168_add_eth(&gplugd_eth_platform_data);
197 }
198
199 MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
200         .map_io         = mmp_map_io,
201         .nr_irqs        = MMP_NR_IRQS,
202         .init_irq       = pxa168_init_irq,
203         .init_time      = pxa168_timer_init,
204         .init_machine   = gplugd_init,
205         .restart        = pxa168_restart,
206 MACHINE_END