arch/arm/mach-imx/mach-mx31lite.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  Copyright (C) 2000 Deep Blue Solutions Ltd
   4  *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
   5  *  Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
   6  *  Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
   7  */
   8
   9 #include <linux/types.h>
  10 #include <linux/init.h>
  11 #include <linux/kernel.h>
  12 #include <linux/memory.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/gpio.h>
  15 #include <linux/moduleparam.h>
  16 #include <linux/smsc911x.h>
  17 #include <linux/mfd/mc13783.h>
  18 #include <linux/spi/spi.h>
  19 #include <linux/usb/otg.h>
  20 #include <linux/usb/ulpi.h>
  21 #include <linux/mtd/physmap.h>
  22 #include <linux/delay.h>
  23 #include <linux/regulator/machine.h>
  24 #include <linux/regulator/fixed.h>
  25
  26 #include <asm/mach-types.h>
  27 #include <asm/mach/arch.h>
  28 #include <asm/mach/time.h>
  29 #include <asm/mach/map.h>
  30 #include <asm/page.h>
  31 #include <asm/setup.h>
  32
  33 #include "board-mx31lite.h"
  34 #include "common.h"
  35 #include "devices-imx31.h"
  36 #include "ehci.h"
  37 #include "hardware.h"
  38 #include "iomux-mx3.h"
  39 #include "ulpi.h"
  40
  41 /*
  42  * This file contains the module-specific initialization routines.
  43  */
  44
  45 static unsigned int mx31lite_pins[] = {
  46         /* UART1 */
  47         MX31_PIN_CTS1__CTS1,
  48         MX31_PIN_RTS1__RTS1,
  49         MX31_PIN_TXD1__TXD1,
  50         MX31_PIN_RXD1__RXD1,
  51         /* SPI 0 */
  52         MX31_PIN_CSPI1_SCLK__SCLK,
  53         MX31_PIN_CSPI1_MOSI__MOSI,
  54         MX31_PIN_CSPI1_MISO__MISO,
  55         MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
  56         MX31_PIN_CSPI1_SS0__SS0,
  57         MX31_PIN_CSPI1_SS1__SS1,
  58         MX31_PIN_CSPI1_SS2__SS2,
  59         /* LAN9117 IRQ pin */
  60         IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO),
  61         /* SPI 1 */
  62         MX31_PIN_CSPI2_SCLK__SCLK,
  63         MX31_PIN_CSPI2_MOSI__MOSI,
  64         MX31_PIN_CSPI2_MISO__MISO,
  65         MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
  66         MX31_PIN_CSPI2_SS0__SS0,
  67         MX31_PIN_CSPI2_SS1__SS1,
  68         MX31_PIN_CSPI2_SS2__SS2,
  69 };
  70
  71 /* UART */
  72 static const struct imxuart_platform_data uart_pdata __initconst = {
  73         .flags = IMXUART_HAVE_RTSCTS,
  74 };
  75
  76 static const struct mxc_nand_platform_data
  77 mx31lite_nand_board_info __initconst  = {
  78         .width = 1,
  79         .hw_ecc = 1,
  80 };
  81
  82 static struct smsc911x_platform_config smsc911x_config = {
  83         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  84         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
  85         .flags          = SMSC911X_USE_16BIT,
  86 };
  87
  88 static struct resource smsc911x_resources[] = {
  89         {
  90                 .start          = MX31_CS4_BASE_ADDR,
  91                 .end            = MX31_CS4_BASE_ADDR + 0x100,
  92                 .flags          = IORESOURCE_MEM,
  93         }, {
  94                 /* irq number is run-time assigned */
  95                 .flags          = IORESOURCE_IRQ,
  96         },
  97 };
  98
  99 static struct platform_device smsc911x_device = {
 100         .name           = "smsc911x",
 101         .id             = -1,
 102         .num_resources  = ARRAY_SIZE(smsc911x_resources),
 103         .resource       = smsc911x_resources,
 104         .dev            = {
 105                 .platform_data = &smsc911x_config,
 106         },
 107 };
 108
 109 static struct mc13xxx_platform_data mc13783_pdata __initdata = {
 110         .flags = MC13XXX_USE_RTC,
 111 };
 112
 113 static struct spi_board_info mc13783_spi_dev __initdata = {
 114         .modalias       = "mc13783",
 115         .max_speed_hz   = 1000000,
 116         .bus_num        = 1,
 117         .chip_select    = 0,
 118         .platform_data  = &mc13783_pdata,
 119         /* irq number is run-time assigned */
 120 };
 121
 122 /*
 123  * USB
 124  */
 125
 126 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
 127                         PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
 128
 129 static int usbh2_init(struct platform_device *pdev)
 130 {
 131         int pins[] = {
 132                 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
 133                 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
 134                 MX31_PIN_USBH2_CLK__USBH2_CLK,
 135                 MX31_PIN_USBH2_DIR__USBH2_DIR,
 136                 MX31_PIN_USBH2_NXT__USBH2_NXT,
 137                 MX31_PIN_USBH2_STP__USBH2_STP,
 138         };
 139
 140         mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
 141
 142         mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
 143         mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
 144         mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
 145         mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
 146         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
 147         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
 148         mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
 149         mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
 150         mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
 151         mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
 152         mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
 153         mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
 154
 155         mxc_iomux_set_gpr(MUX_PGP_UH2, true);
 156
 157         /* chip select */
 158         mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
 159                                 "USBH2_CS");
 160         gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
 161         gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
 162
 163         mdelay(10);
 164
 165         return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
 166 }
 167
 168 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
 169         .init   = usbh2_init,
 170         .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
 171 };
 172
 173 /*
 174  * NOR flash
 175  */
 176
 177 static struct physmap_flash_data nor_flash_data = {
 178         .width  = 2,
 179 };
 180
 181 static struct resource nor_flash_resource = {
 182         .start  = 0xa0000000,
 183         .end    = 0xa1ffffff,
 184         .flags  = IORESOURCE_MEM,
 185 };
 186
 187 static struct platform_device physmap_flash_device = {
 188         .name   = "physmap-flash",
 189         .id     = 0,
 190         .dev    = {
 191                 .platform_data  = &nor_flash_data,
 192         },
 193         .resource = &nor_flash_resource,
 194         .num_resources = 1,
 195 };
 196
 197 /*
 198  * This structure defines the MX31 memory map.
 199  */
 200 static struct map_desc mx31lite_io_desc[] __initdata = {
 201         {
 202                 .virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
 203                 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
 204                 .length = MX31_CS4_SIZE,
 205                 .type = MT_DEVICE
 206         }
 207 };
 208
 209 /*
 210  * Set up static virtual mappings.
 211  */
 212 static void __init mx31lite_map_io(void)
 213 {
 214         mx31_map_io();
 215         iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc));
 216 }
 217
 218 static int mx31lite_baseboard;
 219 core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
 220
 221 static struct regulator_consumer_supply dummy_supplies[] = {
 222         REGULATOR_SUPPLY("vdd33a", "smsc911x"),
 223         REGULATOR_SUPPLY("vddvario", "smsc911x"),
 224 };
 225
 226 static void __init mx31lite_init(void)
 227 {
 228         imx31_soc_init();
 229
 230         mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins),
 231                                       "mx31lite");
 232
 233         imx31_add_imx_uart0(&uart_pdata);
 234         imx31_add_spi_imx0(NULL);
 235
 236         /* NOR and NAND flash */
 237         platform_device_register(&physmap_flash_device);
 238         imx31_add_mxc_nand(&mx31lite_nand_board_info);
 239
 240         imx31_add_spi_imx1(NULL);
 241
 242         regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
 243 }
 244
 245 static void __init mx31lite_late(void)
 246 {
 247         int ret;
 248
 249         if (mx31lite_baseboard == MX31LITE_DB)
 250                 mx31lite_db_init();
 251
 252         mc13783_spi_dev.irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
 253         spi_register_board_info(&mc13783_spi_dev, 1);
 254
 255         /* USB */
 256         usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
 257                         ULPI_OTG_DRVVBUS_EXT);
 258         if (usbh2_pdata.otg)
 259                 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
 260
 261         /* SMSC9117 IRQ pin */
 262         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
 263         if (ret)
 264                 pr_warn("could not get LAN irq gpio\n");
 265         else {
 266                 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6));
 267                 smsc911x_resources[1].start =
 268                         gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
 269                 smsc911x_resources[1].end =
 270                         gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
 271                 platform_device_register(&smsc911x_device);
 272         }
 273 }
 274
 275 static void __init mx31lite_timer_init(void)
 276 {
 277         mx31_clocks_init(26000000);
 278 }
 279
 280 MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
 281         /* Maintainer: Freescale Semiconductor, Inc. */
 282         .atag_offset = 0x100,
 283         .map_io = mx31lite_map_io,
 284         .init_early = imx31_init_early,
 285         .init_irq = mx31_init_irq,
 286         .init_time      = mx31lite_timer_init,
 287         .init_machine = mx31lite_init,
 288         .init_late      = mx31lite_late,
 289         .restart        = mxc_restart,
 290 MACHINE_END