1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
5 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
7 #include <linux/gpio/driver.h>
8 /* Needed for gpio_to_irq() */
9 #include <linux/gpio.h>
10 #include <linux/gpio/machine.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/map.h>
14 #include <linux/mtd/partitions.h>
15 #include <linux/mtd/physmap.h>
16 #include <linux/i2c.h>
17 #include <linux/irq.h>
19 #include <linux/regulator/fixed.h>
20 #include <linux/regulator/machine.h>
22 #include <asm/mach-types.h>
23 #include <asm/mach/arch.h>
24 #include <asm/mach/time.h>
25 #include <asm/mach/map.h>
28 #include "devices-imx27.h"
30 #include "iomux-mx27.h"
33 * Base address of PBC controller, CS4
35 #define PBC_BASE_ADDRESS 0xf4300000
36 #define PBC_REG_ADDR(offset) (void __force __iomem *) \
37 (PBC_BASE_ADDRESS + (offset))
39 /* When the PBC address connection is fixed in h/w, defined as 1 */
42 /* Offsets for the PBC Controller register */
44 * PBC Board version register offset
46 #define PBC_VERSION_REG PBC_REG_ADDR(0x00000 >> PBC_ADDR_SH)
48 * PBC Board control register 1 set address.
50 #define PBC_BCTRL1_SET_REG PBC_REG_ADDR(0x00008 >> PBC_ADDR_SH)
52 * PBC Board control register 1 clear address.
54 #define PBC_BCTRL1_CLEAR_REG PBC_REG_ADDR(0x0000C >> PBC_ADDR_SH)
56 /* PBC Board Control Register 1 bit definitions */
57 #define PBC_BCTRL1_LCDON 0x0800 /* Enable the LCD */
59 /* to determine the correct external crystal reference */
60 #define CKIH_27MHZ_BIT_SET (1 << 3)
62 static const int mx27ads_pins[] __initconst = {
105 PD11_AOUT_FEC_TX_CLK,
108 PD14_AOUT_FEC_RX_CLK,
161 static const struct mxc_nand_platform_data
162 mx27ads_nand_board_info __initconst = {
167 /* ADS's NOR flash */
168 static struct physmap_flash_data mx27ads_flash_data = {
172 static struct resource mx27ads_flash_resource = {
174 .end = 0xc0000000 + 0x02000000 - 1,
175 .flags = IORESOURCE_MEM,
179 static struct platform_device mx27ads_nor_mtd_device = {
180 .name = "physmap-flash",
183 .platform_data = &mx27ads_flash_data,
186 .resource = &mx27ads_flash_resource,
189 static const struct imxi2c_platform_data mx27ads_i2c1_data __initconst = {
193 static struct i2c_board_info mx27ads_i2c_devices[] = {
196 static void vgpio_set(struct gpio_chip *chip, unsigned offset, int value)
199 imx_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_SET_REG);
201 imx_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_CLEAR_REG);
204 static int vgpio_dir_out(struct gpio_chip *chip, unsigned offset, int value)
209 #define MX27ADS_LCD_GPIO (6 * 32)
211 static struct regulator_consumer_supply mx27ads_lcd_regulator_consumer =
212 REGULATOR_SUPPLY("lcd", "imx-fb.0");
214 static struct regulator_init_data mx27ads_lcd_regulator_init_data = {
216 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
218 .consumer_supplies = &mx27ads_lcd_regulator_consumer,
219 .num_consumer_supplies = 1,
222 static struct fixed_voltage_config mx27ads_lcd_regulator_pdata = {
223 .supply_name = "LCD",
224 .microvolts = 3300000,
225 .init_data = &mx27ads_lcd_regulator_init_data,
228 static struct gpiod_lookup_table mx27ads_lcd_regulator_gpiod_table = {
229 .dev_id = "reg-fixed-voltage.0", /* Let's hope ID 0 is what we get */
231 GPIO_LOOKUP("LCD", 0, NULL, GPIO_ACTIVE_LOW),
236 static void __init mx27ads_regulator_init(void)
238 struct gpio_chip *vchip;
240 vchip = kzalloc(sizeof(*vchip), GFP_KERNEL);
241 vchip->owner = THIS_MODULE;
242 vchip->label = "LCD";
243 vchip->base = MX27ADS_LCD_GPIO;
245 vchip->direction_output = vgpio_dir_out;
246 vchip->set = vgpio_set;
247 gpiochip_add_data(vchip, NULL);
249 gpiod_add_lookup_table(&mx27ads_lcd_regulator_gpiod_table);
251 platform_device_register_data(NULL, "reg-fixed-voltage",
253 &mx27ads_lcd_regulator_pdata,
254 sizeof(mx27ads_lcd_regulator_pdata));
257 static struct imx_fb_videomode mx27ads_modes[] = {
260 .name = "Sharp-LQ035Q7",
264 .pixclock = 188679, /* in ps (5.3MHz) */
277 static const struct imx_fb_platform_data mx27ads_fb_data __initconst = {
278 .mode = mx27ads_modes,
279 .num_modes = ARRAY_SIZE(mx27ads_modes),
282 * - HSYNC active high
283 * - VSYNC active high
284 * - clk notenabled while idle
286 * - data not inverted
287 * - data enable low active
288 * - enable sharp mode
295 static int mx27ads_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
298 return request_irq(gpio_to_irq(IMX_GPIO_NR(5, 21)), detect_irq,
299 IRQF_TRIGGER_RISING, "sdhc1-card-detect", data);
302 static int mx27ads_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
305 return request_irq(gpio_to_irq(IMX_GPIO_NR(2, 7)), detect_irq,
306 IRQF_TRIGGER_RISING, "sdhc2-card-detect", data);
309 static void mx27ads_sdhc1_exit(struct device *dev, void *data)
311 free_irq(gpio_to_irq(IMX_GPIO_NR(5, 21)), data);
314 static void mx27ads_sdhc2_exit(struct device *dev, void *data)
316 free_irq(gpio_to_irq(IMX_GPIO_NR(2, 7)), data);
319 static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
320 .init = mx27ads_sdhc1_init,
321 .exit = mx27ads_sdhc1_exit,
324 static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
325 .init = mx27ads_sdhc2_init,
326 .exit = mx27ads_sdhc2_exit,
329 static struct platform_device *platform_devices[] __initdata = {
330 &mx27ads_nor_mtd_device,
333 static const struct imxuart_platform_data uart_pdata __initconst = {
334 .flags = IMXUART_HAVE_RTSCTS,
337 static void __init mx27ads_board_init(void)
341 mxc_gpio_setup_multiple_pins(mx27ads_pins, ARRAY_SIZE(mx27ads_pins),
344 imx27_add_imx_uart0(&uart_pdata);
345 imx27_add_imx_uart1(&uart_pdata);
346 imx27_add_imx_uart2(&uart_pdata);
347 imx27_add_imx_uart3(&uart_pdata);
348 imx27_add_imx_uart4(&uart_pdata);
349 imx27_add_imx_uart5(&uart_pdata);
350 imx27_add_mxc_nand(&mx27ads_nand_board_info);
352 /* only the i2c master 1 is used on this CPU card */
353 i2c_register_board_info(1, mx27ads_i2c_devices,
354 ARRAY_SIZE(mx27ads_i2c_devices));
355 imx27_add_imx_i2c(1, &mx27ads_i2c1_data);
356 imx27_add_imx_fb(&mx27ads_fb_data);
362 static void __init mx27ads_late_init(void)
364 mx27ads_regulator_init();
366 imx27_add_mxc_mmc(0, &sdhc1_pdata);
367 imx27_add_mxc_mmc(1, &sdhc2_pdata);
369 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
372 static void __init mx27ads_timer_init(void)
374 unsigned long fref = 26000000;
376 if ((imx_readw(PBC_VERSION_REG) & CKIH_27MHZ_BIT_SET) == 0)
379 mx27_clocks_init(fref);
382 static struct map_desc mx27ads_io_desc[] __initdata = {
384 .virtual = PBC_BASE_ADDRESS,
385 .pfn = __phys_to_pfn(MX27_CS4_BASE_ADDR),
391 static void __init mx27ads_map_io(void)
394 iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc));
397 MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
398 /* maintainer: Freescale Semiconductor, Inc. */
399 .atag_offset = 0x100,
400 .map_io = mx27ads_map_io,
401 .init_early = imx27_init_early,
402 .init_irq = mx27_init_irq,
403 .init_time = mx27ads_timer_init,
404 .init_machine = mx27ads_board_init,
405 .init_late = mx27ads_late_init,
406 .restart = mxc_restart,