1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
4 * Copyright 2017-2018 NXP
5 * Author: Dong Aisheng <aisheng.dong@nxp.com>
8 #include <linux/irqchip.h>
9 #include <linux/mfd/syscon.h>
10 #include <linux/of_platform.h>
11 #include <linux/regmap.h>
12 #include <asm/mach/arch.h>
18 #define SIM_JTAG_ID_REG 0x8c
20 static void __init imx7ulp_set_revision(void)
25 sim = syscon_regmap_lookup_by_compatible("fsl,imx7ulp-sim");
27 pr_warn("failed to find fsl,imx7ulp-sim regmap!\n");
31 if (regmap_read(sim, SIM_JTAG_ID_REG, &revision)) {
32 pr_warn("failed to read sim regmap!\n");
37 * bit[31:28] of JTAG_ID register defines revision as below from B0:
41 switch (revision >> 28) {
43 imx_set_soc_revision(IMX_CHIP_REVISION_2_0);
46 imx_set_soc_revision(IMX_CHIP_REVISION_2_1);
49 imx_set_soc_revision(IMX_CHIP_REVISION_1_0);
54 static void __init imx7ulp_init_machine(void)
58 mxc_set_cpu_type(MXC_CPU_IMX7ULP);
59 imx7ulp_set_revision();
60 of_platform_default_populate(NULL, NULL, NULL);
63 static const char *const imx7ulp_dt_compat[] __initconst = {
68 static void __init imx7ulp_init_late(void)
70 imx7ulp_cpuidle_init();
73 DT_MACHINE_START(IMX7ulp, "Freescale i.MX7ULP (Device Tree)")
74 .init_machine = imx7ulp_init_machine,
75 .dt_compat = imx7ulp_dt_compat,
76 .init_late = imx7ulp_init_late,