1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
4 * Copyright (C) 2010 Freescale Semiconductor, Inc.
7 #include <linux/platform_device.h>
9 #include <linux/platform_data/usb-ehci-mxc.h>
14 #define USBCTRL_OTGBASE_OFFSET 0x600
16 #define MX35_OTG_SIC_SHIFT 29
17 #define MX35_OTG_SIC_MASK (0x3 << MX35_OTG_SIC_SHIFT)
18 #define MX35_OTG_PM_BIT (1 << 24)
19 #define MX35_OTG_PP_BIT (1 << 11)
20 #define MX35_OTG_OCPOL_BIT (1 << 3)
22 #define MX35_H1_SIC_SHIFT 21
23 #define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT)
24 #define MX35_H1_PP_BIT (1 << 18)
25 #define MX35_H1_PM_BIT (1 << 16)
26 #define MX35_H1_IPPUE_UP_BIT (1 << 7)
27 #define MX35_H1_IPPUE_DOWN_BIT (1 << 6)
28 #define MX35_H1_TLL_BIT (1 << 5)
29 #define MX35_H1_USBTE_BIT (1 << 4)
30 #define MX35_H1_OCPOL_BIT (1 << 2)
32 int mx35_initialize_usb_hw(int port, unsigned int flags)
36 v = readl(MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
39 case 0: /* OTG port */
40 v &= ~(MX35_OTG_SIC_MASK | MX35_OTG_PM_BIT | MX35_OTG_PP_BIT |
42 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX35_OTG_SIC_SHIFT;
44 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
47 if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
50 if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))
51 v |= MX35_OTG_OCPOL_BIT;
55 v &= ~(MX35_H1_SIC_MASK | MX35_H1_PM_BIT | MX35_H1_PP_BIT |
56 MX35_H1_OCPOL_BIT | MX35_H1_TLL_BIT | MX35_H1_USBTE_BIT |
57 MX35_H1_IPPUE_DOWN_BIT | MX35_H1_IPPUE_UP_BIT);
58 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX35_H1_SIC_SHIFT;
60 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
63 if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
66 if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))
67 v |= MX35_H1_OCPOL_BIT;
69 if (!(flags & MXC_EHCI_TTL_ENABLED))
72 if (flags & MXC_EHCI_INTERNAL_PHY)
73 v |= MX35_H1_USBTE_BIT;
75 if (flags & MXC_EHCI_IPPUE_DOWN)
76 v |= MX35_H1_IPPUE_DOWN_BIT;
78 if (flags & MXC_EHCI_IPPUE_UP)
79 v |= MX35_H1_IPPUE_UP_BIT;
86 writel(v, MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));