irqchip: Move ARM vic.h to include/linux/irqchip/arm-vic.h
[linux-2.6-microblaze.git] / arch / arm / mach-ep93xx / core.c
1 /*
2  * arch/arm/mach-ep93xx/core.c
3  * Core routines for Cirrus EP93xx chips.
4  *
5  * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6  * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
7  *
8  * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9  * role in the ep93xx linux community.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or (at
14  * your option) any later version.
15  */
16
17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
18
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/timex.h>
25 #include <linux/irq.h>
26 #include <linux/io.h>
27 #include <linux/gpio.h>
28 #include <linux/leds.h>
29 #include <linux/termios.h>
30 #include <linux/amba/bus.h>
31 #include <linux/amba/serial.h>
32 #include <linux/mtd/physmap.h>
33 #include <linux/i2c.h>
34 #include <linux/i2c-gpio.h>
35 #include <linux/spi/spi.h>
36 #include <linux/export.h>
37 #include <linux/irqchip/arm-vic.h>
38
39 #include <mach/hardware.h>
40 #include <linux/platform_data/video-ep93xx.h>
41 #include <linux/platform_data/keypad-ep93xx.h>
42 #include <linux/platform_data/spi-ep93xx.h>
43 #include <mach/gpio-ep93xx.h>
44
45 #include <asm/mach/map.h>
46 #include <asm/mach/time.h>
47
48 #include "soc.h"
49
50 /*************************************************************************
51  * Static I/O mappings that are needed for all EP93xx platforms
52  *************************************************************************/
53 static struct map_desc ep93xx_io_desc[] __initdata = {
54         {
55                 .virtual        = EP93XX_AHB_VIRT_BASE,
56                 .pfn            = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
57                 .length         = EP93XX_AHB_SIZE,
58                 .type           = MT_DEVICE,
59         }, {
60                 .virtual        = EP93XX_APB_VIRT_BASE,
61                 .pfn            = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
62                 .length         = EP93XX_APB_SIZE,
63                 .type           = MT_DEVICE,
64         },
65 };
66
67 void __init ep93xx_map_io(void)
68 {
69         iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
70 }
71
72
73 /*************************************************************************
74  * Timer handling for EP93xx
75  *************************************************************************
76  * The ep93xx has four internal timers.  Timers 1, 2 (both 16 bit) and
77  * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
78  * an interrupt on underflow.  Timer 4 (40 bit) counts down at 983.04 kHz,
79  * is free-running, and can't generate interrupts.
80  *
81  * The 508 kHz timers are ideal for use for the timer interrupt, as the
82  * most common values of HZ divide 508 kHz nicely.  We pick one of the 16
83  * bit timers (timer 1) since we don't need more than 16 bits of reload
84  * value as long as HZ >= 8.
85  *
86  * The higher clock rate of timer 4 makes it a better choice than the
87  * other timers for use in gettimeoffset(), while the fact that it can't
88  * generate interrupts means we don't have to worry about not being able
89  * to use this timer for something else.  We also use timer 4 for keeping
90  * track of lost jiffies.
91  */
92 #define EP93XX_TIMER_REG(x)             (EP93XX_TIMER_BASE + (x))
93 #define EP93XX_TIMER1_LOAD              EP93XX_TIMER_REG(0x00)
94 #define EP93XX_TIMER1_VALUE             EP93XX_TIMER_REG(0x04)
95 #define EP93XX_TIMER1_CONTROL           EP93XX_TIMER_REG(0x08)
96 #define EP93XX_TIMER123_CONTROL_ENABLE  (1 << 7)
97 #define EP93XX_TIMER123_CONTROL_MODE    (1 << 6)
98 #define EP93XX_TIMER123_CONTROL_CLKSEL  (1 << 3)
99 #define EP93XX_TIMER1_CLEAR             EP93XX_TIMER_REG(0x0c)
100 #define EP93XX_TIMER2_LOAD              EP93XX_TIMER_REG(0x20)
101 #define EP93XX_TIMER2_VALUE             EP93XX_TIMER_REG(0x24)
102 #define EP93XX_TIMER2_CONTROL           EP93XX_TIMER_REG(0x28)
103 #define EP93XX_TIMER2_CLEAR             EP93XX_TIMER_REG(0x2c)
104 #define EP93XX_TIMER4_VALUE_LOW         EP93XX_TIMER_REG(0x60)
105 #define EP93XX_TIMER4_VALUE_HIGH        EP93XX_TIMER_REG(0x64)
106 #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
107 #define EP93XX_TIMER3_LOAD              EP93XX_TIMER_REG(0x80)
108 #define EP93XX_TIMER3_VALUE             EP93XX_TIMER_REG(0x84)
109 #define EP93XX_TIMER3_CONTROL           EP93XX_TIMER_REG(0x88)
110 #define EP93XX_TIMER3_CLEAR             EP93XX_TIMER_REG(0x8c)
111
112 #define EP93XX_TIMER123_CLOCK           508469
113 #define EP93XX_TIMER4_CLOCK             983040
114
115 #define TIMER1_RELOAD                   ((EP93XX_TIMER123_CLOCK / HZ) - 1)
116 #define TIMER4_TICKS_PER_JIFFY          DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
117
118 static unsigned int last_jiffy_time;
119
120 static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
121 {
122         /* Writing any value clears the timer interrupt */
123         __raw_writel(1, EP93XX_TIMER1_CLEAR);
124
125         /* Recover lost jiffies */
126         while ((signed long)
127                 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
128                                                 >= TIMER4_TICKS_PER_JIFFY) {
129                 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
130                 timer_tick();
131         }
132
133         return IRQ_HANDLED;
134 }
135
136 static struct irqaction ep93xx_timer_irq = {
137         .name           = "ep93xx timer",
138         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
139         .handler        = ep93xx_timer_interrupt,
140 };
141
142 static void __init ep93xx_timer_init(void)
143 {
144         u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
145                     EP93XX_TIMER123_CONTROL_CLKSEL;
146
147         /* Enable periodic HZ timer.  */
148         __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
149         __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
150         __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
151                         EP93XX_TIMER1_CONTROL);
152
153         /* Enable lost jiffy timer.  */
154         __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
155                         EP93XX_TIMER4_VALUE_HIGH);
156
157         setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
158 }
159
160 static unsigned long ep93xx_gettimeoffset(void)
161 {
162         int offset;
163
164         offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
165
166         /* Calculate (1000000 / 983040) * offset.  */
167         return offset + (53 * offset / 3072);
168 }
169
170 struct sys_timer ep93xx_timer = {
171         .init           = ep93xx_timer_init,
172         .offset         = ep93xx_gettimeoffset,
173 };
174
175
176 /*************************************************************************
177  * EP93xx IRQ handling
178  *************************************************************************/
179 void __init ep93xx_init_irq(void)
180 {
181         vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
182         vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
183 }
184
185
186 /*************************************************************************
187  * EP93xx System Controller Software Locked register handling
188  *************************************************************************/
189
190 /*
191  * syscon_swlock prevents anything else from writing to the syscon
192  * block while a software locked register is being written.
193  */
194 static DEFINE_SPINLOCK(syscon_swlock);
195
196 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
197 {
198         unsigned long flags;
199
200         spin_lock_irqsave(&syscon_swlock, flags);
201
202         __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
203         __raw_writel(val, reg);
204
205         spin_unlock_irqrestore(&syscon_swlock, flags);
206 }
207
208 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
209 {
210         unsigned long flags;
211         unsigned int val;
212
213         spin_lock_irqsave(&syscon_swlock, flags);
214
215         val = __raw_readl(EP93XX_SYSCON_DEVCFG);
216         val &= ~clear_bits;
217         val |= set_bits;
218         __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
219         __raw_writel(val, EP93XX_SYSCON_DEVCFG);
220
221         spin_unlock_irqrestore(&syscon_swlock, flags);
222 }
223
224 /**
225  * ep93xx_chip_revision() - returns the EP93xx chip revision
226  *
227  * See <mach/platform.h> for more information.
228  */
229 unsigned int ep93xx_chip_revision(void)
230 {
231         unsigned int v;
232
233         v = __raw_readl(EP93XX_SYSCON_SYSCFG);
234         v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
235         v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
236         return v;
237 }
238
239 /*************************************************************************
240  * EP93xx GPIO
241  *************************************************************************/
242 static struct resource ep93xx_gpio_resource[] = {
243         DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc),
244 };
245
246 static struct platform_device ep93xx_gpio_device = {
247         .name           = "gpio-ep93xx",
248         .id             = -1,
249         .num_resources  = ARRAY_SIZE(ep93xx_gpio_resource),
250         .resource       = ep93xx_gpio_resource,
251 };
252
253 /*************************************************************************
254  * EP93xx peripheral handling
255  *************************************************************************/
256 #define EP93XX_UART_MCR_OFFSET          (0x0100)
257
258 static void ep93xx_uart_set_mctrl(struct amba_device *dev,
259                                   void __iomem *base, unsigned int mctrl)
260 {
261         unsigned int mcr;
262
263         mcr = 0;
264         if (mctrl & TIOCM_RTS)
265                 mcr |= 2;
266         if (mctrl & TIOCM_DTR)
267                 mcr |= 1;
268
269         __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
270 }
271
272 static struct amba_pl010_data ep93xx_uart_data = {
273         .set_mctrl      = ep93xx_uart_set_mctrl,
274 };
275
276 static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
277         { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
278
279 static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
280         { IRQ_EP93XX_UART2 }, &ep93xx_uart_data);
281
282 static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
283         { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
284
285 static struct resource ep93xx_rtc_resource[] = {
286         DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c),
287 };
288
289 static struct platform_device ep93xx_rtc_device = {
290         .name           = "ep93xx-rtc",
291         .id             = -1,
292         .num_resources  = ARRAY_SIZE(ep93xx_rtc_resource),
293         .resource       = ep93xx_rtc_resource,
294 };
295
296
297 static struct resource ep93xx_ohci_resources[] = {
298         DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000),
299         DEFINE_RES_IRQ(IRQ_EP93XX_USB),
300 };
301
302
303 static struct platform_device ep93xx_ohci_device = {
304         .name           = "ep93xx-ohci",
305         .id             = -1,
306         .dev            = {
307                 .dma_mask               = &ep93xx_ohci_device.dev.coherent_dma_mask,
308                 .coherent_dma_mask      = DMA_BIT_MASK(32),
309         },
310         .num_resources  = ARRAY_SIZE(ep93xx_ohci_resources),
311         .resource       = ep93xx_ohci_resources,
312 };
313
314
315 /*************************************************************************
316  * EP93xx physmap'ed flash
317  *************************************************************************/
318 static struct physmap_flash_data ep93xx_flash_data;
319
320 static struct resource ep93xx_flash_resource = {
321         .flags          = IORESOURCE_MEM,
322 };
323
324 static struct platform_device ep93xx_flash = {
325         .name           = "physmap-flash",
326         .id             = 0,
327         .dev            = {
328                 .platform_data  = &ep93xx_flash_data,
329         },
330         .num_resources  = 1,
331         .resource       = &ep93xx_flash_resource,
332 };
333
334 /**
335  * ep93xx_register_flash() - Register the external flash device.
336  * @width:      bank width in octets
337  * @start:      resource start address
338  * @size:       resource size
339  */
340 void __init ep93xx_register_flash(unsigned int width,
341                                   resource_size_t start, resource_size_t size)
342 {
343         ep93xx_flash_data.width         = width;
344
345         ep93xx_flash_resource.start     = start;
346         ep93xx_flash_resource.end       = start + size - 1;
347
348         platform_device_register(&ep93xx_flash);
349 }
350
351
352 /*************************************************************************
353  * EP93xx ethernet peripheral handling
354  *************************************************************************/
355 static struct ep93xx_eth_data ep93xx_eth_data;
356
357 static struct resource ep93xx_eth_resource[] = {
358         DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000),
359         DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET),
360 };
361
362 static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
363
364 static struct platform_device ep93xx_eth_device = {
365         .name           = "ep93xx-eth",
366         .id             = -1,
367         .dev            = {
368                 .platform_data          = &ep93xx_eth_data,
369                 .coherent_dma_mask      = DMA_BIT_MASK(32),
370                 .dma_mask               = &ep93xx_eth_dma_mask,
371         },
372         .num_resources  = ARRAY_SIZE(ep93xx_eth_resource),
373         .resource       = ep93xx_eth_resource,
374 };
375
376 /**
377  * ep93xx_register_eth - Register the built-in ethernet platform device.
378  * @data:       platform specific ethernet configuration (__initdata)
379  * @copy_addr:  flag indicating that the MAC address should be copied
380  *              from the IndAd registers (as programmed by the bootloader)
381  */
382 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
383 {
384         if (copy_addr)
385                 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
386
387         ep93xx_eth_data = *data;
388         platform_device_register(&ep93xx_eth_device);
389 }
390
391
392 /*************************************************************************
393  * EP93xx i2c peripheral handling
394  *************************************************************************/
395 static struct i2c_gpio_platform_data ep93xx_i2c_data;
396
397 static struct platform_device ep93xx_i2c_device = {
398         .name           = "i2c-gpio",
399         .id             = 0,
400         .dev            = {
401                 .platform_data  = &ep93xx_i2c_data,
402         },
403 };
404
405 /**
406  * ep93xx_register_i2c - Register the i2c platform device.
407  * @data:       platform specific i2c-gpio configuration (__initdata)
408  * @devices:    platform specific i2c bus device information (__initdata)
409  * @num:        the number of devices on the i2c bus
410  */
411 void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
412                                 struct i2c_board_info *devices, int num)
413 {
414         /*
415          * Set the EEPROM interface pin drive type control.
416          * Defines the driver type for the EECLK and EEDAT pins as either
417          * open drain, which will require an external pull-up, or a normal
418          * CMOS driver.
419          */
420         if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
421                 pr_warning("sda != EEDAT, open drain has no effect\n");
422         if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
423                 pr_warning("scl != EECLK, open drain has no effect\n");
424
425         __raw_writel((data->sda_is_open_drain << 1) |
426                      (data->scl_is_open_drain << 0),
427                      EP93XX_GPIO_EEDRIVE);
428
429         ep93xx_i2c_data = *data;
430         i2c_register_board_info(0, devices, num);
431         platform_device_register(&ep93xx_i2c_device);
432 }
433
434 /*************************************************************************
435  * EP93xx SPI peripheral handling
436  *************************************************************************/
437 static struct ep93xx_spi_info ep93xx_spi_master_data;
438
439 static struct resource ep93xx_spi_resources[] = {
440         DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18),
441         DEFINE_RES_IRQ(IRQ_EP93XX_SSP),
442 };
443
444 static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
445
446 static struct platform_device ep93xx_spi_device = {
447         .name           = "ep93xx-spi",
448         .id             = 0,
449         .dev            = {
450                 .platform_data          = &ep93xx_spi_master_data,
451                 .coherent_dma_mask      = DMA_BIT_MASK(32),
452                 .dma_mask               = &ep93xx_spi_dma_mask,
453         },
454         .num_resources  = ARRAY_SIZE(ep93xx_spi_resources),
455         .resource       = ep93xx_spi_resources,
456 };
457
458 /**
459  * ep93xx_register_spi() - registers spi platform device
460  * @info: ep93xx board specific spi master info (__initdata)
461  * @devices: SPI devices to register (__initdata)
462  * @num: number of SPI devices to register
463  *
464  * This function registers platform device for the EP93xx SPI controller and
465  * also makes sure that SPI pins are muxed so that I2S is not using those pins.
466  */
467 void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
468                                 struct spi_board_info *devices, int num)
469 {
470         /*
471          * When SPI is used, we need to make sure that I2S is muxed off from
472          * SPI pins.
473          */
474         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
475
476         ep93xx_spi_master_data = *info;
477         spi_register_board_info(devices, num);
478         platform_device_register(&ep93xx_spi_device);
479 }
480
481 /*************************************************************************
482  * EP93xx LEDs
483  *************************************************************************/
484 static const struct gpio_led ep93xx_led_pins[] __initconst = {
485         {
486                 .name   = "platform:grled",
487                 .gpio   = EP93XX_GPIO_LINE_GRLED,
488         }, {
489                 .name   = "platform:rdled",
490                 .gpio   = EP93XX_GPIO_LINE_RDLED,
491         },
492 };
493
494 static const struct gpio_led_platform_data ep93xx_led_data __initconst = {
495         .num_leds       = ARRAY_SIZE(ep93xx_led_pins),
496         .leds           = ep93xx_led_pins,
497 };
498
499 /*************************************************************************
500  * EP93xx pwm peripheral handling
501  *************************************************************************/
502 static struct resource ep93xx_pwm0_resource[] = {
503         DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10),
504 };
505
506 static struct platform_device ep93xx_pwm0_device = {
507         .name           = "ep93xx-pwm",
508         .id             = 0,
509         .num_resources  = ARRAY_SIZE(ep93xx_pwm0_resource),
510         .resource       = ep93xx_pwm0_resource,
511 };
512
513 static struct resource ep93xx_pwm1_resource[] = {
514         DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10),
515 };
516
517 static struct platform_device ep93xx_pwm1_device = {
518         .name           = "ep93xx-pwm",
519         .id             = 1,
520         .num_resources  = ARRAY_SIZE(ep93xx_pwm1_resource),
521         .resource       = ep93xx_pwm1_resource,
522 };
523
524 void __init ep93xx_register_pwm(int pwm0, int pwm1)
525 {
526         if (pwm0)
527                 platform_device_register(&ep93xx_pwm0_device);
528
529         /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
530         if (pwm1)
531                 platform_device_register(&ep93xx_pwm1_device);
532 }
533
534 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
535 {
536         int err;
537
538         if (pdev->id == 0) {
539                 err = 0;
540         } else if (pdev->id == 1) {
541                 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
542                                    dev_name(&pdev->dev));
543                 if (err)
544                         return err;
545                 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
546                 if (err)
547                         goto fail;
548
549                 /* PWM 1 output on EGPIO[14] */
550                 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
551         } else {
552                 err = -ENODEV;
553         }
554
555         return err;
556
557 fail:
558         gpio_free(EP93XX_GPIO_LINE_EGPIO14);
559         return err;
560 }
561 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
562
563 void ep93xx_pwm_release_gpio(struct platform_device *pdev)
564 {
565         if (pdev->id == 1) {
566                 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
567                 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
568
569                 /* EGPIO[14] used for GPIO */
570                 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
571         }
572 }
573 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
574
575
576 /*************************************************************************
577  * EP93xx video peripheral handling
578  *************************************************************************/
579 static struct ep93xxfb_mach_info ep93xxfb_data;
580
581 static struct resource ep93xx_fb_resource[] = {
582         DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800),
583 };
584
585 static struct platform_device ep93xx_fb_device = {
586         .name                   = "ep93xx-fb",
587         .id                     = -1,
588         .dev                    = {
589                 .platform_data          = &ep93xxfb_data,
590                 .coherent_dma_mask      = DMA_BIT_MASK(32),
591                 .dma_mask               = &ep93xx_fb_device.dev.coherent_dma_mask,
592         },
593         .num_resources          = ARRAY_SIZE(ep93xx_fb_resource),
594         .resource               = ep93xx_fb_resource,
595 };
596
597 /* The backlight use a single register in the framebuffer's register space */
598 #define EP93XX_RASTER_REG_BRIGHTNESS 0x20
599
600 static struct resource ep93xx_bl_resources[] = {
601         DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
602                        EP93XX_RASTER_REG_BRIGHTNESS, 0x04),
603 };
604
605 static struct platform_device ep93xx_bl_device = {
606         .name           = "ep93xx-bl",
607         .id             = -1,
608         .num_resources  = ARRAY_SIZE(ep93xx_bl_resources),
609         .resource       = ep93xx_bl_resources,
610 };
611
612 /**
613  * ep93xx_register_fb - Register the framebuffer platform device.
614  * @data:       platform specific framebuffer configuration (__initdata)
615  */
616 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
617 {
618         ep93xxfb_data = *data;
619         platform_device_register(&ep93xx_fb_device);
620         platform_device_register(&ep93xx_bl_device);
621 }
622
623
624 /*************************************************************************
625  * EP93xx matrix keypad peripheral handling
626  *************************************************************************/
627 static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
628
629 static struct resource ep93xx_keypad_resource[] = {
630         DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c),
631         DEFINE_RES_IRQ(IRQ_EP93XX_KEY),
632 };
633
634 static struct platform_device ep93xx_keypad_device = {
635         .name           = "ep93xx-keypad",
636         .id             = -1,
637         .dev            = {
638                 .platform_data  = &ep93xx_keypad_data,
639         },
640         .num_resources  = ARRAY_SIZE(ep93xx_keypad_resource),
641         .resource       = ep93xx_keypad_resource,
642 };
643
644 /**
645  * ep93xx_register_keypad - Register the keypad platform device.
646  * @data:       platform specific keypad configuration (__initdata)
647  */
648 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
649 {
650         ep93xx_keypad_data = *data;
651         platform_device_register(&ep93xx_keypad_device);
652 }
653
654 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
655 {
656         int err;
657         int i;
658
659         for (i = 0; i < 8; i++) {
660                 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
661                 if (err)
662                         goto fail_gpio_c;
663                 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
664                 if (err)
665                         goto fail_gpio_d;
666         }
667
668         /* Enable the keypad controller; GPIO ports C and D used for keypad */
669         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
670                                  EP93XX_SYSCON_DEVCFG_GONK);
671
672         return 0;
673
674 fail_gpio_d:
675         gpio_free(EP93XX_GPIO_LINE_C(i));
676 fail_gpio_c:
677         for (--i; i >= 0; --i) {
678                 gpio_free(EP93XX_GPIO_LINE_C(i));
679                 gpio_free(EP93XX_GPIO_LINE_D(i));
680         }
681         return err;
682 }
683 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
684
685 void ep93xx_keypad_release_gpio(struct platform_device *pdev)
686 {
687         int i;
688
689         for (i = 0; i < 8; i++) {
690                 gpio_free(EP93XX_GPIO_LINE_C(i));
691                 gpio_free(EP93XX_GPIO_LINE_D(i));
692         }
693
694         /* Disable the keypad controller; GPIO ports C and D used for GPIO */
695         ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
696                                EP93XX_SYSCON_DEVCFG_GONK);
697 }
698 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
699
700 /*************************************************************************
701  * EP93xx I2S audio peripheral handling
702  *************************************************************************/
703 static struct resource ep93xx_i2s_resource[] = {
704         DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
705 };
706
707 static struct platform_device ep93xx_i2s_device = {
708         .name           = "ep93xx-i2s",
709         .id             = -1,
710         .num_resources  = ARRAY_SIZE(ep93xx_i2s_resource),
711         .resource       = ep93xx_i2s_resource,
712 };
713
714 static struct platform_device ep93xx_pcm_device = {
715         .name           = "ep93xx-pcm-audio",
716         .id             = -1,
717 };
718
719 void __init ep93xx_register_i2s(void)
720 {
721         platform_device_register(&ep93xx_i2s_device);
722         platform_device_register(&ep93xx_pcm_device);
723 }
724
725 #define EP93XX_SYSCON_DEVCFG_I2S_MASK   (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
726                                          EP93XX_SYSCON_DEVCFG_I2SONAC97)
727
728 #define EP93XX_I2SCLKDIV_MASK           (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
729                                          EP93XX_SYSCON_I2SCLKDIV_SPOL)
730
731 int ep93xx_i2s_acquire(void)
732 {
733         unsigned val;
734
735         ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
736                         EP93XX_SYSCON_DEVCFG_I2S_MASK);
737
738         /*
739          * This is potentially racy with the clock api for i2s_mclk, sclk and 
740          * lrclk. Since the i2s driver is the only user of those clocks we
741          * rely on it to prevent parallel use of this function and the 
742          * clock api for the i2s clocks.
743          */
744         val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
745         val &= ~EP93XX_I2SCLKDIV_MASK;
746         val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
747         ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
748
749         return 0;
750 }
751 EXPORT_SYMBOL(ep93xx_i2s_acquire);
752
753 void ep93xx_i2s_release(void)
754 {
755         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
756 }
757 EXPORT_SYMBOL(ep93xx_i2s_release);
758
759 /*************************************************************************
760  * EP93xx AC97 audio peripheral handling
761  *************************************************************************/
762 static struct resource ep93xx_ac97_resources[] = {
763         DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac),
764         DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR),
765 };
766
767 static struct platform_device ep93xx_ac97_device = {
768         .name           = "ep93xx-ac97",
769         .id             = -1,
770         .num_resources  = ARRAY_SIZE(ep93xx_ac97_resources),
771         .resource       = ep93xx_ac97_resources,
772 };
773
774 void __init ep93xx_register_ac97(void)
775 {
776         /*
777          * Make sure that the AC97 pins are not used by I2S.
778          */
779         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
780
781         platform_device_register(&ep93xx_ac97_device);
782         platform_device_register(&ep93xx_pcm_device);
783 }
784
785 /*************************************************************************
786  * EP93xx Watchdog
787  *************************************************************************/
788 static struct resource ep93xx_wdt_resources[] = {
789         DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08),
790 };
791
792 static struct platform_device ep93xx_wdt_device = {
793         .name           = "ep93xx-wdt",
794         .id             = -1,
795         .num_resources  = ARRAY_SIZE(ep93xx_wdt_resources),
796         .resource       = ep93xx_wdt_resources,
797 };
798
799 /*************************************************************************
800  * EP93xx IDE
801  *************************************************************************/
802 static struct resource ep93xx_ide_resources[] = {
803         DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38),
804         DEFINE_RES_IRQ(IRQ_EP93XX_EXT3),
805 };
806
807 static struct platform_device ep93xx_ide_device = {
808         .name           = "ep93xx-ide",
809         .id             = -1,
810         .dev            = {
811                 .dma_mask               = &ep93xx_ide_device.dev.coherent_dma_mask,
812                 .coherent_dma_mask      = DMA_BIT_MASK(32),
813         },
814         .num_resources  = ARRAY_SIZE(ep93xx_ide_resources),
815         .resource       = ep93xx_ide_resources,
816 };
817
818 void __init ep93xx_register_ide(void)
819 {
820         platform_device_register(&ep93xx_ide_device);
821 }
822
823 int ep93xx_ide_acquire_gpio(struct platform_device *pdev)
824 {
825         int err;
826         int i;
827
828         err = gpio_request(EP93XX_GPIO_LINE_EGPIO2, dev_name(&pdev->dev));
829         if (err)
830                 return err;
831         err = gpio_request(EP93XX_GPIO_LINE_EGPIO15, dev_name(&pdev->dev));
832         if (err)
833                 goto fail_egpio15;
834         for (i = 2; i < 8; i++) {
835                 err = gpio_request(EP93XX_GPIO_LINE_E(i), dev_name(&pdev->dev));
836                 if (err)
837                         goto fail_gpio_e;
838         }
839         for (i = 4; i < 8; i++) {
840                 err = gpio_request(EP93XX_GPIO_LINE_G(i), dev_name(&pdev->dev));
841                 if (err)
842                         goto fail_gpio_g;
843         }
844         for (i = 0; i < 8; i++) {
845                 err = gpio_request(EP93XX_GPIO_LINE_H(i), dev_name(&pdev->dev));
846                 if (err)
847                         goto fail_gpio_h;
848         }
849
850         /* GPIO ports E[7:2], G[7:4] and H used by IDE */
851         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
852                                  EP93XX_SYSCON_DEVCFG_GONIDE |
853                                  EP93XX_SYSCON_DEVCFG_HONIDE);
854         return 0;
855
856 fail_gpio_h:
857         for (--i; i >= 0; --i)
858                 gpio_free(EP93XX_GPIO_LINE_H(i));
859         i = 8;
860 fail_gpio_g:
861         for (--i; i >= 4; --i)
862                 gpio_free(EP93XX_GPIO_LINE_G(i));
863         i = 8;
864 fail_gpio_e:
865         for (--i; i >= 2; --i)
866                 gpio_free(EP93XX_GPIO_LINE_E(i));
867         gpio_free(EP93XX_GPIO_LINE_EGPIO15);
868 fail_egpio15:
869         gpio_free(EP93XX_GPIO_LINE_EGPIO2);
870         return err;
871 }
872 EXPORT_SYMBOL(ep93xx_ide_acquire_gpio);
873
874 void ep93xx_ide_release_gpio(struct platform_device *pdev)
875 {
876         int i;
877
878         for (i = 2; i < 8; i++)
879                 gpio_free(EP93XX_GPIO_LINE_E(i));
880         for (i = 4; i < 8; i++)
881                 gpio_free(EP93XX_GPIO_LINE_G(i));
882         for (i = 0; i < 8; i++)
883                 gpio_free(EP93XX_GPIO_LINE_H(i));
884         gpio_free(EP93XX_GPIO_LINE_EGPIO15);
885         gpio_free(EP93XX_GPIO_LINE_EGPIO2);
886
887
888         /* GPIO ports E[7:2], G[7:4] and H used by GPIO */
889         ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
890                                EP93XX_SYSCON_DEVCFG_GONIDE |
891                                EP93XX_SYSCON_DEVCFG_HONIDE);
892 }
893 EXPORT_SYMBOL(ep93xx_ide_release_gpio);
894
895 void __init ep93xx_init_devices(void)
896 {
897         /* Disallow access to MaverickCrunch initially */
898         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
899
900         /* Default all ports to GPIO */
901         ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
902                                EP93XX_SYSCON_DEVCFG_GONK |
903                                EP93XX_SYSCON_DEVCFG_EONIDE |
904                                EP93XX_SYSCON_DEVCFG_GONIDE |
905                                EP93XX_SYSCON_DEVCFG_HONIDE);
906
907         /* Get the GPIO working early, other devices need it */
908         platform_device_register(&ep93xx_gpio_device);
909
910         amba_device_register(&uart1_device, &iomem_resource);
911         amba_device_register(&uart2_device, &iomem_resource);
912         amba_device_register(&uart3_device, &iomem_resource);
913
914         platform_device_register(&ep93xx_rtc_device);
915         platform_device_register(&ep93xx_ohci_device);
916         platform_device_register(&ep93xx_wdt_device);
917
918         gpio_led_register_device(-1, &ep93xx_led_data);
919 }
920
921 void ep93xx_restart(char mode, const char *cmd)
922 {
923         /*
924          * Set then clear the SWRST bit to initiate a software reset
925          */
926         ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
927         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
928
929         while (1)
930                 ;
931 }
932
933 void __init ep93xx_init_late(void)
934 {
935         crunch_init();
936 }