2 * arch/arm/mach-ep93xx/core.c
3 * Core routines for Cirrus EP93xx chips.
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
8 * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9 * role in the ep93xx linux community.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/timex.h>
25 #include <linux/irq.h>
27 #include <linux/gpio.h>
28 #include <linux/leds.h>
29 #include <linux/termios.h>
30 #include <linux/amba/bus.h>
31 #include <linux/amba/serial.h>
32 #include <linux/mtd/physmap.h>
33 #include <linux/i2c.h>
34 #include <linux/i2c-gpio.h>
35 #include <linux/spi/spi.h>
36 #include <linux/export.h>
37 #include <linux/irqchip/arm-vic.h>
39 #include <mach/hardware.h>
40 #include <linux/platform_data/video-ep93xx.h>
41 #include <linux/platform_data/keypad-ep93xx.h>
42 #include <linux/platform_data/spi-ep93xx.h>
43 #include <mach/gpio-ep93xx.h>
45 #include <asm/mach/map.h>
46 #include <asm/mach/time.h>
50 /*************************************************************************
51 * Static I/O mappings that are needed for all EP93xx platforms
52 *************************************************************************/
53 static struct map_desc ep93xx_io_desc[] __initdata = {
55 .virtual = EP93XX_AHB_VIRT_BASE,
56 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
57 .length = EP93XX_AHB_SIZE,
60 .virtual = EP93XX_APB_VIRT_BASE,
61 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
62 .length = EP93XX_APB_SIZE,
67 void __init ep93xx_map_io(void)
69 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
73 /*************************************************************************
74 * Timer handling for EP93xx
75 *************************************************************************
76 * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
77 * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
78 * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
79 * is free-running, and can't generate interrupts.
81 * The 508 kHz timers are ideal for use for the timer interrupt, as the
82 * most common values of HZ divide 508 kHz nicely. We pick one of the 16
83 * bit timers (timer 1) since we don't need more than 16 bits of reload
84 * value as long as HZ >= 8.
86 * The higher clock rate of timer 4 makes it a better choice than the
87 * other timers for use in gettimeoffset(), while the fact that it can't
88 * generate interrupts means we don't have to worry about not being able
89 * to use this timer for something else. We also use timer 4 for keeping
90 * track of lost jiffies.
92 #define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
93 #define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
94 #define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
95 #define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
96 #define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
97 #define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
98 #define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
99 #define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
100 #define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
101 #define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
102 #define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
103 #define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
104 #define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
105 #define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
106 #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
107 #define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
108 #define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
109 #define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
110 #define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
112 #define EP93XX_TIMER123_CLOCK 508469
113 #define EP93XX_TIMER4_CLOCK 983040
115 #define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
116 #define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
118 static unsigned int last_jiffy_time;
120 static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
122 /* Writing any value clears the timer interrupt */
123 __raw_writel(1, EP93XX_TIMER1_CLEAR);
125 /* Recover lost jiffies */
127 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
128 >= TIMER4_TICKS_PER_JIFFY) {
129 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
136 static struct irqaction ep93xx_timer_irq = {
137 .name = "ep93xx timer",
138 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
139 .handler = ep93xx_timer_interrupt,
142 static void __init ep93xx_timer_init(void)
144 u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
145 EP93XX_TIMER123_CONTROL_CLKSEL;
147 /* Enable periodic HZ timer. */
148 __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
149 __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
150 __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
151 EP93XX_TIMER1_CONTROL);
153 /* Enable lost jiffy timer. */
154 __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
155 EP93XX_TIMER4_VALUE_HIGH);
157 setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
160 static unsigned long ep93xx_gettimeoffset(void)
164 offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
166 /* Calculate (1000000 / 983040) * offset. */
167 return offset + (53 * offset / 3072);
170 struct sys_timer ep93xx_timer = {
171 .init = ep93xx_timer_init,
172 .offset = ep93xx_gettimeoffset,
176 /*************************************************************************
177 * EP93xx IRQ handling
178 *************************************************************************/
179 void __init ep93xx_init_irq(void)
181 vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
182 vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
186 /*************************************************************************
187 * EP93xx System Controller Software Locked register handling
188 *************************************************************************/
191 * syscon_swlock prevents anything else from writing to the syscon
192 * block while a software locked register is being written.
194 static DEFINE_SPINLOCK(syscon_swlock);
196 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
200 spin_lock_irqsave(&syscon_swlock, flags);
202 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
203 __raw_writel(val, reg);
205 spin_unlock_irqrestore(&syscon_swlock, flags);
208 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
213 spin_lock_irqsave(&syscon_swlock, flags);
215 val = __raw_readl(EP93XX_SYSCON_DEVCFG);
218 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
219 __raw_writel(val, EP93XX_SYSCON_DEVCFG);
221 spin_unlock_irqrestore(&syscon_swlock, flags);
225 * ep93xx_chip_revision() - returns the EP93xx chip revision
227 * See <mach/platform.h> for more information.
229 unsigned int ep93xx_chip_revision(void)
233 v = __raw_readl(EP93XX_SYSCON_SYSCFG);
234 v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
235 v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
239 /*************************************************************************
241 *************************************************************************/
242 static struct resource ep93xx_gpio_resource[] = {
243 DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc),
246 static struct platform_device ep93xx_gpio_device = {
247 .name = "gpio-ep93xx",
249 .num_resources = ARRAY_SIZE(ep93xx_gpio_resource),
250 .resource = ep93xx_gpio_resource,
253 /*************************************************************************
254 * EP93xx peripheral handling
255 *************************************************************************/
256 #define EP93XX_UART_MCR_OFFSET (0x0100)
258 static void ep93xx_uart_set_mctrl(struct amba_device *dev,
259 void __iomem *base, unsigned int mctrl)
264 if (mctrl & TIOCM_RTS)
266 if (mctrl & TIOCM_DTR)
269 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
272 static struct amba_pl010_data ep93xx_uart_data = {
273 .set_mctrl = ep93xx_uart_set_mctrl,
276 static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
277 { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
279 static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
280 { IRQ_EP93XX_UART2 }, &ep93xx_uart_data);
282 static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
283 { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
285 static struct resource ep93xx_rtc_resource[] = {
286 DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c),
289 static struct platform_device ep93xx_rtc_device = {
290 .name = "ep93xx-rtc",
292 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
293 .resource = ep93xx_rtc_resource,
297 static struct resource ep93xx_ohci_resources[] = {
298 DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000),
299 DEFINE_RES_IRQ(IRQ_EP93XX_USB),
303 static struct platform_device ep93xx_ohci_device = {
304 .name = "ep93xx-ohci",
307 .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask,
308 .coherent_dma_mask = DMA_BIT_MASK(32),
310 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
311 .resource = ep93xx_ohci_resources,
315 /*************************************************************************
316 * EP93xx physmap'ed flash
317 *************************************************************************/
318 static struct physmap_flash_data ep93xx_flash_data;
320 static struct resource ep93xx_flash_resource = {
321 .flags = IORESOURCE_MEM,
324 static struct platform_device ep93xx_flash = {
325 .name = "physmap-flash",
328 .platform_data = &ep93xx_flash_data,
331 .resource = &ep93xx_flash_resource,
335 * ep93xx_register_flash() - Register the external flash device.
336 * @width: bank width in octets
337 * @start: resource start address
338 * @size: resource size
340 void __init ep93xx_register_flash(unsigned int width,
341 resource_size_t start, resource_size_t size)
343 ep93xx_flash_data.width = width;
345 ep93xx_flash_resource.start = start;
346 ep93xx_flash_resource.end = start + size - 1;
348 platform_device_register(&ep93xx_flash);
352 /*************************************************************************
353 * EP93xx ethernet peripheral handling
354 *************************************************************************/
355 static struct ep93xx_eth_data ep93xx_eth_data;
357 static struct resource ep93xx_eth_resource[] = {
358 DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000),
359 DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET),
362 static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
364 static struct platform_device ep93xx_eth_device = {
365 .name = "ep93xx-eth",
368 .platform_data = &ep93xx_eth_data,
369 .coherent_dma_mask = DMA_BIT_MASK(32),
370 .dma_mask = &ep93xx_eth_dma_mask,
372 .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
373 .resource = ep93xx_eth_resource,
377 * ep93xx_register_eth - Register the built-in ethernet platform device.
378 * @data: platform specific ethernet configuration (__initdata)
379 * @copy_addr: flag indicating that the MAC address should be copied
380 * from the IndAd registers (as programmed by the bootloader)
382 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
385 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
387 ep93xx_eth_data = *data;
388 platform_device_register(&ep93xx_eth_device);
392 /*************************************************************************
393 * EP93xx i2c peripheral handling
394 *************************************************************************/
395 static struct i2c_gpio_platform_data ep93xx_i2c_data;
397 static struct platform_device ep93xx_i2c_device = {
401 .platform_data = &ep93xx_i2c_data,
406 * ep93xx_register_i2c - Register the i2c platform device.
407 * @data: platform specific i2c-gpio configuration (__initdata)
408 * @devices: platform specific i2c bus device information (__initdata)
409 * @num: the number of devices on the i2c bus
411 void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
412 struct i2c_board_info *devices, int num)
415 * Set the EEPROM interface pin drive type control.
416 * Defines the driver type for the EECLK and EEDAT pins as either
417 * open drain, which will require an external pull-up, or a normal
420 if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
421 pr_warning("sda != EEDAT, open drain has no effect\n");
422 if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
423 pr_warning("scl != EECLK, open drain has no effect\n");
425 __raw_writel((data->sda_is_open_drain << 1) |
426 (data->scl_is_open_drain << 0),
427 EP93XX_GPIO_EEDRIVE);
429 ep93xx_i2c_data = *data;
430 i2c_register_board_info(0, devices, num);
431 platform_device_register(&ep93xx_i2c_device);
434 /*************************************************************************
435 * EP93xx SPI peripheral handling
436 *************************************************************************/
437 static struct ep93xx_spi_info ep93xx_spi_master_data;
439 static struct resource ep93xx_spi_resources[] = {
440 DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18),
441 DEFINE_RES_IRQ(IRQ_EP93XX_SSP),
444 static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
446 static struct platform_device ep93xx_spi_device = {
447 .name = "ep93xx-spi",
450 .platform_data = &ep93xx_spi_master_data,
451 .coherent_dma_mask = DMA_BIT_MASK(32),
452 .dma_mask = &ep93xx_spi_dma_mask,
454 .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
455 .resource = ep93xx_spi_resources,
459 * ep93xx_register_spi() - registers spi platform device
460 * @info: ep93xx board specific spi master info (__initdata)
461 * @devices: SPI devices to register (__initdata)
462 * @num: number of SPI devices to register
464 * This function registers platform device for the EP93xx SPI controller and
465 * also makes sure that SPI pins are muxed so that I2S is not using those pins.
467 void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
468 struct spi_board_info *devices, int num)
471 * When SPI is used, we need to make sure that I2S is muxed off from
474 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
476 ep93xx_spi_master_data = *info;
477 spi_register_board_info(devices, num);
478 platform_device_register(&ep93xx_spi_device);
481 /*************************************************************************
483 *************************************************************************/
484 static const struct gpio_led ep93xx_led_pins[] __initconst = {
486 .name = "platform:grled",
487 .gpio = EP93XX_GPIO_LINE_GRLED,
489 .name = "platform:rdled",
490 .gpio = EP93XX_GPIO_LINE_RDLED,
494 static const struct gpio_led_platform_data ep93xx_led_data __initconst = {
495 .num_leds = ARRAY_SIZE(ep93xx_led_pins),
496 .leds = ep93xx_led_pins,
499 /*************************************************************************
500 * EP93xx pwm peripheral handling
501 *************************************************************************/
502 static struct resource ep93xx_pwm0_resource[] = {
503 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10),
506 static struct platform_device ep93xx_pwm0_device = {
507 .name = "ep93xx-pwm",
509 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
510 .resource = ep93xx_pwm0_resource,
513 static struct resource ep93xx_pwm1_resource[] = {
514 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10),
517 static struct platform_device ep93xx_pwm1_device = {
518 .name = "ep93xx-pwm",
520 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
521 .resource = ep93xx_pwm1_resource,
524 void __init ep93xx_register_pwm(int pwm0, int pwm1)
527 platform_device_register(&ep93xx_pwm0_device);
529 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
531 platform_device_register(&ep93xx_pwm1_device);
534 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
540 } else if (pdev->id == 1) {
541 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
542 dev_name(&pdev->dev));
545 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
549 /* PWM 1 output on EGPIO[14] */
550 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
558 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
561 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
563 void ep93xx_pwm_release_gpio(struct platform_device *pdev)
566 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
567 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
569 /* EGPIO[14] used for GPIO */
570 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
573 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
576 /*************************************************************************
577 * EP93xx video peripheral handling
578 *************************************************************************/
579 static struct ep93xxfb_mach_info ep93xxfb_data;
581 static struct resource ep93xx_fb_resource[] = {
582 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800),
585 static struct platform_device ep93xx_fb_device = {
589 .platform_data = &ep93xxfb_data,
590 .coherent_dma_mask = DMA_BIT_MASK(32),
591 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
593 .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
594 .resource = ep93xx_fb_resource,
597 /* The backlight use a single register in the framebuffer's register space */
598 #define EP93XX_RASTER_REG_BRIGHTNESS 0x20
600 static struct resource ep93xx_bl_resources[] = {
601 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
602 EP93XX_RASTER_REG_BRIGHTNESS, 0x04),
605 static struct platform_device ep93xx_bl_device = {
608 .num_resources = ARRAY_SIZE(ep93xx_bl_resources),
609 .resource = ep93xx_bl_resources,
613 * ep93xx_register_fb - Register the framebuffer platform device.
614 * @data: platform specific framebuffer configuration (__initdata)
616 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
618 ep93xxfb_data = *data;
619 platform_device_register(&ep93xx_fb_device);
620 platform_device_register(&ep93xx_bl_device);
624 /*************************************************************************
625 * EP93xx matrix keypad peripheral handling
626 *************************************************************************/
627 static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
629 static struct resource ep93xx_keypad_resource[] = {
630 DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c),
631 DEFINE_RES_IRQ(IRQ_EP93XX_KEY),
634 static struct platform_device ep93xx_keypad_device = {
635 .name = "ep93xx-keypad",
638 .platform_data = &ep93xx_keypad_data,
640 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
641 .resource = ep93xx_keypad_resource,
645 * ep93xx_register_keypad - Register the keypad platform device.
646 * @data: platform specific keypad configuration (__initdata)
648 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
650 ep93xx_keypad_data = *data;
651 platform_device_register(&ep93xx_keypad_device);
654 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
659 for (i = 0; i < 8; i++) {
660 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
663 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
668 /* Enable the keypad controller; GPIO ports C and D used for keypad */
669 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
670 EP93XX_SYSCON_DEVCFG_GONK);
675 gpio_free(EP93XX_GPIO_LINE_C(i));
677 for (--i; i >= 0; --i) {
678 gpio_free(EP93XX_GPIO_LINE_C(i));
679 gpio_free(EP93XX_GPIO_LINE_D(i));
683 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
685 void ep93xx_keypad_release_gpio(struct platform_device *pdev)
689 for (i = 0; i < 8; i++) {
690 gpio_free(EP93XX_GPIO_LINE_C(i));
691 gpio_free(EP93XX_GPIO_LINE_D(i));
694 /* Disable the keypad controller; GPIO ports C and D used for GPIO */
695 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
696 EP93XX_SYSCON_DEVCFG_GONK);
698 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
700 /*************************************************************************
701 * EP93xx I2S audio peripheral handling
702 *************************************************************************/
703 static struct resource ep93xx_i2s_resource[] = {
704 DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
707 static struct platform_device ep93xx_i2s_device = {
708 .name = "ep93xx-i2s",
710 .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
711 .resource = ep93xx_i2s_resource,
714 static struct platform_device ep93xx_pcm_device = {
715 .name = "ep93xx-pcm-audio",
719 void __init ep93xx_register_i2s(void)
721 platform_device_register(&ep93xx_i2s_device);
722 platform_device_register(&ep93xx_pcm_device);
725 #define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
726 EP93XX_SYSCON_DEVCFG_I2SONAC97)
728 #define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
729 EP93XX_SYSCON_I2SCLKDIV_SPOL)
731 int ep93xx_i2s_acquire(void)
735 ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
736 EP93XX_SYSCON_DEVCFG_I2S_MASK);
739 * This is potentially racy with the clock api for i2s_mclk, sclk and
740 * lrclk. Since the i2s driver is the only user of those clocks we
741 * rely on it to prevent parallel use of this function and the
742 * clock api for the i2s clocks.
744 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
745 val &= ~EP93XX_I2SCLKDIV_MASK;
746 val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
747 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
751 EXPORT_SYMBOL(ep93xx_i2s_acquire);
753 void ep93xx_i2s_release(void)
755 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
757 EXPORT_SYMBOL(ep93xx_i2s_release);
759 /*************************************************************************
760 * EP93xx AC97 audio peripheral handling
761 *************************************************************************/
762 static struct resource ep93xx_ac97_resources[] = {
763 DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac),
764 DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR),
767 static struct platform_device ep93xx_ac97_device = {
768 .name = "ep93xx-ac97",
770 .num_resources = ARRAY_SIZE(ep93xx_ac97_resources),
771 .resource = ep93xx_ac97_resources,
774 void __init ep93xx_register_ac97(void)
777 * Make sure that the AC97 pins are not used by I2S.
779 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
781 platform_device_register(&ep93xx_ac97_device);
782 platform_device_register(&ep93xx_pcm_device);
785 /*************************************************************************
787 *************************************************************************/
788 static struct resource ep93xx_wdt_resources[] = {
789 DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08),
792 static struct platform_device ep93xx_wdt_device = {
793 .name = "ep93xx-wdt",
795 .num_resources = ARRAY_SIZE(ep93xx_wdt_resources),
796 .resource = ep93xx_wdt_resources,
799 /*************************************************************************
801 *************************************************************************/
802 static struct resource ep93xx_ide_resources[] = {
803 DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38),
804 DEFINE_RES_IRQ(IRQ_EP93XX_EXT3),
807 static struct platform_device ep93xx_ide_device = {
808 .name = "ep93xx-ide",
811 .dma_mask = &ep93xx_ide_device.dev.coherent_dma_mask,
812 .coherent_dma_mask = DMA_BIT_MASK(32),
814 .num_resources = ARRAY_SIZE(ep93xx_ide_resources),
815 .resource = ep93xx_ide_resources,
818 void __init ep93xx_register_ide(void)
820 platform_device_register(&ep93xx_ide_device);
823 int ep93xx_ide_acquire_gpio(struct platform_device *pdev)
828 err = gpio_request(EP93XX_GPIO_LINE_EGPIO2, dev_name(&pdev->dev));
831 err = gpio_request(EP93XX_GPIO_LINE_EGPIO15, dev_name(&pdev->dev));
834 for (i = 2; i < 8; i++) {
835 err = gpio_request(EP93XX_GPIO_LINE_E(i), dev_name(&pdev->dev));
839 for (i = 4; i < 8; i++) {
840 err = gpio_request(EP93XX_GPIO_LINE_G(i), dev_name(&pdev->dev));
844 for (i = 0; i < 8; i++) {
845 err = gpio_request(EP93XX_GPIO_LINE_H(i), dev_name(&pdev->dev));
850 /* GPIO ports E[7:2], G[7:4] and H used by IDE */
851 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
852 EP93XX_SYSCON_DEVCFG_GONIDE |
853 EP93XX_SYSCON_DEVCFG_HONIDE);
857 for (--i; i >= 0; --i)
858 gpio_free(EP93XX_GPIO_LINE_H(i));
861 for (--i; i >= 4; --i)
862 gpio_free(EP93XX_GPIO_LINE_G(i));
865 for (--i; i >= 2; --i)
866 gpio_free(EP93XX_GPIO_LINE_E(i));
867 gpio_free(EP93XX_GPIO_LINE_EGPIO15);
869 gpio_free(EP93XX_GPIO_LINE_EGPIO2);
872 EXPORT_SYMBOL(ep93xx_ide_acquire_gpio);
874 void ep93xx_ide_release_gpio(struct platform_device *pdev)
878 for (i = 2; i < 8; i++)
879 gpio_free(EP93XX_GPIO_LINE_E(i));
880 for (i = 4; i < 8; i++)
881 gpio_free(EP93XX_GPIO_LINE_G(i));
882 for (i = 0; i < 8; i++)
883 gpio_free(EP93XX_GPIO_LINE_H(i));
884 gpio_free(EP93XX_GPIO_LINE_EGPIO15);
885 gpio_free(EP93XX_GPIO_LINE_EGPIO2);
888 /* GPIO ports E[7:2], G[7:4] and H used by GPIO */
889 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
890 EP93XX_SYSCON_DEVCFG_GONIDE |
891 EP93XX_SYSCON_DEVCFG_HONIDE);
893 EXPORT_SYMBOL(ep93xx_ide_release_gpio);
895 void __init ep93xx_init_devices(void)
897 /* Disallow access to MaverickCrunch initially */
898 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
900 /* Default all ports to GPIO */
901 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
902 EP93XX_SYSCON_DEVCFG_GONK |
903 EP93XX_SYSCON_DEVCFG_EONIDE |
904 EP93XX_SYSCON_DEVCFG_GONIDE |
905 EP93XX_SYSCON_DEVCFG_HONIDE);
907 /* Get the GPIO working early, other devices need it */
908 platform_device_register(&ep93xx_gpio_device);
910 amba_device_register(&uart1_device, &iomem_resource);
911 amba_device_register(&uart2_device, &iomem_resource);
912 amba_device_register(&uart3_device, &iomem_resource);
914 platform_device_register(&ep93xx_rtc_device);
915 platform_device_register(&ep93xx_ohci_device);
916 platform_device_register(&ep93xx_wdt_device);
918 gpio_led_register_device(-1, &ep93xx_led_data);
921 void ep93xx_restart(char mode, const char *cmd)
924 * Set then clear the SWRST bit to initiate a software reset
926 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
927 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
933 void __init ep93xx_init_late(void)