2 * linux/arch/arm/mach-clps711x/core.c
4 * Core support for the CLPS711x-based machines.
6 * Copyright (C) 2001,2011 Deep Blue Solutions Ltd
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/kernel.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
27 #include <linux/irq.h>
28 #include <linux/sched.h>
30 #include <asm/sizes.h>
31 #include <mach/hardware.h>
34 #include <asm/pgtable.h>
36 #include <asm/mach/map.h>
37 #include <asm/mach/time.h>
38 #include <asm/system_misc.h>
41 * This maps the generic CLPS711x registers
43 static struct map_desc clps711x_io_desc[] __initdata = {
45 .virtual = (unsigned long)CLPS711X_VIRT_BASE,
46 .pfn = __phys_to_pfn(CLPS711X_PHYS_BASE),
52 void __init clps711x_map_io(void)
54 iotable_init(clps711x_io_desc, ARRAY_SIZE(clps711x_io_desc));
57 static void int1_mask(struct irq_data *d)
61 intmr1 = clps_readl(INTMR1);
62 intmr1 &= ~(1 << d->irq);
63 clps_writel(intmr1, INTMR1);
66 static void int1_ack(struct irq_data *d)
69 case IRQ_CSINT: clps_writel(0, COEOI); break;
70 case IRQ_TC1OI: clps_writel(0, TC1EOI); break;
71 case IRQ_TC2OI: clps_writel(0, TC2EOI); break;
72 case IRQ_RTCMI: clps_writel(0, RTCEOI); break;
73 case IRQ_TINT: clps_writel(0, TEOI); break;
74 case IRQ_UMSINT: clps_writel(0, UMSEOI); break;
78 static void int1_unmask(struct irq_data *d)
82 intmr1 = clps_readl(INTMR1);
83 intmr1 |= 1 << d->irq;
84 clps_writel(intmr1, INTMR1);
87 static struct irq_chip int1_chip = {
89 .irq_mask = int1_mask,
90 .irq_unmask = int1_unmask,
93 static void int2_mask(struct irq_data *d)
97 intmr2 = clps_readl(INTMR2);
98 intmr2 &= ~(1 << (d->irq - 16));
99 clps_writel(intmr2, INTMR2);
102 static void int2_ack(struct irq_data *d)
105 case IRQ_KBDINT: clps_writel(0, KBDEOI); break;
109 static void int2_unmask(struct irq_data *d)
113 intmr2 = clps_readl(INTMR2);
114 intmr2 |= 1 << (d->irq - 16);
115 clps_writel(intmr2, INTMR2);
118 static struct irq_chip int2_chip = {
120 .irq_mask = int2_mask,
121 .irq_unmask = int2_unmask,
124 void __init clps711x_init_irq(void)
128 for (i = 0; i < NR_IRQS; i++) {
129 if (INT1_IRQS & (1 << i)) {
130 irq_set_chip_and_handler(i, &int1_chip,
132 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
134 if (INT2_IRQS & (1 << i)) {
135 irq_set_chip_and_handler(i, &int2_chip,
137 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
144 clps_writel(0, INTMR1);
145 clps_writel(0, INTMR2);
148 * Clear down any pending interrupts
150 clps_writel(0, COEOI);
151 clps_writel(0, TC1EOI);
152 clps_writel(0, TC2EOI);
153 clps_writel(0, RTCEOI);
154 clps_writel(0, TEOI);
155 clps_writel(0, UMSEOI);
156 clps_writel(0, SYNCIO);
157 clps_writel(0, KBDEOI);
161 * gettimeoffset() returns time since last timer tick, in usecs.
163 * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
164 * 'tick' is usecs per jiffy.
166 static unsigned long clps711x_gettimeoffset(void)
168 unsigned long hwticks;
169 hwticks = LATCH - (clps_readl(TC2D) & 0xffff); /* since last underflow */
170 return (hwticks * (tick_nsec / 1000)) / LATCH;
174 * IRQ handler for the timer
176 static irqreturn_t p720t_timer_interrupt(int irq, void *dev_id)
182 static struct irqaction clps711x_timer_irq = {
183 .name = "CLPS711x Timer Tick",
184 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
185 .handler = p720t_timer_interrupt,
188 static void __init clps711x_timer_init(void)
192 syscon = clps_readl(SYSCON1);
193 syscon |= SYSCON1_TC2S | SYSCON1_TC2M;
194 clps_writel(syscon, SYSCON1);
196 clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */
198 setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
201 struct sys_timer clps711x_timer = {
202 .init = clps711x_timer_init,
203 .offset = clps711x_gettimeoffset,
206 void clps711x_restart(char mode, const char *cmd)
211 static void clps711x_idle(void)
213 clps_writel(1, HALT);
214 __asm__ __volatile__(
219 static int __init clps711x_idle_init(void)
221 arm_pm_idle = clps711x_idle;
225 arch_initcall(clps711x_idle_init);