1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
4 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
7 #ifndef __ARM_KVM_HOST_H__
8 #define __ARM_KVM_HOST_H__
10 #include <linux/errno.h>
11 #include <linux/types.h>
12 #include <linux/kvm_types.h>
13 #include <asm/cputype.h>
15 #include <asm/kvm_asm.h>
16 #include <asm/kvm_mmio.h>
17 #include <asm/fpstate.h>
18 #include <asm/smp_plat.h>
19 #include <kvm/arm_arch_timer.h>
21 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
23 #define KVM_USER_MEM_SLOTS 32
24 #define KVM_HAVE_ONE_REG
25 #define KVM_HALT_POLL_NS_DEFAULT 500000
27 #define KVM_VCPU_MAX_FEATURES 2
29 #include <kvm/arm_vgic.h>
32 #ifdef CONFIG_ARM_GIC_V3
33 #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
35 #define KVM_MAX_VCPUS VGIC_V2_MAX_CPUS
38 #define KVM_REQ_SLEEP \
39 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
40 #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1)
41 #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(2)
43 DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use);
45 static inline int kvm_arm_init_sve(void) { return 0; }
47 u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
48 int __attribute_const__ kvm_target_cpu(void);
49 int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
50 void kvm_reset_coprocs(struct kvm_vcpu *vcpu);
53 /* The VMID generation used for the virt. memory system */
59 /* The last vcpu id that ran on each physical CPU */
60 int __percpu *last_vcpu_ran;
63 * Anything that is not used directly from assembly code goes
67 /* The VMID generation used for the virt. memory system */
70 /* Stage-2 page table */
74 /* Interrupt controller */
75 struct vgic_dist vgic;
78 /* Mandated version of PSCI */
82 #define KVM_NR_MEM_OBJS 40
85 * We don't want allocation failures within the mmu code, so we preallocate
86 * enough memory for a single page fault in a cache.
88 struct kvm_mmu_memory_cache {
90 void *objects[KVM_NR_MEM_OBJS];
93 struct kvm_vcpu_fault_info {
94 u32 hsr; /* Hyp Syndrome Register */
95 u32 hxfar; /* Hyp Data/Inst. Fault Address Register */
96 u32 hpfar; /* Hyp IPA Fault Address Register */
100 * 0 is reserved as an invalid value.
101 * Order should be kept in sync with the save/restore code.
105 c0_MPIDR, /* MultiProcessor ID Register */
106 c0_CSSELR, /* Cache Size Selection Register */
107 c1_SCTLR, /* System Control Register */
108 c1_ACTLR, /* Auxiliary Control Register */
109 c1_CPACR, /* Coprocessor Access Control */
110 c2_TTBR0, /* Translation Table Base Register 0 */
111 c2_TTBR0_high, /* TTBR0 top 32 bits */
112 c2_TTBR1, /* Translation Table Base Register 1 */
113 c2_TTBR1_high, /* TTBR1 top 32 bits */
114 c2_TTBCR, /* Translation Table Base Control R. */
115 c3_DACR, /* Domain Access Control Register */
116 c5_DFSR, /* Data Fault Status Register */
117 c5_IFSR, /* Instruction Fault Status Register */
118 c5_ADFSR, /* Auxilary Data Fault Status R */
119 c5_AIFSR, /* Auxilary Instrunction Fault Status R */
120 c6_DFAR, /* Data Fault Address Register */
121 c6_IFAR, /* Instruction Fault Address Register */
122 c7_PAR, /* Physical Address Register */
123 c7_PAR_high, /* PAR top 32 bits */
124 c9_L2CTLR, /* Cortex A15/A7 L2 Control Register */
125 c10_PRRR, /* Primary Region Remap Register */
126 c10_NMRR, /* Normal Memory Remap Register */
127 c12_VBAR, /* Vector Base Address Register */
128 c13_CID, /* Context ID Register */
129 c13_TID_URW, /* Thread ID, User R/W */
130 c13_TID_URO, /* Thread ID, User R/O */
131 c13_TID_PRIV, /* Thread ID, Privileged */
132 c14_CNTKCTL, /* Timer Control Register (PL1) */
133 c10_AMAIR0, /* Auxilary Memory Attribute Indirection Reg0 */
134 c10_AMAIR1, /* Auxilary Memory Attribute Indirection Reg1 */
135 NR_CP15_REGS /* Number of regs (incl. invalid) */
138 struct kvm_cpu_context {
139 struct kvm_regs gp_regs;
140 struct vfp_hard_struct vfp;
141 u32 cp15[NR_CP15_REGS];
144 struct kvm_host_data {
145 struct kvm_cpu_context host_ctxt;
148 typedef struct kvm_host_data kvm_host_data_t;
150 static inline void kvm_init_host_cpu_context(struct kvm_cpu_context *cpu_ctxt,
153 /* The host's MPIDR is immutable, so let's set it up at boot time */
154 cpu_ctxt->cp15[c0_MPIDR] = cpu_logical_map(cpu);
157 struct vcpu_reset_state {
164 struct kvm_vcpu_arch {
165 struct kvm_cpu_context ctxt;
167 int target; /* Processor target */
168 DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES);
170 /* The CPU type we expose to the VM */
173 /* HYP trapping configuration */
176 /* Exception Information */
177 struct kvm_vcpu_fault_info fault;
179 /* Host FP context */
180 struct kvm_cpu_context *host_cpu_context;
183 struct vgic_cpu vgic_cpu;
184 struct arch_timer_cpu timer_cpu;
187 * Anything that is not used directly from assembly code goes
191 /* vcpu power-off state */
194 /* Don't run the guest (internal implementation need) */
197 /* IO related fields */
198 struct kvm_decode mmio_decode;
200 /* Cache some mmu pages needed inside spinlock regions */
201 struct kvm_mmu_memory_cache mmu_page_cache;
203 struct vcpu_reset_state reset_state;
205 /* Detect first run of a vcpu */
210 ulong remote_tlb_flush;
213 struct kvm_vcpu_stat {
214 u64 halt_successful_poll;
215 u64 halt_attempted_poll;
216 u64 halt_poll_invalid;
222 u64 mmio_exit_kernel;
226 #define vcpu_cp15(v,r) (v)->arch.ctxt.cp15[r]
228 int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init);
229 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
230 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
231 int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
232 int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
234 unsigned long __kvm_call_hyp(void *hypfn, ...);
237 * The has_vhe() part doesn't get emitted, but is used for type-checking.
239 #define kvm_call_hyp(f, ...) \
244 __kvm_call_hyp(kvm_ksym_ref(f), ##__VA_ARGS__); \
248 #define kvm_call_hyp_ret(f, ...) \
250 typeof(f(__VA_ARGS__)) ret; \
253 ret = f(__VA_ARGS__); \
255 ret = __kvm_call_hyp(kvm_ksym_ref(f), \
262 void force_vm_exit(const cpumask_t *mask);
263 int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu,
264 struct kvm_vcpu_events *events);
266 int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu,
267 struct kvm_vcpu_events *events);
269 #define KVM_ARCH_WANT_MMU_NOTIFIER
270 int kvm_unmap_hva_range(struct kvm *kvm,
271 unsigned long start, unsigned long end);
272 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
274 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
275 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
276 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
277 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
279 struct kvm_vcpu *kvm_arm_get_running_vcpu(void);
280 struct kvm_vcpu __percpu **kvm_get_running_vcpus(void);
281 void kvm_arm_halt_guest(struct kvm *kvm);
282 void kvm_arm_resume_guest(struct kvm *kvm);
284 int kvm_arm_copy_coproc_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
285 unsigned long kvm_arm_num_coproc_regs(struct kvm_vcpu *vcpu);
286 int kvm_arm_coproc_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
287 int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
289 int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
290 int exception_index);
292 static inline void handle_exit_early(struct kvm_vcpu *vcpu, struct kvm_run *run,
293 int exception_index) {}
295 static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr,
296 unsigned long hyp_stack_ptr,
297 unsigned long vector_ptr)
300 * Call initialization code, and switch to the full blown HYP
301 * code. The init code doesn't need to preserve these
302 * registers as r0-r3 are already callee saved according to
304 * Note that we slightly misuse the prototype by casting the
305 * stack pointer to a void *.
307 * The PGDs are always passed as the third argument, in order
308 * to be passed into r2-r3 to the init code (yes, this is
309 * compliant with the PCS!).
312 __kvm_call_hyp((void*)hyp_stack_ptr, vector_ptr, pgd_ptr);
315 static inline void __cpu_init_stage2(void)
317 kvm_call_hyp(__init_stage2_translation);
320 static inline int kvm_arch_vm_ioctl_check_extension(struct kvm *kvm, long ext)
325 int kvm_perf_init(void);
326 int kvm_perf_teardown(void);
328 void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot);
330 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
332 static inline bool kvm_arch_requires_vhe(void) { return false; }
333 static inline void kvm_arch_hardware_unsetup(void) {}
334 static inline void kvm_arch_sync_events(struct kvm *kvm) {}
335 static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {}
336 static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
337 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
339 static inline void kvm_arm_init_debug(void) {}
340 static inline void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) {}
341 static inline void kvm_arm_clear_debug(struct kvm_vcpu *vcpu) {}
342 static inline void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu) {}
344 int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
345 struct kvm_device_attr *attr);
346 int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
347 struct kvm_device_attr *attr);
348 int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
349 struct kvm_device_attr *attr);
352 * VFP/NEON switching is all done by the hyp switch code, so no need to
353 * coordinate with host context handling for this state:
355 static inline void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu) {}
356 static inline void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu) {}
357 static inline void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu) {}
359 static inline void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu) {}
360 static inline void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu) {}
362 static inline void kvm_arm_vhe_guest_enter(void) {}
363 static inline void kvm_arm_vhe_guest_exit(void) {}
365 static inline bool kvm_arm_harden_branch_predictor(void)
367 switch(read_cpuid_part()) {
368 #ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
369 case ARM_CPU_PART_BRAHMA_B15:
370 case ARM_CPU_PART_CORTEX_A12:
371 case ARM_CPU_PART_CORTEX_A15:
372 case ARM_CPU_PART_CORTEX_A17:
380 #define KVM_SSBD_UNKNOWN -1
381 #define KVM_SSBD_FORCE_DISABLE 0
382 #define KVM_SSBD_KERNEL 1
383 #define KVM_SSBD_FORCE_ENABLE 2
384 #define KVM_SSBD_MITIGATED 3
386 static inline int kvm_arm_have_ssbd(void)
388 /* No way to detect it yet, pretend it is not there. */
389 return KVM_SSBD_UNKNOWN;
392 static inline void kvm_vcpu_load_sysregs(struct kvm_vcpu *vcpu) {}
393 static inline void kvm_vcpu_put_sysregs(struct kvm_vcpu *vcpu) {}
395 #define __KVM_HAVE_ARCH_VM_ALLOC
396 struct kvm *kvm_arch_alloc_vm(void);
397 void kvm_arch_free_vm(struct kvm *kvm);
399 static inline int kvm_arm_setup_stage2(struct kvm *kvm, unsigned long type)
402 * On 32bit ARM, VMs get a static 40bit IPA stage2 setup,
403 * so any non-zero value used as type is illegal.
410 static inline int kvm_arm_vcpu_finalize(struct kvm_vcpu *vcpu, int feature)
415 static inline bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu)
420 #endif /* __ARM_KVM_HOST_H__ */