1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
4 * Copyright (C) 2012 National Instruments Corp.
7 #include "zynq-7000.dtsi"
10 model = "Zynq ZC706 Development Board";
11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
20 device_type = "memory";
21 reg = <0x0 0x40000000>;
26 stdout-path = "serial0:115200n8";
30 compatible = "usb-nop-xceiv";
36 ps-clk-frequency = <33333333>;
41 phy-mode = "rgmii-id";
42 phy-handle = <ðernet_phy>;
43 pinctrl-names = "default";
44 pinctrl-0 = <&pinctrl_gem0_default>;
46 ethernet_phy: ethernet-phy@7 {
48 device_type = "ethernet-phy";
53 pinctrl-names = "default";
54 pinctrl-0 = <&pinctrl_gpio0_default>;
59 clock-frequency = <400000>;
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_i2c0_default>;
64 compatible = "nxp,pca9548";
73 si570: clock-generator@5d {
75 compatible = "silabs,si570";
76 temperature-stability = <50>;
78 factory-fout = <156250000>;
79 clock-frequency = <148500000>;
88 compatible = "adi,adv7511";
90 adi,input-depth = <8>;
91 adi,input-colorspace = "yuv422";
92 adi,input-clock = "1x";
93 adi,input-style = <3>;
94 adi,input-justification = "evenly";
103 compatible = "atmel,24c08";
109 #address-cells = <1>;
113 compatible = "ti,tca6416";
121 #address-cells = <1>;
125 compatible = "nxp,pcf8563";
131 #address-cells = <1>;
135 compatible = "ti,ucd90120";
143 pinctrl_gem0_default: gem0-default {
145 function = "ethernet0";
146 groups = "ethernet0_0_grp";
150 groups = "ethernet0_0_grp";
156 pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
162 pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
169 groups = "mdio0_0_grp";
173 groups = "mdio0_0_grp";
180 pinctrl_gpio0_default: gpio0-default {
183 groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
187 groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
193 pins = "MIO46", "MIO47";
203 pinctrl_i2c0_default: i2c0-default {
205 groups = "i2c0_10_grp";
210 groups = "i2c0_10_grp";
217 pinctrl_sdhci0_default: sdhci0-default {
219 groups = "sdio0_2_grp";
224 groups = "sdio0_2_grp";
231 groups = "gpio0_14_grp";
232 function = "sdio0_cd";
236 groups = "gpio0_14_grp";
244 groups = "gpio0_15_grp";
245 function = "sdio0_wp";
249 groups = "gpio0_15_grp";
257 pinctrl_uart1_default: uart1-default {
259 groups = "uart1_10_grp";
264 groups = "uart1_10_grp";
280 pinctrl_usb0_default: usb0-default {
282 groups = "usb0_0_grp";
287 groups = "usb0_0_grp";
293 pins = "MIO29", "MIO31", "MIO36";
298 pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
299 "MIO35", "MIO37", "MIO38", "MIO39";
307 pinctrl-names = "default";
308 pinctrl-0 = <&pinctrl_sdhci0_default>;
313 pinctrl-names = "default";
314 pinctrl-0 = <&pinctrl_uart1_default>;
320 usb-phy = <&usb_phy0>;
321 pinctrl-names = "default";
322 pinctrl-0 = <&pinctrl_usb0_default>;