2 * Device Tree Source for UniPhier sLD8 SoC
4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
7 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 compatible = "socionext,uniphier-sld8";
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
24 next-level-cache = <&l2>;
29 compatible = "arm,psci-0.2";
35 compatible = "fixed-clock";
37 clock-frequency = <25000000>;
40 arm_timer_clk: arm-timer {
42 compatible = "fixed-clock";
43 clock-frequency = <50000000>;
48 compatible = "simple-bus";
52 interrupt-parent = <&intc>;
54 l2: l2-cache@500c0000 {
55 compatible = "socionext,uniphier-system-cache";
56 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
58 interrupts = <0 174 4>, <0 175 4>;
60 cache-size = <(256 * 1024)>;
62 cache-line-size = <128>;
66 serial0: serial@54006800 {
67 compatible = "socionext,uniphier-uart";
69 reg = <0x54006800 0x40>;
70 interrupts = <0 33 4>;
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_uart0>;
73 clocks = <&peri_clk 0>;
74 resets = <&peri_rst 0>;
77 serial1: serial@54006900 {
78 compatible = "socionext,uniphier-uart";
80 reg = <0x54006900 0x40>;
81 interrupts = <0 35 4>;
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_uart1>;
84 clocks = <&peri_clk 1>;
85 resets = <&peri_rst 1>;
88 serial2: serial@54006a00 {
89 compatible = "socionext,uniphier-uart";
91 reg = <0x54006a00 0x40>;
92 interrupts = <0 37 4>;
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_uart2>;
95 clocks = <&peri_clk 2>;
96 resets = <&peri_rst 2>;
99 serial3: serial@54006b00 {
100 compatible = "socionext,uniphier-uart";
102 reg = <0x54006b00 0x40>;
103 interrupts = <0 29 4>;
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_uart3>;
106 clocks = <&peri_clk 3>;
107 resets = <&peri_rst 3>;
110 gpio: gpio@55000000 {
111 compatible = "socionext,uniphier-gpio";
112 reg = <0x55000000 0x200>;
113 interrupt-parent = <&aidet>;
114 interrupt-controller;
115 #interrupt-cells = <2>;
118 gpio-ranges = <&pinctrl 0 0 0>,
121 gpio-ranges-group-names = "gpio_range0",
125 socionext,interrupt-ranges = <0 48 13>, <14 62 2>;
129 compatible = "socionext,uniphier-i2c";
131 reg = <0x58400000 0x40>;
132 #address-cells = <1>;
134 interrupts = <0 41 1>;
135 pinctrl-names = "default";
136 pinctrl-0 = <&pinctrl_i2c0>;
137 clocks = <&peri_clk 4>;
138 resets = <&peri_rst 4>;
139 clock-frequency = <100000>;
143 compatible = "socionext,uniphier-i2c";
145 reg = <0x58480000 0x40>;
146 #address-cells = <1>;
148 interrupts = <0 42 1>;
149 pinctrl-names = "default";
150 pinctrl-0 = <&pinctrl_i2c1>;
151 clocks = <&peri_clk 5>;
152 resets = <&peri_rst 5>;
153 clock-frequency = <100000>;
156 /* chip-internal connection for DMD */
158 compatible = "socionext,uniphier-i2c";
159 reg = <0x58500000 0x40>;
160 #address-cells = <1>;
162 interrupts = <0 43 1>;
163 pinctrl-names = "default";
164 pinctrl-0 = <&pinctrl_i2c2>;
165 clocks = <&peri_clk 6>;
166 resets = <&peri_rst 6>;
167 clock-frequency = <400000>;
171 compatible = "socionext,uniphier-i2c";
173 reg = <0x58580000 0x40>;
174 #address-cells = <1>;
176 interrupts = <0 44 1>;
177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_i2c3>;
179 clocks = <&peri_clk 7>;
180 resets = <&peri_rst 7>;
181 clock-frequency = <100000>;
184 system_bus: system-bus@58c00000 {
185 compatible = "socionext,uniphier-system-bus";
187 reg = <0x58c00000 0x400>;
188 #address-cells = <2>;
190 pinctrl-names = "default";
191 pinctrl-0 = <&pinctrl_system_bus>;
195 compatible = "socionext,uniphier-smpctrl";
196 reg = <0x59801000 0x400>;
200 compatible = "socionext,uniphier-sld8-mioctrl",
201 "simple-mfd", "syscon";
202 reg = <0x59810000 0x800>;
205 compatible = "socionext,uniphier-sld8-mio-clock";
210 compatible = "socionext,uniphier-sld8-mio-reset";
216 compatible = "socionext,uniphier-sld8-perictrl",
217 "simple-mfd", "syscon";
218 reg = <0x59820000 0x200>;
221 compatible = "socionext,uniphier-sld8-peri-clock";
226 compatible = "socionext,uniphier-sld8-peri-reset";
232 compatible = "socionext,uniphier-ehci", "generic-ehci";
234 reg = <0x5a800100 0x100>;
235 interrupts = <0 80 4>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&pinctrl_usb0>;
238 clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>;
239 resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
244 compatible = "socionext,uniphier-ehci", "generic-ehci";
246 reg = <0x5a810100 0x100>;
247 interrupts = <0 81 4>;
248 pinctrl-names = "default";
249 pinctrl-0 = <&pinctrl_usb1>;
250 clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>;
251 resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
256 compatible = "socionext,uniphier-ehci", "generic-ehci";
258 reg = <0x5a820100 0x100>;
259 interrupts = <0 82 4>;
260 pinctrl-names = "default";
261 pinctrl-0 = <&pinctrl_usb2>;
262 clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>;
263 resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
268 compatible = "socionext,uniphier-sld8-soc-glue",
269 "simple-mfd", "syscon";
270 reg = <0x5f800000 0x2000>;
273 compatible = "socionext,uniphier-sld8-pinctrl";
278 compatible = "arm,cortex-a9-global-timer";
279 reg = <0x60000200 0x20>;
280 interrupts = <1 11 0x104>;
281 clocks = <&arm_timer_clk>;
285 compatible = "arm,cortex-a9-twd-timer";
286 reg = <0x60000600 0x20>;
287 interrupts = <1 13 0x104>;
288 clocks = <&arm_timer_clk>;
291 intc: interrupt-controller@60001000 {
292 compatible = "arm,cortex-a9-gic";
293 reg = <0x60001000 0x1000>,
295 #interrupt-cells = <3>;
296 interrupt-controller;
299 aidet: aidet@61830000 {
300 compatible = "socionext,uniphier-sld8-aidet";
301 reg = <0x61830000 0x200>;
302 interrupt-controller;
303 #interrupt-cells = <2>;
307 compatible = "socionext,uniphier-sld8-sysctrl",
308 "simple-mfd", "syscon";
309 reg = <0x61840000 0x10000>;
312 compatible = "socionext,uniphier-sld8-clock";
317 compatible = "socionext,uniphier-sld8-reset";
322 nand: nand@68000000 {
323 compatible = "socionext,uniphier-denali-nand-v5a";
325 reg-names = "nand_data", "denali_reg";
326 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
327 interrupts = <0 65 4>;
328 pinctrl-names = "default";
329 pinctrl-0 = <&pinctrl_nand2cs>;
330 clocks = <&sys_clk 2>;
331 resets = <&sys_rst 2>;
336 #include "uniphier-pinctrl.dtsi"