1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/thermal/thermal.h>
4 #include "tegra30.dtsi"
5 #include "tegra30-cpu-opp.dtsi"
6 #include "tegra30-cpu-opp-microvolt.dtsi"
9 * This file contains common DT entry for all fab version of Cardhu.
10 * There is multiple fab version of Cardhu starting from A01 to A07.
11 * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
12 * A02 will have different sets of GPIOs for fixed regulator compare to
13 * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
14 * compatible with fab version A04. Based on Cardhu fab version, the
15 * related dts file need to be chosen like for Cardhu fab version A02,
16 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
17 * tegra30-cardhu-a04.dts.
18 * The identification of board is done in two ways, by looking the sticker
19 * on PCB and by reading board id eeprom.
20 * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
21 * number is the fab version like here it is 002 and hence fab version A02.
22 * The (downstream internal) U-Boot of Cardhu display the board-id as
24 * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
25 * In this Fab version is 02 i.e. A02.
26 * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
27 * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
32 model = "NVIDIA Tegra30 Cardhu evaluation board";
33 compatible = "nvidia,cardhu", "nvidia,tegra30";
36 rtc0 = "/i2c@7000d000/tps65911@2d";
37 rtc1 = "/rtc@7000e000";
43 stdout-path = "serial0:115200n8";
47 reg = <0x80000000 0x40000000>;
53 /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
54 avdd-pexb-supply = <&ldo1_reg>;
55 vdd-pexb-supply = <&ldo1_reg>;
56 avdd-pex-pll-supply = <&ldo1_reg>;
57 hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
58 vddio-pex-ctl-supply = <&sys_3v3_reg>;
59 avdd-plle-supply = <&ldo2_reg>;
62 nvidia,num-lanes = <4>;
66 nvidia,num-lanes = <1>;
71 nvidia,num-lanes = <1>;
80 nvidia,panel = <&panel>;
86 pinctrl-names = "default";
87 pinctrl-0 = <&state_default>;
89 state_default: pinmux {
91 nvidia,pins = "sdmmc1_clk_pz0";
92 nvidia,function = "sdmmc1";
93 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
94 nvidia,tristate = <TEGRA_PIN_DISABLE>;
97 nvidia,pins = "sdmmc1_cmd_pz1",
102 nvidia,function = "sdmmc1";
103 nvidia,pull = <TEGRA_PIN_PULL_UP>;
104 nvidia,tristate = <TEGRA_PIN_DISABLE>;
107 nvidia,pins = "sdmmc3_clk_pa6";
108 nvidia,function = "sdmmc3";
109 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
110 nvidia,tristate = <TEGRA_PIN_DISABLE>;
113 nvidia,pins = "sdmmc3_cmd_pa7",
118 nvidia,function = "sdmmc3";
119 nvidia,pull = <TEGRA_PIN_PULL_UP>;
120 nvidia,tristate = <TEGRA_PIN_DISABLE>;
123 nvidia,pins = "sdmmc4_clk_pcc4",
125 nvidia,function = "sdmmc4";
126 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
127 nvidia,tristate = <TEGRA_PIN_DISABLE>;
130 nvidia,pins = "sdmmc4_dat0_paa0",
138 nvidia,function = "sdmmc4";
139 nvidia,pull = <TEGRA_PIN_PULL_UP>;
140 nvidia,tristate = <TEGRA_PIN_DISABLE>;
143 nvidia,pins = "dap2_fs_pa2",
147 nvidia,function = "i2s1";
148 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
149 nvidia,tristate = <TEGRA_PIN_DISABLE>;
152 nvidia,pins = "drive_sdio3";
153 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
154 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
155 nvidia,pull-down-strength = <46>;
156 nvidia,pull-up-strength = <42>;
157 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
158 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
161 nvidia,pins = "uart3_txd_pw6",
165 nvidia,function = "uartc";
166 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
167 nvidia,tristate = <TEGRA_PIN_DISABLE>;
177 compatible = "nvidia,tegra30-hsuart";
178 /delete-property/ reg-shift;
186 panelddc: i2c@7000c000 {
188 clock-frequency = <100000>;
193 clock-frequency = <100000>;
198 clock-frequency = <100000>;
200 /* ALS and Proximity sensor */
202 compatible = "isil,isl29028";
204 interrupt-parent = <&gpio>;
205 interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_LEVEL_HIGH>;
209 compatible = "nxp,pca9546";
210 #address-cells = <1>;
213 reset-gpios = <&gpio TEGRA_GPIO(BB, 0) GPIO_ACTIVE_LOW>;
219 clock-frequency = <100000>;
224 clock-frequency = <100000>;
227 compatible = "wlf,wm8903";
229 interrupt-parent = <&gpio>;
230 interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
236 micdet-delay = <100>;
237 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
241 compatible = "ti,tps65911";
244 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
245 #interrupt-cells = <2>;
246 interrupt-controller;
249 ti,system-power-controller;
254 vcc1-supply = <&vdd_ac_bat_reg>;
255 vcc2-supply = <&vdd_ac_bat_reg>;
256 vcc3-supply = <&vio_reg>;
257 vcc4-supply = <&vdd_5v0_reg>;
258 vcc5-supply = <&vdd_ac_bat_reg>;
259 vcc6-supply = <&vdd2_reg>;
260 vcc7-supply = <&vdd_ac_bat_reg>;
261 vccio-supply = <&vdd_ac_bat_reg>;
265 regulator-name = "vddio_ddr_1v2";
266 regulator-min-microvolt = <1200000>;
267 regulator-max-microvolt = <1200000>;
272 regulator-name = "vdd_1v5_gen";
273 regulator-min-microvolt = <1500000>;
274 regulator-max-microvolt = <1500000>;
278 vddctrl_reg: vddctrl {
279 regulator-name = "vdd_cpu,vdd_sys";
280 regulator-min-microvolt = <800000>;
281 regulator-max-microvolt = <1250000>;
282 regulator-coupled-with = <&vdd_core>;
283 regulator-coupled-max-spread = <300000>;
284 regulator-max-step-microvolt = <100000>;
287 nvidia,tegra-cpu-regulator;
291 regulator-name = "vdd_1v8_gen";
292 regulator-min-microvolt = <1800000>;
293 regulator-max-microvolt = <1800000>;
298 regulator-name = "vdd_pexa,vdd_pexb";
299 regulator-min-microvolt = <1050000>;
300 regulator-max-microvolt = <1050000>;
304 regulator-name = "vdd_sata,avdd_plle";
305 regulator-min-microvolt = <1050000>;
306 regulator-max-microvolt = <1050000>;
309 /* LDO3 is not connected to anything */
312 regulator-name = "vdd_rtc";
313 regulator-min-microvolt = <1200000>;
314 regulator-max-microvolt = <1200000>;
319 regulator-name = "vddio_sdmmc,avdd_vdac";
320 regulator-min-microvolt = <3300000>;
321 regulator-max-microvolt = <3300000>;
326 regulator-name = "avdd_dsi_csi,pwrdet_mipi";
327 regulator-min-microvolt = <1200000>;
328 regulator-max-microvolt = <1200000>;
332 regulator-name = "vdd_pllm,x,u,a_p_c_s";
333 regulator-min-microvolt = <1200000>;
334 regulator-max-microvolt = <1200000>;
339 regulator-name = "vdd_ddr_hs";
340 regulator-min-microvolt = <1000000>;
341 regulator-max-microvolt = <1000000>;
347 nct1008: temperature-sensor@4c {
348 compatible = "onnn,nct1008";
350 vcc-supply = <&sys_3v3_reg>;
351 interrupt-parent = <&gpio>;
352 interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING>;
353 #thermal-sensor-cells = <1>;
356 vdd_core: tps62361@60 {
357 compatible = "ti,tps62361";
360 regulator-name = "tps62361-vout";
361 regulator-min-microvolt = <500000>;
362 regulator-max-microvolt = <1500000>;
363 regulator-coupled-with = <&vddctrl_reg>;
364 regulator-coupled-max-spread = <300000>;
365 regulator-max-step-microvolt = <100000>;
371 nvidia,tegra-core-regulator;
377 spi-max-frequency = <25000000>;
380 compatible = "winbond,w25q32", "jedec,spi-nor";
382 spi-max-frequency = <20000000>;
388 nvidia,invert-interrupt;
389 nvidia,suspend-mode = <1>;
390 nvidia,cpu-pwr-good-time = <2000>;
391 nvidia,cpu-pwr-off-time = <200>;
392 nvidia,core-pwr-good-time = <3845 3845>;
393 nvidia,core-pwr-off-time = <0>;
394 nvidia,core-power-req-active-high;
395 nvidia,sys-clock-req-active-high;
396 core-supply = <&vdd_core>;
407 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
408 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
409 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
424 vbus-supply = <&usb3_vbus_reg>;
428 backlight: backlight {
429 compatible = "pwm-backlight";
431 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
432 power-supply = <&vdd_bl_reg>;
433 pwms = <&pwm 0 5000000>;
435 brightness-levels = <0 4 8 16 32 64 128 255>;
436 default-brightness-level = <6>;
439 clk32k_in: clock-32k {
440 compatible = "fixed-clock";
441 clock-frequency = <32768>;
447 cpu-supply = <&vddctrl_reg>;
448 operating-points-v2 = <&cpu0_opp_table>;
449 #cooling-cells = <2>;
453 cpu-supply = <&vddctrl_reg>;
454 operating-points-v2 = <&cpu0_opp_table>;
455 #cooling-cells = <2>;
459 cpu-supply = <&vddctrl_reg>;
460 operating-points-v2 = <&cpu0_opp_table>;
461 #cooling-cells = <2>;
465 cpu-supply = <&vddctrl_reg>;
466 operating-points-v2 = <&cpu0_opp_table>;
467 #cooling-cells = <2>;
472 compatible = "chunghwa,claa101wb01";
473 ddc-i2c-bus = <&panelddc>;
475 power-supply = <&vdd_pnl1_reg>;
476 enable-gpios = <&gpio TEGRA_GPIO(L, 2) GPIO_ACTIVE_HIGH>;
478 backlight = <&backlight>;
481 vdd_ac_bat_reg: regulator-acbat {
482 compatible = "regulator-fixed";
483 regulator-name = "vdd_ac_bat";
484 regulator-min-microvolt = <5000000>;
485 regulator-max-microvolt = <5000000>;
489 cam_1v8_reg: regulator-cam {
490 compatible = "regulator-fixed";
491 regulator-name = "cam_1v8";
492 regulator-min-microvolt = <1800000>;
493 regulator-max-microvolt = <1800000>;
495 gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
496 vin-supply = <&vio_reg>;
499 cp_5v_reg: regulator-5v0cp {
500 compatible = "regulator-fixed";
501 regulator-name = "cp_5v";
502 regulator-min-microvolt = <5000000>;
503 regulator-max-microvolt = <5000000>;
507 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
510 emmc_3v3_reg: regulator-emmc {
511 compatible = "regulator-fixed";
512 regulator-name = "emmc_3v3";
513 regulator-min-microvolt = <3300000>;
514 regulator-max-microvolt = <3300000>;
518 gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
519 vin-supply = <&sys_3v3_reg>;
522 modem_3v3_reg: regulator-modem {
523 compatible = "regulator-fixed";
524 regulator-name = "modem_3v3";
525 regulator-min-microvolt = <3300000>;
526 regulator-max-microvolt = <3300000>;
528 gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
531 pex_hvdd_3v3_reg: regulator-pex {
532 compatible = "regulator-fixed";
533 regulator-name = "pex_hvdd_3v3";
534 regulator-min-microvolt = <3300000>;
535 regulator-max-microvolt = <3300000>;
537 gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
538 vin-supply = <&sys_3v3_reg>;
541 vdd_cam1_ldo_reg: regulator-cam1 {
542 compatible = "regulator-fixed";
543 regulator-name = "vdd_cam1_ldo";
544 regulator-min-microvolt = <2800000>;
545 regulator-max-microvolt = <2800000>;
547 gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
548 vin-supply = <&sys_3v3_reg>;
551 vdd_cam2_ldo_reg: regulator-cam2 {
552 compatible = "regulator-fixed";
553 regulator-name = "vdd_cam2_ldo";
554 regulator-min-microvolt = <2800000>;
555 regulator-max-microvolt = <2800000>;
557 gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
558 vin-supply = <&sys_3v3_reg>;
561 vdd_cam3_ldo_reg: regulator-cam3 {
562 compatible = "regulator-fixed";
563 regulator-name = "vdd_cam3_ldo";
564 regulator-min-microvolt = <3300000>;
565 regulator-max-microvolt = <3300000>;
567 gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
568 vin-supply = <&sys_3v3_reg>;
571 vdd_com_reg: regulator-com {
572 compatible = "regulator-fixed";
573 regulator-name = "vdd_com";
574 regulator-min-microvolt = <3300000>;
575 regulator-max-microvolt = <3300000>;
579 gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
580 vin-supply = <&sys_3v3_reg>;
583 vdd_fuse_3v3_reg: regulator-fuse {
584 compatible = "regulator-fixed";
585 regulator-name = "vdd_fuse_3v3";
586 regulator-min-microvolt = <3300000>;
587 regulator-max-microvolt = <3300000>;
589 gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
590 vin-supply = <&sys_3v3_reg>;
593 vdd_pnl1_reg: regulator-pnl1 {
594 compatible = "regulator-fixed";
595 regulator-name = "vdd_pnl1";
596 regulator-min-microvolt = <3300000>;
597 regulator-max-microvolt = <3300000>;
601 gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
602 vin-supply = <&sys_3v3_reg>;
605 vdd_vid_reg: regulator-vid {
606 compatible = "regulator-fixed";
607 regulator-name = "vddio_vid";
608 regulator-min-microvolt = <5000000>;
609 regulator-max-microvolt = <5000000>;
611 gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
613 vin-supply = <&vdd_5v0_reg>;
617 compatible = "nvidia,tegra-audio-wm8903-cardhu",
618 "nvidia,tegra-audio-wm8903";
619 nvidia,model = "NVIDIA Tegra Cardhu";
621 nvidia,audio-routing =
622 "Headphone Jack", "HPOUTR",
623 "Headphone Jack", "HPOUTL",
628 "Mic Jack", "MICBIAS",
631 nvidia,i2s-controller = <&tegra_i2s1>;
632 nvidia,audio-codec = <&wm8903>;
634 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
635 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
638 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
639 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
640 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
641 clock-names = "pll_a", "pll_a_out0", "mclk";
643 assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
644 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
646 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
647 <&tegra_car TEGRA30_CLK_EXTERN1>;
652 polling-delay-passive = <1000>; /* milliseconds */
653 polling-delay = <5000>; /* milliseconds */
655 thermal-sensors = <&nct1008 1>;
659 /* throttle at 57C until temperature drops to 56.8C */
660 temperature = <57000>;
666 /* shut down at 60C */
667 temperature = <60000>;
676 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
677 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
678 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
679 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
686 compatible = "gpio-keys";
690 interrupt-parent = <&pmic>;
692 linux,code = <KEY_POWER>;
693 debounce-interval = <100>;
698 label = "Volume Down";
699 gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_LOW>;
700 linux,code = <KEY_VOLUMEDOWN>;
701 debounce-interval = <10>;
706 gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
707 linux,code = <KEY_VOLUMEUP>;
708 debounce-interval = <10>;