1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/thermal/thermal.h>
4 #include "tegra30.dtsi"
5 #include "tegra30-cpu-opp.dtsi"
6 #include "tegra30-cpu-opp-microvolt.dtsi"
9 * This file contains common DT entry for all fab version of Cardhu.
10 * There is multiple fab version of Cardhu starting from A01 to A07.
11 * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
12 * A02 will have different sets of GPIOs for fixed regulator compare to
13 * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
14 * compatible with fab version A04. Based on Cardhu fab version, the
15 * related dts file need to be chosen like for Cardhu fab version A02,
16 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
17 * tegra30-cardhu-a04.dts.
18 * The identification of board is done in two ways, by looking the sticker
19 * on PCB and by reading board id eeprom.
20 * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
21 * number is the fab version like here it is 002 and hence fab version A02.
22 * The (downstream internal) U-Boot of Cardhu display the board-id as
24 * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
25 * In this Fab version is 02 i.e. A02.
26 * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
27 * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
32 model = "NVIDIA Tegra30 Cardhu evaluation board";
33 compatible = "nvidia,cardhu", "nvidia,tegra30";
36 rtc0 = "/i2c@7000d000/tps65911@2d";
37 rtc1 = "/rtc@7000e000";
43 stdout-path = "serial0:115200n8";
47 reg = <0x80000000 0x40000000>;
53 /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
54 avdd-pexb-supply = <&ldo1_reg>;
55 vdd-pexb-supply = <&ldo1_reg>;
56 avdd-pex-pll-supply = <&ldo1_reg>;
57 hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
58 vddio-pex-ctl-supply = <&sys_3v3_reg>;
59 avdd-plle-supply = <&ldo2_reg>;
62 nvidia,num-lanes = <4>;
66 nvidia,num-lanes = <1>;
71 nvidia,num-lanes = <1>;
80 nvidia,panel = <&panel>;
86 pinctrl-names = "default";
87 pinctrl-0 = <&state_default>;
89 state_default: pinmux {
91 nvidia,pins = "sdmmc1_clk_pz0";
92 nvidia,function = "sdmmc1";
93 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
94 nvidia,tristate = <TEGRA_PIN_DISABLE>;
97 nvidia,pins = "sdmmc1_cmd_pz1",
102 nvidia,function = "sdmmc1";
103 nvidia,pull = <TEGRA_PIN_PULL_UP>;
104 nvidia,tristate = <TEGRA_PIN_DISABLE>;
107 nvidia,pins = "sdmmc3_clk_pa6";
108 nvidia,function = "sdmmc3";
109 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
110 nvidia,tristate = <TEGRA_PIN_DISABLE>;
113 nvidia,pins = "sdmmc3_cmd_pa7",
118 nvidia,function = "sdmmc3";
119 nvidia,pull = <TEGRA_PIN_PULL_UP>;
120 nvidia,tristate = <TEGRA_PIN_DISABLE>;
123 nvidia,pins = "sdmmc4_clk_pcc4",
125 nvidia,function = "sdmmc4";
126 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
127 nvidia,tristate = <TEGRA_PIN_DISABLE>;
130 nvidia,pins = "sdmmc4_dat0_paa0",
138 nvidia,function = "sdmmc4";
139 nvidia,pull = <TEGRA_PIN_PULL_UP>;
140 nvidia,tristate = <TEGRA_PIN_DISABLE>;
143 nvidia,pins = "dap2_fs_pa2",
147 nvidia,function = "i2s1";
148 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
149 nvidia,tristate = <TEGRA_PIN_DISABLE>;
152 nvidia,pins = "drive_sdio3";
153 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
154 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
155 nvidia,pull-down-strength = <46>;
156 nvidia,pull-up-strength = <42>;
157 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
158 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
161 nvidia,pins = "uart3_txd_pw6",
165 nvidia,function = "uartc";
166 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
167 nvidia,tristate = <TEGRA_PIN_DISABLE>;
177 compatible = "nvidia,tegra30-hsuart";
185 panelddc: i2c@7000c000 {
187 clock-frequency = <100000>;
192 clock-frequency = <100000>;
197 clock-frequency = <100000>;
199 /* ALS and Proximity sensor */
201 compatible = "isil,isl29028";
203 interrupt-parent = <&gpio>;
204 interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_LEVEL_HIGH>;
208 compatible = "nxp,pca9546";
209 #address-cells = <1>;
212 reset-gpio = <&gpio TEGRA_GPIO(BB, 0) GPIO_ACTIVE_LOW>;
218 clock-frequency = <100000>;
223 clock-frequency = <100000>;
226 compatible = "wlf,wm8903";
228 interrupt-parent = <&gpio>;
229 interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
235 micdet-delay = <100>;
236 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
240 compatible = "ti,tps65911";
243 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
244 #interrupt-cells = <2>;
245 interrupt-controller;
248 ti,system-power-controller;
253 vcc1-supply = <&vdd_ac_bat_reg>;
254 vcc2-supply = <&vdd_ac_bat_reg>;
255 vcc3-supply = <&vio_reg>;
256 vcc4-supply = <&vdd_5v0_reg>;
257 vcc5-supply = <&vdd_ac_bat_reg>;
258 vcc6-supply = <&vdd2_reg>;
259 vcc7-supply = <&vdd_ac_bat_reg>;
260 vccio-supply = <&vdd_ac_bat_reg>;
264 regulator-name = "vddio_ddr_1v2";
265 regulator-min-microvolt = <1200000>;
266 regulator-max-microvolt = <1200000>;
271 regulator-name = "vdd_1v5_gen";
272 regulator-min-microvolt = <1500000>;
273 regulator-max-microvolt = <1500000>;
277 vddctrl_reg: vddctrl {
278 regulator-name = "vdd_cpu,vdd_sys";
279 regulator-min-microvolt = <800000>;
280 regulator-max-microvolt = <1250000>;
281 regulator-coupled-with = <&vdd_core>;
282 regulator-coupled-max-spread = <300000>;
283 regulator-max-step-microvolt = <100000>;
286 nvidia,tegra-cpu-regulator;
290 regulator-name = "vdd_1v8_gen";
291 regulator-min-microvolt = <1800000>;
292 regulator-max-microvolt = <1800000>;
297 regulator-name = "vdd_pexa,vdd_pexb";
298 regulator-min-microvolt = <1050000>;
299 regulator-max-microvolt = <1050000>;
303 regulator-name = "vdd_sata,avdd_plle";
304 regulator-min-microvolt = <1050000>;
305 regulator-max-microvolt = <1050000>;
308 /* LDO3 is not connected to anything */
311 regulator-name = "vdd_rtc";
312 regulator-min-microvolt = <1200000>;
313 regulator-max-microvolt = <1200000>;
318 regulator-name = "vddio_sdmmc,avdd_vdac";
319 regulator-min-microvolt = <3300000>;
320 regulator-max-microvolt = <3300000>;
325 regulator-name = "avdd_dsi_csi,pwrdet_mipi";
326 regulator-min-microvolt = <1200000>;
327 regulator-max-microvolt = <1200000>;
331 regulator-name = "vdd_pllm,x,u,a_p_c_s";
332 regulator-min-microvolt = <1200000>;
333 regulator-max-microvolt = <1200000>;
338 regulator-name = "vdd_ddr_hs";
339 regulator-min-microvolt = <1000000>;
340 regulator-max-microvolt = <1000000>;
346 nct1008: temperature-sensor@4c {
347 compatible = "onnn,nct1008";
349 vcc-supply = <&sys_3v3_reg>;
350 interrupt-parent = <&gpio>;
351 interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING>;
352 #thermal-sensor-cells = <1>;
355 vdd_core: tps62361@60 {
356 compatible = "ti,tps62361";
359 regulator-name = "tps62361-vout";
360 regulator-min-microvolt = <500000>;
361 regulator-max-microvolt = <1500000>;
362 regulator-coupled-with = <&vddctrl_reg>;
363 regulator-coupled-max-spread = <300000>;
364 regulator-max-step-microvolt = <100000>;
370 nvidia,tegra-core-regulator;
376 spi-max-frequency = <25000000>;
378 compatible = "winbond,w25q32", "jedec,spi-nor";
380 spi-max-frequency = <20000000>;
386 nvidia,invert-interrupt;
387 nvidia,suspend-mode = <1>;
388 nvidia,cpu-pwr-good-time = <2000>;
389 nvidia,cpu-pwr-off-time = <200>;
390 nvidia,core-pwr-good-time = <3845 3845>;
391 nvidia,core-pwr-off-time = <0>;
392 nvidia,core-power-req-active-high;
393 nvidia,sys-clock-req-active-high;
404 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
405 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
406 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
421 vbus-supply = <&usb3_vbus_reg>;
425 backlight: backlight {
426 compatible = "pwm-backlight";
428 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
429 power-supply = <&vdd_bl_reg>;
430 pwms = <&pwm 0 5000000>;
432 brightness-levels = <0 4 8 16 32 64 128 255>;
433 default-brightness-level = <6>;
437 compatible = "fixed-clock";
438 clock-frequency = <32768>;
444 cpu-supply = <&vddctrl_reg>;
445 operating-points-v2 = <&cpu0_opp_table>;
446 #cooling-cells = <2>;
450 cpu-supply = <&vddctrl_reg>;
451 operating-points-v2 = <&cpu0_opp_table>;
452 #cooling-cells = <2>;
456 cpu-supply = <&vddctrl_reg>;
457 operating-points-v2 = <&cpu0_opp_table>;
458 #cooling-cells = <2>;
462 cpu-supply = <&vddctrl_reg>;
463 operating-points-v2 = <&cpu0_opp_table>;
464 #cooling-cells = <2>;
469 compatible = "chunghwa,claa101wb01";
470 ddc-i2c-bus = <&panelddc>;
472 power-supply = <&vdd_pnl1_reg>;
473 enable-gpios = <&gpio TEGRA_GPIO(L, 2) GPIO_ACTIVE_HIGH>;
475 backlight = <&backlight>;
478 vdd_ac_bat_reg: regulator@0 {
479 compatible = "regulator-fixed";
480 regulator-name = "vdd_ac_bat";
481 regulator-min-microvolt = <5000000>;
482 regulator-max-microvolt = <5000000>;
486 cam_1v8_reg: regulator@1 {
487 compatible = "regulator-fixed";
488 regulator-name = "cam_1v8";
489 regulator-min-microvolt = <1800000>;
490 regulator-max-microvolt = <1800000>;
492 gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
493 vin-supply = <&vio_reg>;
496 cp_5v_reg: regulator@2 {
497 compatible = "regulator-fixed";
498 regulator-name = "cp_5v";
499 regulator-min-microvolt = <5000000>;
500 regulator-max-microvolt = <5000000>;
504 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
507 emmc_3v3_reg: regulator@3 {
508 compatible = "regulator-fixed";
509 regulator-name = "emmc_3v3";
510 regulator-min-microvolt = <3300000>;
511 regulator-max-microvolt = <3300000>;
515 gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
516 vin-supply = <&sys_3v3_reg>;
519 modem_3v3_reg: regulator@4 {
520 compatible = "regulator-fixed";
521 regulator-name = "modem_3v3";
522 regulator-min-microvolt = <3300000>;
523 regulator-max-microvolt = <3300000>;
525 gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
528 pex_hvdd_3v3_reg: regulator@5 {
529 compatible = "regulator-fixed";
530 regulator-name = "pex_hvdd_3v3";
531 regulator-min-microvolt = <3300000>;
532 regulator-max-microvolt = <3300000>;
534 gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
535 vin-supply = <&sys_3v3_reg>;
538 vdd_cam1_ldo_reg: regulator@6 {
539 compatible = "regulator-fixed";
540 regulator-name = "vdd_cam1_ldo";
541 regulator-min-microvolt = <2800000>;
542 regulator-max-microvolt = <2800000>;
544 gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
545 vin-supply = <&sys_3v3_reg>;
548 vdd_cam2_ldo_reg: regulator@7 {
549 compatible = "regulator-fixed";
550 regulator-name = "vdd_cam2_ldo";
551 regulator-min-microvolt = <2800000>;
552 regulator-max-microvolt = <2800000>;
554 gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
555 vin-supply = <&sys_3v3_reg>;
558 vdd_cam3_ldo_reg: regulator@8 {
559 compatible = "regulator-fixed";
560 regulator-name = "vdd_cam3_ldo";
561 regulator-min-microvolt = <3300000>;
562 regulator-max-microvolt = <3300000>;
564 gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
565 vin-supply = <&sys_3v3_reg>;
568 vdd_com_reg: regulator@9 {
569 compatible = "regulator-fixed";
570 regulator-name = "vdd_com";
571 regulator-min-microvolt = <3300000>;
572 regulator-max-microvolt = <3300000>;
576 gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
577 vin-supply = <&sys_3v3_reg>;
580 vdd_fuse_3v3_reg: regulator@10 {
581 compatible = "regulator-fixed";
582 regulator-name = "vdd_fuse_3v3";
583 regulator-min-microvolt = <3300000>;
584 regulator-max-microvolt = <3300000>;
586 gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
587 vin-supply = <&sys_3v3_reg>;
590 vdd_pnl1_reg: regulator@11 {
591 compatible = "regulator-fixed";
592 regulator-name = "vdd_pnl1";
593 regulator-min-microvolt = <3300000>;
594 regulator-max-microvolt = <3300000>;
598 gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
599 vin-supply = <&sys_3v3_reg>;
602 vdd_vid_reg: regulator@12 {
603 compatible = "regulator-fixed";
604 regulator-name = "vddio_vid";
605 regulator-min-microvolt = <5000000>;
606 regulator-max-microvolt = <5000000>;
608 gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
610 vin-supply = <&vdd_5v0_reg>;
614 compatible = "nvidia,tegra-audio-wm8903-cardhu",
615 "nvidia,tegra-audio-wm8903";
616 nvidia,model = "NVIDIA Tegra Cardhu";
618 nvidia,audio-routing =
619 "Headphone Jack", "HPOUTR",
620 "Headphone Jack", "HPOUTL",
625 "Mic Jack", "MICBIAS",
628 nvidia,i2s-controller = <&tegra_i2s1>;
629 nvidia,audio-codec = <&wm8903>;
631 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
632 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
635 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
636 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
637 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
638 clock-names = "pll_a", "pll_a_out0", "mclk";
640 assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
641 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
643 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
644 <&tegra_car TEGRA30_CLK_EXTERN1>;
649 polling-delay-passive = <1000>; /* milliseconds */
650 polling-delay = <5000>; /* milliseconds */
652 thermal-sensors = <&nct1008 1>;
656 /* throttle at 57C until temperature drops to 56.8C */
657 temperature = <57000>;
663 /* shut down at 60C */
664 temperature = <60000>;
673 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
674 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
675 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
676 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
683 compatible = "gpio-keys";
687 interrupt-parent = <&pmic>;
689 linux,code = <KEY_POWER>;
690 debounce-interval = <100>;
695 label = "Volume Down";
696 gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_LOW>;
697 linux,code = <KEY_VOLUMEDOWN>;
698 debounce-interval = <10>;
703 gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
704 linux,code = <KEY_VOLUMEUP>;
705 debounce-interval = <10>;