Merge tag 'qcom-arm64-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-microblaze.git] / arch / arm / boot / dts / tegra30-asus-nexus7-grouper.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2
3 #include "tegra30-asus-nexus7-grouper-common.dtsi"
4 #include "tegra30-asus-nexus7-grouper-memory-timings.dtsi"
5
6 / {
7         compatible = "asus,grouper", "nvidia,tegra30";
8
9         display-panel {
10                 panel-timing {
11                         clock-frequency = <68000000>;
12                         hactive = <800>;
13                         vactive = <1280>;
14                         hfront-porch = <24>;
15                         hback-porch = <32>;
16                         hsync-len = <24>;
17                         vsync-len = <1>;
18                         vfront-porch = <5>;
19                         vback-porch = <32>;
20                 };
21         };
22
23         pinmux@70000868 {
24                 state_default: pinmux {
25                         lcd_dc1_pd2 {
26                                 nvidia,pins = "lcd_dc1_pd2";
27                                 nvidia,function = "displaya";
28                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
29                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
30                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
31                         };
32                         lcd_pwr2_pc6 {
33                                 nvidia,pins = "lcd_pwr2_pc6";
34                                 nvidia,function = "displaya";
35                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
36                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
37                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
38                         };
39                         spi2_cs2_n_pw3 {
40                                 nvidia,pins = "spi2_cs2_n_pw3";
41                                 nvidia,function = "spi2";
42                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
43                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
44                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
45                         };
46                         spi1_sck_px5 {
47                                 nvidia,pins = "spi1_sck_px5";
48                                 nvidia,function = "spi1";
49                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
50                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
51                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
52                         };
53                         pu5 {
54                                 nvidia,pins = "pu5";
55                                 nvidia,function = "pwm2";
56                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
57                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
58                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
59                         };
60                         spi1_miso_px7 {
61                                 nvidia,pins = "spi1_miso_px7";
62                                 nvidia,function = "spi1";
63                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
64                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
65                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
66                         };
67                         spi2_mosi_px0 {
68                                 nvidia,pins = "spi2_mosi_px0";
69                                 nvidia,function = "spi2";
70                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
71                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
72                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
73                         };
74                         kb_row7_pr7 {
75                                 nvidia,pins = "kb_row7_pr7";
76                                 nvidia,function = "kbc";
77                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
78                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
79                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
80                         };
81                         pu3 {
82                                 nvidia,pins = "pu3";
83                                 nvidia,function = "rsvd4";
84                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
85                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
86                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
87                         };
88                         pu4 {
89                                 nvidia,pins = "pu4";
90                                 nvidia,function = "pwm1";
91                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
92                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
93                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
94                         };
95                         kb_row15_ps7 {
96                                 nvidia,pins = "kb_row15_ps7";
97                                 nvidia,function = "kbc";
98                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
99                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
100                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
101                         };
102                         kb_row3_pr3 {
103                                 nvidia,pins = "kb_row3_pr3";
104                                 nvidia,function = "kbc";
105                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
106                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
107                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
108                         };
109                         kb_row13_ps5 {
110                                 nvidia,pins = "kb_row13_ps5";
111                                 nvidia,function = "kbc";
112                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
113                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
114                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
115                         };
116                         gmi_wp_n_pc7 {
117                                 nvidia,pins = "gmi_wp_n_pc7",
118                                                 "gmi_wait_pi7",
119                                                 "gmi_cs4_n_pk2",
120                                                 "gmi_cs3_n_pk4";
121                                 nvidia,function = "rsvd1";
122                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
123                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
124                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
125                         };
126                         gmi_cs6_n_pi3 {
127                                 nvidia,pins = "gmi_cs6_n_pi3";
128                                 nvidia,function = "gmi";
129                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
130                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
131                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
132                         };
133                 };
134         };
135
136         i2c@7000c500 {
137                 nfc@28 {
138                         compatible = "nxp,pn544-i2c";
139                         reg = <0x28>;
140                         clock-frequency = <100000>;
141
142                         interrupt-parent = <&gpio>;
143                         interrupts = <TEGRA_GPIO(X, 0) IRQ_TYPE_EDGE_RISING>;
144
145                         enable-gpios   = <&gpio TEGRA_GPIO(S, 7) GPIO_ACTIVE_HIGH>;
146                         firmware-gpios = <&gpio TEGRA_GPIO(R, 3) GPIO_ACTIVE_HIGH>;
147                 };
148         };
149 };