1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
4 * Copyright (c) 2020 Engicam srl
5 * Copyright (c) 2020 Amarula Solutons(India)
9 compatible = "engicam,microgea-stm32mp1", "st,stm32mp157";
12 device_type = "memory";
13 reg = <0xc0000000 0x10000000>;
21 mcuram2: mcuram2@10000000 {
22 compatible = "shared-dma-pool";
23 reg = <0x10000000 0x40000>;
27 vdev0vring0: vdev0vring0@10040000 {
28 compatible = "shared-dma-pool";
29 reg = <0x10040000 0x1000>;
33 vdev0vring1: vdev0vring1@10041000 {
34 compatible = "shared-dma-pool";
35 reg = <0x10041000 0x1000>;
39 vdev0buffer: vdev0buffer@10042000 {
40 compatible = "shared-dma-pool";
41 reg = <0x10042000 0x4000>;
45 mcuram: mcuram@30000000 {
46 compatible = "shared-dma-pool";
47 reg = <0x30000000 0x40000>;
51 retram: retram@38000000 {
52 compatible = "shared-dma-pool";
53 reg = <0x38000000 0x10000>;
59 compatible = "regulator-fixed";
60 regulator-name = "vin";
61 regulator-min-microvolt = <5000000>;
62 regulator-max-microvolt = <5000000>;
66 vddcore: regulator-vddcore {
67 compatible = "regulator-fixed";
68 regulator-name = "vddcore";
69 regulator-min-microvolt = <1200000>;
70 regulator-max-microvolt = <1200000>;
76 compatible = "regulator-fixed";
77 regulator-name = "vdd";
78 regulator-min-microvolt = <3300000>;
79 regulator-max-microvolt = <3300000>;
84 vddq_ddr: regulator-vddq-ddr {
85 compatible = "regulator-fixed";
86 regulator-name = "vddq_ddr";
87 regulator-min-microvolt = <1350000>;
88 regulator-max-microvolt = <1350000>;
99 pinctrl-names = "default", "sleep";
100 pinctrl-0 = <&fmc_pins_a>;
101 pinctrl-1 = <&fmc_sleep_pins_a>;
104 nand-controller@4,0 {
110 #address-cells = <1>;
126 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
127 <&vdev0vring1>, <&vdev0buffer>;
128 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
129 mbox-names = "vq0", "vq1", "shutdown";
130 interrupt-parent = <&exti>;
144 regulator-min-microvolt = <2500000>;
145 regulator-max-microvolt = <2500000>;
146 vdda-supply = <&vdd>;