arch/arm/boot/dts/stm32mp15-pinctrl.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
   2 /*
   3  * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
   4  * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
   5  */
   6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
   7
   8 &pinctrl {
   9         adc1_in6_pins_a: adc1-in6-0 {
  10                 pins {
  11                         pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
  12                 };
  13         };
  14
  15         adc12_ain_pins_a: adc12-ain-0 {
  16                 pins {
  17                         pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
  18                                  <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
  19                                  <STM32_PINMUX('F', 13, ANALOG)>, /* ADC2 in2 */
  20                                  <STM32_PINMUX('F', 14, ANALOG)>; /* ADC2 in6 */
  21                 };
  22         };
  23
  24         adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
  25                 pins {
  26                         pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
  27                                  <STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */
  28                 };
  29         };
  30
  31         cec_pins_a: cec-0 {
  32                 pins {
  33                         pinmux = <STM32_PINMUX('A', 15, AF4)>;
  34                         bias-disable;
  35                         drive-open-drain;
  36                         slew-rate = <0>;
  37                 };
  38         };
  39
  40         cec_sleep_pins_a: cec-sleep-0 {
  41                 pins {
  42                         pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
  43                 };
  44         };
  45
  46         cec_pins_b: cec-1 {
  47                 pins {
  48                         pinmux = <STM32_PINMUX('B', 6, AF5)>;
  49                         bias-disable;
  50                         drive-open-drain;
  51                         slew-rate = <0>;
  52                 };
  53         };
  54
  55         cec_sleep_pins_b: cec-sleep-1 {
  56                 pins {
  57                         pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
  58                 };
  59         };
  60
  61         dac_ch1_pins_a: dac-ch1-0 {
  62                 pins {
  63                         pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
  64                 };
  65         };
  66
  67         dac_ch2_pins_a: dac-ch2-0 {
  68                 pins {
  69                         pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
  70                 };
  71         };
  72
  73         dcmi_pins_a: dcmi-0 {
  74                 pins {
  75                         pinmux = <STM32_PINMUX('H', 8,  AF13)>,/* DCMI_HSYNC */
  76                                  <STM32_PINMUX('B', 7,  AF13)>,/* DCMI_VSYNC */
  77                                  <STM32_PINMUX('A', 6,  AF13)>,/* DCMI_PIXCLK */
  78                                  <STM32_PINMUX('H', 9,  AF13)>,/* DCMI_D0 */
  79                                  <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
  80                                  <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
  81                                  <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
  82                                  <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
  83                                  <STM32_PINMUX('I', 4,  AF13)>,/* DCMI_D5 */
  84                                  <STM32_PINMUX('B', 8,  AF13)>,/* DCMI_D6 */
  85                                  <STM32_PINMUX('E', 6,  AF13)>,/* DCMI_D7 */
  86                                  <STM32_PINMUX('I', 1,  AF13)>,/* DCMI_D8 */
  87                                  <STM32_PINMUX('H', 7,  AF13)>,/* DCMI_D9 */
  88                                  <STM32_PINMUX('I', 3,  AF13)>,/* DCMI_D10 */
  89                                  <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
  90                         bias-disable;
  91                 };
  92         };
  93
  94         dcmi_sleep_pins_a: dcmi-sleep-0 {
  95                 pins {
  96                         pinmux = <STM32_PINMUX('H', 8,  ANALOG)>,/* DCMI_HSYNC */
  97                                  <STM32_PINMUX('B', 7,  ANALOG)>,/* DCMI_VSYNC */
  98                                  <STM32_PINMUX('A', 6,  ANALOG)>,/* DCMI_PIXCLK */
  99                                  <STM32_PINMUX('H', 9,  ANALOG)>,/* DCMI_D0 */
 100                                  <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
 101                                  <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
 102                                  <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
 103                                  <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
 104                                  <STM32_PINMUX('I', 4,  ANALOG)>,/* DCMI_D5 */
 105                                  <STM32_PINMUX('B', 8,  ANALOG)>,/* DCMI_D6 */
 106                                  <STM32_PINMUX('E', 6,  ANALOG)>,/* DCMI_D7 */
 107                                  <STM32_PINMUX('I', 1,  ANALOG)>,/* DCMI_D8 */
 108                                  <STM32_PINMUX('H', 7,  ANALOG)>,/* DCMI_D9 */
 109                                  <STM32_PINMUX('I', 3,  ANALOG)>,/* DCMI_D10 */
 110                                  <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
 111                 };
 112         };
 113
 114         ethernet0_rgmii_pins_a: rgmii-0 {
 115                 pins1 {
 116                         pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
 117                                  <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
 118                                  <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
 119                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
 120                                  <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
 121                                  <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
 122                                  <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
 123                                  <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
 124                         bias-disable;
 125                         drive-push-pull;
 126                         slew-rate = <2>;
 127                 };
 128                 pins2 {
 129                         pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
 130                         bias-disable;
 131                         drive-push-pull;
 132                         slew-rate = <0>;
 133                 };
 134                 pins3 {
 135                         pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
 136                                  <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
 137                                  <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
 138                                  <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
 139                                  <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
 140                                  <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
 141                         bias-disable;
 142                 };
 143         };
 144
 145         ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
 146                 pins1 {
 147                         pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
 148                                  <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
 149                                  <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
 150                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
 151                                  <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
 152                                  <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
 153                                  <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
 154                                  <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
 155                                  <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
 156                                  <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
 157                                  <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
 158                                  <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
 159                                  <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
 160                                  <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
 161                                  <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
 162                 };
 163         };
 164
 165         ethernet0_rgmii_pins_b: rgmii-1 {
 166                 pins1 {
 167                         pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
 168                                  <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
 169                                  <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
 170                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
 171                                  <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
 172                                  <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
 173                                  <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
 174                                  <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
 175                         bias-disable;
 176                         drive-push-pull;
 177                         slew-rate = <2>;
 178                 };
 179                 pins2 {
 180                         pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
 181                         bias-disable;
 182                         drive-push-pull;
 183                         slew-rate = <0>;
 184                 };
 185                 pins3 {
 186                         pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
 187                                  <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
 188                                  <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
 189                                  <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
 190                                  <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
 191                                  <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
 192                         bias-disable;
 193                 };
 194         };
 195
 196         ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 {
 197                 pins1 {
 198                         pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
 199                                  <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
 200                                  <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
 201                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
 202                                  <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
 203                                  <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
 204                                  <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
 205                                  <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
 206                                  <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
 207                                  <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
 208                                  <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
 209                                  <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
 210                                  <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
 211                                  <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
 212                                  <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
 213                  };
 214         };
 215
 216         ethernet0_rgmii_pins_c: rgmii-2 {
 217                 pins1 {
 218                         pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
 219                                  <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
 220                                  <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */
 221                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
 222                                  <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
 223                                  <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
 224                                  <STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */
 225                                  <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
 226                         bias-disable;
 227                         drive-push-pull;
 228                         slew-rate = <2>;
 229                 };
 230                 pins2 {
 231                         pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
 232                         bias-disable;
 233                         drive-push-pull;
 234                         slew-rate = <0>;
 235                 };
 236                 pins3 {
 237                         pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
 238                                  <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
 239                                  <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
 240                                  <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
 241                                  <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
 242                                  <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
 243                         bias-disable;
 244                 };
 245         };
 246
 247         ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
 248                 pins1 {
 249                         pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
 250                                  <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
 251                                  <STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */
 252                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
 253                                  <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
 254                                  <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
 255                                  <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
 256                                  <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
 257                                  <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
 258                                  <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
 259                                  <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
 260                                  <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
 261                                  <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
 262                                  <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
 263                                  <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
 264                 };
 265         };
 266
 267         ethernet0_rmii_pins_a: rmii-0 {
 268                 pins1 {
 269                         pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
 270                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
 271                                  <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
 272                                  <STM32_PINMUX('A', 1, AF0)>,   /* ETH1_RMII_REF_CLK */
 273                                  <STM32_PINMUX('A', 2, AF11)>,  /* ETH1_MDIO */
 274                                  <STM32_PINMUX('C', 1, AF11)>;  /* ETH1_MDC */
 275                         bias-disable;
 276                         drive-push-pull;
 277                         slew-rate = <2>;
 278                 };
 279                 pins2 {
 280                         pinmux = <STM32_PINMUX('C', 4, AF11)>,  /* ETH1_RMII_RXD0 */
 281                                  <STM32_PINMUX('C', 5, AF11)>,  /* ETH1_RMII_RXD1 */
 282                                  <STM32_PINMUX('A', 7, AF11)>;  /* ETH1_RMII_CRS_DV */
 283                         bias-disable;
 284                 };
 285         };
 286
 287         ethernet0_rmii_sleep_pins_a: rmii-sleep-0 {
 288                 pins1 {
 289                         pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
 290                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
 291                                  <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
 292                                  <STM32_PINMUX('A', 2, ANALOG)>,  /* ETH1_MDIO */
 293                                  <STM32_PINMUX('C', 1, ANALOG)>,  /* ETH1_MDC */
 294                                  <STM32_PINMUX('C', 4, ANALOG)>,  /* ETH1_RMII_RXD0 */
 295                                  <STM32_PINMUX('C', 5, ANALOG)>,  /* ETH1_RMII_RXD1 */
 296                                  <STM32_PINMUX('A', 1, ANALOG)>,  /* ETH1_RMII_REF_CLK */
 297                                  <STM32_PINMUX('A', 7, ANALOG)>;  /* ETH1_RMII_CRS_DV */
 298                 };
 299         };
 300
 301         fmc_pins_a: fmc-0 {
 302                 pins1 {
 303                         pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
 304                                  <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
 305                                  <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
 306                                  <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
 307                                  <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
 308                                  <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
 309                                  <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
 310                                  <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
 311                                  <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
 312                                  <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
 313                                  <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
 314                                  <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
 315                                  <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
 316                         bias-disable;
 317                         drive-push-pull;
 318                         slew-rate = <1>;
 319                 };
 320                 pins2 {
 321                         pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
 322                         bias-pull-up;
 323                 };
 324         };
 325
 326         fmc_sleep_pins_a: fmc-sleep-0 {
 327                 pins {
 328                         pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
 329                                  <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
 330                                  <STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */
 331                                  <STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */
 332                                  <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
 333                                  <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
 334                                  <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
 335                                  <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
 336                                  <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
 337                                  <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
 338                                  <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
 339                                  <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
 340                                  <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
 341                                  <STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */
 342                 };
 343         };
 344
 345         i2c1_pins_a: i2c1-0 {
 346                 pins {
 347                         pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
 348                                  <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
 349                         bias-disable;
 350                         drive-open-drain;
 351                         slew-rate = <0>;
 352                 };
 353         };
 354
 355         i2c1_sleep_pins_a: i2c1-sleep-0 {
 356                 pins {
 357                         pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
 358                                  <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
 359                 };
 360         };
 361
 362         i2c1_pins_b: i2c1-1 {
 363                 pins {
 364                         pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
 365                                  <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
 366                         bias-disable;
 367                         drive-open-drain;
 368                         slew-rate = <0>;
 369                 };
 370         };
 371
 372         i2c1_sleep_pins_b: i2c1-sleep-1 {
 373                 pins {
 374                         pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
 375                                  <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
 376                 };
 377         };
 378
 379         i2c2_pins_a: i2c2-0 {
 380                 pins {
 381                         pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
 382                                  <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
 383                         bias-disable;
 384                         drive-open-drain;
 385                         slew-rate = <0>;
 386                 };
 387         };
 388
 389         i2c2_sleep_pins_a: i2c2-sleep-0 {
 390                 pins {
 391                         pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
 392                                  <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
 393                 };
 394         };
 395
 396         i2c2_pins_b1: i2c2-1 {
 397                 pins {
 398                         pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
 399                         bias-disable;
 400                         drive-open-drain;
 401                         slew-rate = <0>;
 402                 };
 403         };
 404
 405         i2c2_sleep_pins_b1: i2c2-sleep-1 {
 406                 pins {
 407                         pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
 408                 };
 409         };
 410
 411         i2c5_pins_a: i2c5-0 {
 412                 pins {
 413                         pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
 414                                  <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
 415                         bias-disable;
 416                         drive-open-drain;
 417                         slew-rate = <0>;
 418                 };
 419         };
 420
 421         i2c5_sleep_pins_a: i2c5-sleep-0 {
 422                 pins {
 423                         pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
 424                                  <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */
 425
 426                 };
 427         };
 428
 429         i2c5_pins_b: i2c5-1 {
 430                 pins {
 431                         pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */
 432                                  <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */
 433                         bias-disable;
 434                         drive-open-drain;
 435                         slew-rate = <0>;
 436                 };
 437         };
 438
 439         i2c5_sleep_pins_b: i2c5-sleep-1 {
 440                 pins {
 441                         pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */
 442                                  <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */
 443                 };
 444         };
 445
 446         i2s2_pins_a: i2s2-0 {
 447                 pins {
 448                         pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
 449                                  <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
 450                                  <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
 451                         slew-rate = <1>;
 452                         drive-push-pull;
 453                         bias-disable;
 454                 };
 455         };
 456
 457         i2s2_sleep_pins_a: i2s2-sleep-0 {
 458                 pins {
 459                         pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
 460                                  <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
 461                                  <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
 462                 };
 463         };
 464
 465         ltdc_pins_a: ltdc-0 {
 466                 pins {
 467                         pinmux = <STM32_PINMUX('G',  7, AF14)>, /* LCD_CLK */
 468                                  <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
 469                                  <STM32_PINMUX('I',  9, AF14)>, /* LCD_VSYNC */
 470                                  <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
 471                                  <STM32_PINMUX('H',  2, AF14)>, /* LCD_R0 */
 472                                  <STM32_PINMUX('H',  3, AF14)>, /* LCD_R1 */
 473                                  <STM32_PINMUX('H',  8, AF14)>, /* LCD_R2 */
 474                                  <STM32_PINMUX('H',  9, AF14)>, /* LCD_R3 */
 475                                  <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
 476                                  <STM32_PINMUX('C',  0, AF14)>, /* LCD_R5 */
 477                                  <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
 478                                  <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
 479                                  <STM32_PINMUX('E',  5, AF14)>, /* LCD_G0 */
 480                                  <STM32_PINMUX('E',  6, AF14)>, /* LCD_G1 */
 481                                  <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
 482                                  <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
 483                                  <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
 484                                  <STM32_PINMUX('I',  0, AF14)>, /* LCD_G5 */
 485                                  <STM32_PINMUX('I',  1, AF14)>, /* LCD_G6 */
 486                                  <STM32_PINMUX('I',  2, AF14)>, /* LCD_G7 */
 487                                  <STM32_PINMUX('D',  9, AF14)>, /* LCD_B0 */
 488                                  <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
 489                                  <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
 490                                  <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
 491                                  <STM32_PINMUX('I',  4, AF14)>, /* LCD_B4 */
 492                                  <STM32_PINMUX('A',  3, AF14)>, /* LCD_B5 */
 493                                  <STM32_PINMUX('B',  8, AF14)>, /* LCD_B6 */
 494                                  <STM32_PINMUX('D',  8, AF14)>; /* LCD_B7 */
 495                         bias-disable;
 496                         drive-push-pull;
 497                         slew-rate = <1>;
 498                 };
 499         };
 500
 501         ltdc_sleep_pins_a: ltdc-sleep-0 {
 502                 pins {
 503                         pinmux = <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_CLK */
 504                                  <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
 505                                  <STM32_PINMUX('I',  9, ANALOG)>, /* LCD_VSYNC */
 506                                  <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
 507                                  <STM32_PINMUX('H',  2, ANALOG)>, /* LCD_R0 */
 508                                  <STM32_PINMUX('H',  3, ANALOG)>, /* LCD_R1 */
 509                                  <STM32_PINMUX('H',  8, ANALOG)>, /* LCD_R2 */
 510                                  <STM32_PINMUX('H',  9, ANALOG)>, /* LCD_R3 */
 511                                  <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
 512                                  <STM32_PINMUX('C',  0, ANALOG)>, /* LCD_R5 */
 513                                  <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
 514                                  <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
 515                                  <STM32_PINMUX('E',  5, ANALOG)>, /* LCD_G0 */
 516                                  <STM32_PINMUX('E',  6, ANALOG)>, /* LCD_G1 */
 517                                  <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
 518                                  <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
 519                                  <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
 520                                  <STM32_PINMUX('I',  0, ANALOG)>, /* LCD_G5 */
 521                                  <STM32_PINMUX('I',  1, ANALOG)>, /* LCD_G6 */
 522                                  <STM32_PINMUX('I',  2, ANALOG)>, /* LCD_G7 */
 523                                  <STM32_PINMUX('D',  9, ANALOG)>, /* LCD_B0 */
 524                                  <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
 525                                  <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
 526                                  <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
 527                                  <STM32_PINMUX('I',  4, ANALOG)>, /* LCD_B4 */
 528                                  <STM32_PINMUX('A',  3, ANALOG)>, /* LCD_B5 */
 529                                  <STM32_PINMUX('B',  8, ANALOG)>, /* LCD_B6 */
 530                                  <STM32_PINMUX('D',  8, ANALOG)>; /* LCD_B7 */
 531                 };
 532         };
 533
 534         ltdc_pins_b: ltdc-1 {
 535                 pins {
 536                         pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
 537                                  <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
 538                                  <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
 539                                  <STM32_PINMUX('K',  7, AF14)>, /* LCD_DE */
 540                                  <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
 541                                  <STM32_PINMUX('J',  0, AF14)>, /* LCD_R1 */
 542                                  <STM32_PINMUX('J',  1, AF14)>, /* LCD_R2 */
 543                                  <STM32_PINMUX('J',  2, AF14)>, /* LCD_R3 */
 544                                  <STM32_PINMUX('J',  3, AF14)>, /* LCD_R4 */
 545                                  <STM32_PINMUX('J',  4, AF14)>, /* LCD_R5 */
 546                                  <STM32_PINMUX('J',  5, AF14)>, /* LCD_R6 */
 547                                  <STM32_PINMUX('J',  6, AF14)>, /* LCD_R7 */
 548                                  <STM32_PINMUX('J',  7, AF14)>, /* LCD_G0 */
 549                                  <STM32_PINMUX('J',  8, AF14)>, /* LCD_G1 */
 550                                  <STM32_PINMUX('J',  9, AF14)>, /* LCD_G2 */
 551                                  <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
 552                                  <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
 553                                  <STM32_PINMUX('K',  0, AF14)>, /* LCD_G5 */
 554                                  <STM32_PINMUX('K',  1, AF14)>, /* LCD_G6 */
 555                                  <STM32_PINMUX('K',  2, AF14)>, /* LCD_G7 */
 556                                  <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
 557                                  <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
 558                                  <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
 559                                  <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
 560                                  <STM32_PINMUX('K',  3, AF14)>, /* LCD_B4 */
 561                                  <STM32_PINMUX('K',  4, AF14)>, /* LCD_B5 */
 562                                  <STM32_PINMUX('K',  5, AF14)>, /* LCD_B6 */
 563                                  <STM32_PINMUX('K',  6, AF14)>; /* LCD_B7 */
 564                         bias-disable;
 565                         drive-push-pull;
 566                         slew-rate = <1>;
 567                 };
 568         };
 569
 570         ltdc_sleep_pins_b: ltdc-sleep-1 {
 571                 pins {
 572                         pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
 573                                  <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
 574                                  <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
 575                                  <STM32_PINMUX('K',  7, ANALOG)>, /* LCD_DE */
 576                                  <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
 577                                  <STM32_PINMUX('J',  0, ANALOG)>, /* LCD_R1 */
 578                                  <STM32_PINMUX('J',  1, ANALOG)>, /* LCD_R2 */
 579                                  <STM32_PINMUX('J',  2, ANALOG)>, /* LCD_R3 */
 580                                  <STM32_PINMUX('J',  3, ANALOG)>, /* LCD_R4 */
 581                                  <STM32_PINMUX('J',  4, ANALOG)>, /* LCD_R5 */
 582                                  <STM32_PINMUX('J',  5, ANALOG)>, /* LCD_R6 */
 583                                  <STM32_PINMUX('J',  6, ANALOG)>, /* LCD_R7 */
 584                                  <STM32_PINMUX('J',  7, ANALOG)>, /* LCD_G0 */
 585                                  <STM32_PINMUX('J',  8, ANALOG)>, /* LCD_G1 */
 586                                  <STM32_PINMUX('J',  9, ANALOG)>, /* LCD_G2 */
 587                                  <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
 588                                  <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
 589                                  <STM32_PINMUX('K',  0, ANALOG)>, /* LCD_G5 */
 590                                  <STM32_PINMUX('K',  1, ANALOG)>, /* LCD_G6 */
 591                                  <STM32_PINMUX('K',  2, ANALOG)>, /* LCD_G7 */
 592                                  <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
 593                                  <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
 594                                  <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
 595                                  <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
 596                                  <STM32_PINMUX('K',  3, ANALOG)>, /* LCD_B4 */
 597                                  <STM32_PINMUX('K',  4, ANALOG)>, /* LCD_B5 */
 598                                  <STM32_PINMUX('K',  5, ANALOG)>, /* LCD_B6 */
 599                                  <STM32_PINMUX('K',  6, ANALOG)>; /* LCD_B7 */
 600                 };
 601         };
 602
 603         ltdc_pins_c: ltdc-2 {
 604                 pins1 {
 605                         pinmux = <STM32_PINMUX('B',  1, AF9)>,  /* LTDC_R6 */
 606                                  <STM32_PINMUX('B',  9, AF14)>, /* LTDC_B7 */
 607                                  <STM32_PINMUX('C',  0, AF14)>, /* LTDC_R5 */
 608                                  <STM32_PINMUX('D',  3, AF14)>, /* LTDC_G7 */
 609                                  <STM32_PINMUX('D',  6, AF14)>, /* LTDC_B2 */
 610                                  <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
 611                                  <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */
 612                                  <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
 613                                  <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */
 614                                  <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
 615                                  <STM32_PINMUX('H',  4, AF9)>,  /* LTDC_G5 */
 616                                  <STM32_PINMUX('H',  8, AF14)>, /* LTDC_R2 */
 617                                  <STM32_PINMUX('H',  9, AF14)>, /* LTDC_R3 */
 618                                  <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
 619                                  <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
 620                                  <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
 621                                  <STM32_PINMUX('I',  1, AF14)>, /* LTDC_G6 */
 622                                  <STM32_PINMUX('I',  5, AF14)>, /* LTDC_B5 */
 623                                  <STM32_PINMUX('I',  6, AF14)>, /* LTDC_B6 */
 624                                  <STM32_PINMUX('I',  9, AF14)>, /* LTDC_VSYNC */
 625                                  <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
 626                         bias-disable;
 627                         drive-push-pull;
 628                         slew-rate = <0>;
 629                 };
 630                 pins2 {
 631                         pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
 632                         bias-disable;
 633                         drive-push-pull;
 634                         slew-rate = <1>;
 635                 };
 636         };
 637
 638         ltdc_sleep_pins_c: ltdc-sleep-2 {
 639                 pins1 {
 640                         pinmux = <STM32_PINMUX('B', 1, ANALOG)>,  /* LTDC_R6 */
 641                                  <STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */
 642                                  <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */
 643                                  <STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */
 644                                  <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */
 645                                  <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
 646                                  <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */
 647                                  <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
 648                                  <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */
 649                                  <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
 650                                  <STM32_PINMUX('H', 4, ANALOG)>,  /* LTDC_G5 */
 651                                  <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */
 652                                  <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */
 653                                  <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
 654                                  <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
 655                                  <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */
 656                                  <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */
 657                                  <STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */
 658                                  <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */
 659                                  <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */
 660                                  <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */
 661                                  <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */
 662                 };
 663         };
 664
 665         ltdc_pins_d: ltdc-3 {
 666                 pins1 {
 667                         pinmux = <STM32_PINMUX('G',  7, AF14)>; /* LCD_CLK */
 668                         bias-disable;
 669                         drive-push-pull;
 670                         slew-rate = <3>;
 671                 };
 672                 pins2 {
 673                         pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
 674                                  <STM32_PINMUX('I',  9, AF14)>, /* LCD_VSYNC */
 675                                  <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */
 676                                  <STM32_PINMUX('G', 13, AF14)>, /* LCD_R0 */
 677                                  <STM32_PINMUX('H',  3, AF14)>, /* LCD_R1 */
 678                                  <STM32_PINMUX('H',  8, AF14)>, /* LCD_R2 */
 679                                  <STM32_PINMUX('H',  9, AF14)>, /* LCD_R3 */
 680                                  <STM32_PINMUX('A',  5, AF14)>, /* LCD_R4 */
 681                                  <STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */
 682                                  <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
 683                                  <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
 684                                  <STM32_PINMUX('E',  5, AF14)>, /* LCD_G0 */
 685                                  <STM32_PINMUX('B',  0, AF14)>, /* LCD_G1 */
 686                                  <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
 687                                  <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */
 688                                  <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
 689                                  <STM32_PINMUX('H',  4,  AF9)>, /* LCD_G5 */
 690                                  <STM32_PINMUX('I', 11,  AF9)>, /* LCD_G6 */
 691                                  <STM32_PINMUX('G',  8, AF14)>, /* LCD_G7 */
 692                                  <STM32_PINMUX('D',  9, AF14)>, /* LCD_B0 */
 693                                  <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
 694                                  <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
 695                                  <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
 696                                  <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */
 697                                  <STM32_PINMUX('A',  3, AF14)>, /* LCD_B5 */
 698                                  <STM32_PINMUX('B',  8, AF14)>, /* LCD_B6 */
 699                                  <STM32_PINMUX('I',  7, AF14)>; /* LCD_B7 */
 700                         bias-disable;
 701                         drive-push-pull;
 702                         slew-rate = <2>;
 703                 };
 704         };
 705
 706         ltdc_sleep_pins_d: ltdc-sleep-3 {
 707                 pins {
 708                         pinmux = <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_CLK */
 709                                  <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
 710                                  <STM32_PINMUX('I',  9, ANALOG)>, /* LCD_VSYNC */
 711                                  <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */
 712                                  <STM32_PINMUX('G', 13, ANALOG)>, /* LCD_R0 */
 713                                  <STM32_PINMUX('H',  3, ANALOG)>, /* LCD_R1 */
 714                                  <STM32_PINMUX('H',  8, ANALOG)>, /* LCD_R2 */
 715                                  <STM32_PINMUX('H',  9, ANALOG)>, /* LCD_R3 */
 716                                  <STM32_PINMUX('A',  5, ANALOG)>, /* LCD_R4 */
 717                                  <STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */
 718                                  <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
 719                                  <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
 720                                  <STM32_PINMUX('E',  5, ANALOG)>, /* LCD_G0 */
 721                                  <STM32_PINMUX('B',  0, ANALOG)>, /* LCD_G1 */
 722                                  <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
 723                                  <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */
 724                                  <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
 725                                  <STM32_PINMUX('H',  4, ANALOG)>, /* LCD_G5 */
 726                                  <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */
 727                                  <STM32_PINMUX('G',  8, ANALOG)>, /* LCD_G7 */
 728                                  <STM32_PINMUX('D',  9, ANALOG)>, /* LCD_B0 */
 729                                  <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
 730                                  <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
 731                                  <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
 732                                  <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */
 733                                  <STM32_PINMUX('A',  3, ANALOG)>, /* LCD_B5 */
 734                                  <STM32_PINMUX('B',  8, ANALOG)>, /* LCD_B6 */
 735                                  <STM32_PINMUX('I',  7, ANALOG)>; /* LCD_B7 */
 736                 };
 737         };
 738
 739         m_can1_pins_a: m-can1-0 {
 740                 pins1 {
 741                         pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
 742                         slew-rate = <1>;
 743                         drive-push-pull;
 744                         bias-disable;
 745                 };
 746                 pins2 {
 747                         pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
 748                         bias-disable;
 749                 };
 750         };
 751
 752         m_can1_sleep_pins_a: m_can1-sleep-0 {
 753                 pins {
 754                         pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
 755                                  <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
 756                 };
 757         };
 758
 759         pwm1_pins_a: pwm1-0 {
 760                 pins {
 761                         pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
 762                                  <STM32_PINMUX('E', 11, AF1)>, /* TIM1_CH2 */
 763                                  <STM32_PINMUX('E', 14, AF1)>; /* TIM1_CH4 */
 764                         bias-pull-down;
 765                         drive-push-pull;
 766                         slew-rate = <0>;
 767                 };
 768         };
 769
 770         pwm1_sleep_pins_a: pwm1-sleep-0 {
 771                 pins {
 772                         pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
 773                                  <STM32_PINMUX('E', 11, ANALOG)>, /* TIM1_CH2 */
 774                                  <STM32_PINMUX('E', 14, ANALOG)>; /* TIM1_CH4 */
 775                 };
 776         };
 777
 778         pwm2_pins_a: pwm2-0 {
 779                 pins {
 780                         pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
 781                         bias-pull-down;
 782                         drive-push-pull;
 783                         slew-rate = <0>;
 784                 };
 785         };
 786
 787         pwm2_sleep_pins_a: pwm2-sleep-0 {
 788                 pins {
 789                         pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */
 790                 };
 791         };
 792
 793         pwm3_pins_a: pwm3-0 {
 794                 pins {
 795                         pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */
 796                         bias-pull-down;
 797                         drive-push-pull;
 798                         slew-rate = <0>;
 799                 };
 800         };
 801
 802         pwm3_sleep_pins_a: pwm3-sleep-0 {
 803                 pins {
 804                         pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */
 805                 };
 806         };
 807
 808         pwm3_pins_b: pwm3-1 {
 809                 pins {
 810                         pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
 811                         bias-disable;
 812                         drive-push-pull;
 813                         slew-rate = <0>;
 814                 };
 815         };
 816
 817         pwm3_sleep_pins_b: pwm3-sleep-1 {
 818                 pins {
 819                         pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
 820                 };
 821         };
 822
 823         pwm4_pins_a: pwm4-0 {
 824                 pins {
 825                         pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */
 826                                  <STM32_PINMUX('D', 15, AF2)>; /* TIM4_CH4 */
 827                         bias-pull-down;
 828                         drive-push-pull;
 829                         slew-rate = <0>;
 830                 };
 831         };
 832
 833         pwm4_sleep_pins_a: pwm4-sleep-0 {
 834                 pins {
 835                         pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */
 836                                  <STM32_PINMUX('D', 15, ANALOG)>; /* TIM4_CH4 */
 837                 };
 838         };
 839
 840         pwm4_pins_b: pwm4-1 {
 841                 pins {
 842                         pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
 843                         bias-pull-down;
 844                         drive-push-pull;
 845                         slew-rate = <0>;
 846                 };
 847         };
 848
 849         pwm4_sleep_pins_b: pwm4-sleep-1 {
 850                 pins {
 851                         pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
 852                 };
 853         };
 854
 855         pwm5_pins_a: pwm5-0 {
 856                 pins {
 857                         pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */
 858                         bias-pull-down;
 859                         drive-push-pull;
 860                         slew-rate = <0>;
 861                 };
 862         };
 863
 864         pwm5_sleep_pins_a: pwm5-sleep-0 {
 865                 pins {
 866                         pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */
 867                 };
 868         };
 869
 870         pwm5_pins_b: pwm5-1 {
 871                 pins {
 872                         pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */
 873                                  <STM32_PINMUX('H', 12, AF2)>, /* TIM5_CH3 */
 874                                  <STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */
 875                         bias-disable;
 876                         drive-push-pull;
 877                         slew-rate = <0>;
 878                 };
 879         };
 880
 881         pwm5_sleep_pins_b: pwm5-sleep-1 {
 882                 pins {
 883                         pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */
 884                                  <STM32_PINMUX('H', 12, ANALOG)>, /* TIM5_CH3 */
 885                                  <STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */
 886                 };
 887         };
 888
 889         pwm8_pins_a: pwm8-0 {
 890                 pins {
 891                         pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
 892                         bias-pull-down;
 893                         drive-push-pull;
 894                         slew-rate = <0>;
 895                 };
 896         };
 897
 898         pwm8_sleep_pins_a: pwm8-sleep-0 {
 899                 pins {
 900                         pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */
 901                 };
 902         };
 903
 904         pwm12_pins_a: pwm12-0 {
 905                 pins {
 906                         pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
 907                         bias-pull-down;
 908                         drive-push-pull;
 909                         slew-rate = <0>;
 910                 };
 911         };
 912
 913         pwm12_sleep_pins_a: pwm12-sleep-0 {
 914                 pins {
 915                         pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
 916                 };
 917         };
 918
 919         qspi_clk_pins_a: qspi-clk-0 {
 920                 pins {
 921                         pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
 922                         bias-disable;
 923                         drive-push-pull;
 924                         slew-rate = <3>;
 925                 };
 926         };
 927
 928         qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
 929                 pins {
 930                         pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
 931                 };
 932         };
 933
 934         qspi_bk1_pins_a: qspi-bk1-0 {
 935                 pins1 {
 936                         pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
 937                                  <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
 938                                  <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
 939                                  <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
 940                         bias-disable;
 941                         drive-push-pull;
 942                         slew-rate = <1>;
 943                 };
 944                 pins2 {
 945                         pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
 946                         bias-pull-up;
 947                         drive-push-pull;
 948                         slew-rate = <1>;
 949                 };
 950         };
 951
 952         qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
 953                 pins {
 954                         pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
 955                                  <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
 956                                  <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
 957                                  <STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */
 958                                  <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
 959                 };
 960         };
 961
 962         qspi_bk2_pins_a: qspi-bk2-0 {
 963                 pins1 {
 964                         pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
 965                                  <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
 966                                  <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
 967                                  <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
 968                         bias-disable;
 969                         drive-push-pull;
 970                         slew-rate = <1>;
 971                 };
 972                 pins2 {
 973                         pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
 974                         bias-pull-up;
 975                         drive-push-pull;
 976                         slew-rate = <1>;
 977                 };
 978         };
 979
 980         qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
 981                 pins {
 982                         pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
 983                                  <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
 984                                  <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
 985                                  <STM32_PINMUX('G', 7, ANALOG)>, /* QSPI_BK2_IO3 */
 986                                  <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
 987                 };
 988         };
 989
 990         sai2a_pins_a: sai2a-0 {
 991                 pins {
 992                         pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
 993                                  <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
 994                                  <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
 995                                  <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
 996                         slew-rate = <0>;
 997                         drive-push-pull;
 998                         bias-disable;
 999                 };
1000         };
1001
1002         sai2a_sleep_pins_a: sai2a-sleep-0 {
1003                 pins {
1004                         pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
1005                                  <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1006                                  <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
1007                                  <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
1008                 };
1009         };
1010
1011
1012         sai2a_pins_b: sai2a-1 {
1013                 pins1 {
1014                         pinmux = <STM32_PINMUX('I', 6, AF10)>,  /* SAI2_SD_A */
1015                                  <STM32_PINMUX('I', 7, AF10)>,  /* SAI2_FS_A */
1016                                  <STM32_PINMUX('D', 13, AF10)>; /* SAI2_SCK_A */
1017                         slew-rate = <0>;
1018                         drive-push-pull;
1019                         bias-disable;
1020                 };
1021         };
1022
1023         sai2a_sleep_pins_b: sai2a-sleep-1 {
1024                 pins {
1025                         pinmux = <STM32_PINMUX('I', 6, ANALOG)>,  /* SAI2_SD_A */
1026                                  <STM32_PINMUX('I', 7, ANALOG)>,  /* SAI2_FS_A */
1027                                  <STM32_PINMUX('D', 13, ANALOG)>; /* SAI2_SCK_A */
1028                 };
1029         };
1030
1031         sai2b_pins_a: sai2b-0 {
1032                 pins1 {
1033                         pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
1034                                  <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
1035                                  <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
1036                         slew-rate = <0>;
1037                         drive-push-pull;
1038                         bias-disable;
1039                 };
1040                 pins2 {
1041                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1042                         bias-disable;
1043                 };
1044         };
1045
1046         sai2b_sleep_pins_a: sai2b-sleep-0 {
1047                 pins {
1048                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
1049                                  <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
1050                                  <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
1051                                  <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
1052                 };
1053         };
1054
1055         sai2b_pins_b: sai2b-1 {
1056                 pins {
1057                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1058                         bias-disable;
1059                 };
1060         };
1061
1062         sai2b_sleep_pins_b: sai2b-sleep-1 {
1063                 pins {
1064                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1065                 };
1066         };
1067
1068         sai4a_pins_a: sai4a-0 {
1069                 pins {
1070                         pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
1071                         slew-rate = <0>;
1072                         drive-push-pull;
1073                         bias-disable;
1074                 };
1075         };
1076
1077         sai4a_sleep_pins_a: sai4a-sleep-0 {
1078                 pins {
1079                         pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
1080                 };
1081         };
1082
1083         sdmmc1_b4_pins_a: sdmmc1-b4-0 {
1084                 pins1 {
1085                         pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1086                                  <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1087                                  <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1088                                  <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
1089                                  <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1090                         slew-rate = <1>;
1091                         drive-push-pull;
1092                         bias-disable;
1093                 };
1094                 pins2 {
1095                         pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1096                         slew-rate = <2>;
1097                         drive-push-pull;
1098                         bias-disable;
1099                 };
1100         };
1101
1102         sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
1103                 pins1 {
1104                         pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1105                                  <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1106                                  <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1107                                  <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1108                         slew-rate = <1>;
1109                         drive-push-pull;
1110                         bias-disable;
1111                 };
1112                 pins2 {
1113                         pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1114                         slew-rate = <2>;
1115                         drive-push-pull;
1116                         bias-disable;
1117                 };
1118                 pins3 {
1119                         pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1120                         slew-rate = <1>;
1121                         drive-open-drain;
1122                         bias-disable;
1123                 };
1124         };
1125
1126         sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
1127                 pins {
1128                         pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
1129                                  <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
1130                                  <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
1131                                  <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
1132                                  <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
1133                                  <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
1134                 };
1135         };
1136
1137         sdmmc1_dir_pins_a: sdmmc1-dir-0 {
1138                 pins1 {
1139                         pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1140                                  <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
1141                                  <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1142                         slew-rate = <1>;
1143                         drive-push-pull;
1144                         bias-pull-up;
1145                 };
1146                 pins2{
1147                         pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1148                         bias-pull-up;
1149                 };
1150         };
1151
1152         sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
1153                 pins {
1154                         pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1155                                  <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
1156                                  <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
1157                                  <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
1158                 };
1159         };
1160
1161         sdmmc1_dir_pins_b: sdmmc1-dir-1 {
1162                 pins1 {
1163                         pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1164                                  <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
1165                                  <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1166                         slew-rate = <1>;
1167                         drive-push-pull;
1168                         bias-pull-up;
1169                 };
1170                 pins2{
1171                         pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1172                         bias-pull-up;
1173                 };
1174         };
1175
1176         sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
1177                 pins {
1178                         pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1179                                  <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */
1180                                  <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
1181                                  <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
1182                 };
1183         };
1184
1185         sdmmc2_b4_pins_a: sdmmc2-b4-0 {
1186                 pins1 {
1187                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1188                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1189                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1190                                  <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
1191                                  <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1192                         slew-rate = <1>;
1193                         drive-push-pull;
1194                         bias-pull-up;
1195                 };
1196                 pins2 {
1197                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1198                         slew-rate = <2>;
1199                         drive-push-pull;
1200                         bias-pull-up;
1201                 };
1202         };
1203
1204         sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
1205                 pins1 {
1206                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1207                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1208                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1209                                  <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
1210                         slew-rate = <1>;
1211                         drive-push-pull;
1212                         bias-pull-up;
1213                 };
1214                 pins2 {
1215                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1216                         slew-rate = <2>;
1217                         drive-push-pull;
1218                         bias-pull-up;
1219                 };
1220                 pins3 {
1221                         pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1222                         slew-rate = <1>;
1223                         drive-open-drain;
1224                         bias-pull-up;
1225                 };
1226         };
1227
1228         sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
1229                 pins {
1230                         pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
1231                                  <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
1232                                  <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
1233                                  <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
1234                                  <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
1235                                  <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
1236                 };
1237         };
1238
1239         sdmmc2_b4_pins_b: sdmmc2-b4-1 {
1240                 pins1 {
1241                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1242                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1243                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1244                                  <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
1245                                  <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1246                         slew-rate = <1>;
1247                         drive-push-pull;
1248                         bias-disable;
1249                 };
1250                 pins2 {
1251                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1252                         slew-rate = <2>;
1253                         drive-push-pull;
1254                         bias-disable;
1255                 };
1256         };
1257
1258         sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
1259                 pins1 {
1260                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1261                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1262                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1263                                  <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
1264                         slew-rate = <1>;
1265                         drive-push-pull;
1266                         bias-disable;
1267                 };
1268                 pins2 {
1269                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1270                         slew-rate = <2>;
1271                         drive-push-pull;
1272                         bias-disable;
1273                 };
1274                 pins3 {
1275                         pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1276                         slew-rate = <1>;
1277                         drive-open-drain;
1278                         bias-disable;
1279                 };
1280         };
1281
1282         sdmmc2_d47_pins_a: sdmmc2-d47-0 {
1283                 pins {
1284                         pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1285                                  <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1286                                  <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
1287                                  <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
1288                         slew-rate = <1>;
1289                         drive-push-pull;
1290                         bias-pull-up;
1291                 };
1292         };
1293
1294         sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
1295                 pins {
1296                         pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1297                                  <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1298                                  <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
1299                                  <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
1300                 };
1301         };
1302
1303         sdmmc2_d47_pins_b: sdmmc2-d47-1 {
1304                 pins {
1305                         pinmux = <STM32_PINMUX('A', 8, AF9)>,  /* SDMMC2_D4 */
1306                                  <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1307                                  <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
1308                                  <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1309                         slew-rate = <1>;
1310                         drive-push-pull;
1311                         bias-disable;
1312                 };
1313         };
1314
1315         sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
1316                 pins {
1317                         pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1318                                  <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1319                                  <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
1320                                  <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1321                 };
1322         };
1323
1324         sdmmc2_d47_pins_c: sdmmc2-d47-2 {
1325                 pins {
1326                         pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1327                                  <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
1328                                  <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
1329                                  <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1330                         slew-rate = <1>;
1331                         drive-push-pull;
1332                         bias-pull-up;
1333                 };
1334         };
1335
1336         sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 {
1337                 pins {
1338                         pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1339                                  <STM32_PINMUX('A', 15, ANALOG)>, /* SDMMC2_D5 */
1340                                  <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
1341                                  <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1342                 };
1343         };
1344
1345         sdmmc3_b4_pins_a: sdmmc3-b4-0 {
1346                 pins1 {
1347                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1348                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1349                                  <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
1350                                  <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
1351                                  <STM32_PINMUX('F', 1, AF9)>; /* SDMMC3_CMD */
1352                         slew-rate = <1>;
1353                         drive-push-pull;
1354                         bias-pull-up;
1355                 };
1356                 pins2 {
1357                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1358                         slew-rate = <2>;
1359                         drive-push-pull;
1360                         bias-pull-up;
1361                 };
1362         };
1363
1364         sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
1365                 pins1 {
1366                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1367                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1368                                  <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
1369                                  <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
1370                         slew-rate = <1>;
1371                         drive-push-pull;
1372                         bias-pull-up;
1373                 };
1374                 pins2 {
1375                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1376                         slew-rate = <2>;
1377                         drive-push-pull;
1378                         bias-pull-up;
1379                 };
1380                 pins3 {
1381                         pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */
1382                         slew-rate = <1>;
1383                         drive-open-drain;
1384                         bias-pull-up;
1385                 };
1386         };
1387
1388         sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 {
1389                 pins {
1390                         pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1391                                  <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
1392                                  <STM32_PINMUX('F', 5, ANALOG)>, /* SDMMC3_D2 */
1393                                  <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
1394                                  <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
1395                                  <STM32_PINMUX('F', 1, ANALOG)>; /* SDMMC3_CMD */
1396                 };
1397         };
1398
1399         sdmmc3_b4_pins_b: sdmmc3-b4-1 {
1400                 pins1 {
1401                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1402                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1403                                  <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
1404                                  <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
1405                                  <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
1406                         slew-rate = <1>;
1407                         drive-push-pull;
1408                         bias-pull-up;
1409                 };
1410                 pins2 {
1411                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1412                         slew-rate = <2>;
1413                         drive-push-pull;
1414                         bias-pull-up;
1415                 };
1416         };
1417
1418         sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
1419                 pins1 {
1420                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1421                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1422                                  <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
1423                                  <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
1424                         slew-rate = <1>;
1425                         drive-push-pull;
1426                         bias-pull-up;
1427                 };
1428                 pins2 {
1429                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1430                         slew-rate = <2>;
1431                         drive-push-pull;
1432                         bias-pull-up;
1433                 };
1434                 pins3 {
1435                         pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */
1436                         slew-rate = <1>;
1437                         drive-open-drain;
1438                         bias-pull-up;
1439                 };
1440         };
1441
1442         sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
1443                 pins {
1444                         pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1445                                  <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
1446                                  <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
1447                                  <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
1448                                  <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
1449                                  <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
1450                 };
1451         };
1452
1453         spdifrx_pins_a: spdifrx-0 {
1454                 pins {
1455                         pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
1456                         bias-disable;
1457                 };
1458         };
1459
1460         spdifrx_sleep_pins_a: spdifrx-sleep-0 {
1461                 pins {
1462                         pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
1463                 };
1464         };
1465
1466         usart2_pins_a: usart2-0 {
1467                 pins1 {
1468                         pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
1469                                  <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
1470                         bias-disable;
1471                         drive-push-pull;
1472                         slew-rate = <0>;
1473                 };
1474                 pins2 {
1475                         pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
1476                                  <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
1477                         bias-disable;
1478                 };
1479         };
1480
1481         usart2_sleep_pins_a: usart2-sleep-0 {
1482                 pins {
1483                         pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
1484                                  <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
1485                                  <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
1486                                  <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
1487                 };
1488         };
1489
1490         usart3_pins_a: usart3-0 {
1491                 pins1 {
1492                         pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
1493                         bias-disable;
1494                         drive-push-pull;
1495                         slew-rate = <0>;
1496                 };
1497                 pins2 {
1498                         pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
1499                         bias-disable;
1500                 };
1501         };
1502
1503         uart4_pins_a: uart4-0 {
1504                 pins1 {
1505                         pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
1506                         bias-disable;
1507                         drive-push-pull;
1508                         slew-rate = <0>;
1509                 };
1510                 pins2 {
1511                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1512                         bias-disable;
1513                 };
1514         };
1515
1516         uart4_pins_b: uart4-1 {
1517                 pins1 {
1518                         pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
1519                         bias-disable;
1520                         drive-push-pull;
1521                         slew-rate = <0>;
1522                 };
1523                 pins2 {
1524                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1525                         bias-disable;
1526                 };
1527         };
1528
1529         uart7_pins_a: uart7-0 {
1530                 pins1 {
1531                         pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
1532                         bias-disable;
1533                         drive-push-pull;
1534                         slew-rate = <0>;
1535                 };
1536                 pins2 {
1537                         pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */
1538                                  <STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */
1539                                  <STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */
1540                         bias-disable;
1541                 };
1542         };
1543
1544         uart8_pins_a: uart8-0 {
1545                 pins1 {
1546                         pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
1547                         bias-disable;
1548                         drive-push-pull;
1549                         slew-rate = <0>;
1550                 };
1551                 pins2 {
1552                         pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
1553                         bias-disable;
1554                 };
1555         };
1556
1557         usbotg_hs_pins_a: usbotg-hs-0 {
1558                 pins {
1559                         pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
1560                 };
1561         };
1562
1563         usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
1564                 pins {
1565                         pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
1566                                  <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
1567                 };
1568         };
1569 };
1570
1571 &pinctrl_z {
1572         i2c2_pins_b2: i2c2-0 {
1573                 pins {
1574                         pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
1575                         bias-disable;
1576                         drive-open-drain;
1577                         slew-rate = <0>;
1578                 };
1579         };
1580
1581         i2c2_sleep_pins_b2: i2c2-sleep-0 {
1582                 pins {
1583                         pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
1584                 };
1585         };
1586
1587         i2c4_pins_a: i2c4-0 {
1588                 pins {
1589                         pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
1590                                  <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
1591                         bias-disable;
1592                         drive-open-drain;
1593                         slew-rate = <0>;
1594                 };
1595         };
1596
1597         i2c4_sleep_pins_a: i2c4-sleep-0 {
1598                 pins {
1599                         pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
1600                                  <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
1601                 };
1602         };
1603
1604         spi1_pins_a: spi1-0 {
1605                 pins1 {
1606                         pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
1607                                  <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
1608                         bias-disable;
1609                         drive-push-pull;
1610                         slew-rate = <1>;
1611                 };
1612
1613                 pins2 {
1614                         pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
1615                         bias-disable;
1616                 };
1617         };
1618 };