arch/arm/boot/dts/stm32mp15-pinctrl.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
   2 /*
   3  * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
   4  * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
   5  */
   6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
   7
   8 &pinctrl {
   9         adc1_in6_pins_a: adc1-in6-0 {
  10                 pins {
  11                         pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
  12                 };
  13         };
  14
  15         adc12_ain_pins_a: adc12-ain-0 {
  16                 pins {
  17                         pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
  18                                  <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
  19                                  <STM32_PINMUX('F', 13, ANALOG)>, /* ADC2 in2 */
  20                                  <STM32_PINMUX('F', 14, ANALOG)>; /* ADC2 in6 */
  21                 };
  22         };
  23
  24         adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
  25                 pins {
  26                         pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
  27                                  <STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */
  28                 };
  29         };
  30
  31         cec_pins_a: cec-0 {
  32                 pins {
  33                         pinmux = <STM32_PINMUX('A', 15, AF4)>;
  34                         bias-disable;
  35                         drive-open-drain;
  36                         slew-rate = <0>;
  37                 };
  38         };
  39
  40         cec_sleep_pins_a: cec-sleep-0 {
  41                 pins {
  42                         pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
  43                 };
  44         };
  45
  46         cec_pins_b: cec-1 {
  47                 pins {
  48                         pinmux = <STM32_PINMUX('B', 6, AF5)>;
  49                         bias-disable;
  50                         drive-open-drain;
  51                         slew-rate = <0>;
  52                 };
  53         };
  54
  55         cec_sleep_pins_b: cec-sleep-1 {
  56                 pins {
  57                         pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
  58                 };
  59         };
  60
  61         dac_ch1_pins_a: dac-ch1-0 {
  62                 pins {
  63                         pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
  64                 };
  65         };
  66
  67         dac_ch2_pins_a: dac-ch2-0 {
  68                 pins {
  69                         pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
  70                 };
  71         };
  72
  73         dcmi_pins_a: dcmi-0 {
  74                 pins {
  75                         pinmux = <STM32_PINMUX('H', 8,  AF13)>,/* DCMI_HSYNC */
  76                                  <STM32_PINMUX('B', 7,  AF13)>,/* DCMI_VSYNC */
  77                                  <STM32_PINMUX('A', 6,  AF13)>,/* DCMI_PIXCLK */
  78                                  <STM32_PINMUX('H', 9,  AF13)>,/* DCMI_D0 */
  79                                  <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
  80                                  <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
  81                                  <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
  82                                  <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
  83                                  <STM32_PINMUX('I', 4,  AF13)>,/* DCMI_D5 */
  84                                  <STM32_PINMUX('B', 8,  AF13)>,/* DCMI_D6 */
  85                                  <STM32_PINMUX('E', 6,  AF13)>,/* DCMI_D7 */
  86                                  <STM32_PINMUX('I', 1,  AF13)>,/* DCMI_D8 */
  87                                  <STM32_PINMUX('H', 7,  AF13)>,/* DCMI_D9 */
  88                                  <STM32_PINMUX('I', 3,  AF13)>,/* DCMI_D10 */
  89                                  <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
  90                         bias-disable;
  91                 };
  92         };
  93
  94         dcmi_sleep_pins_a: dcmi-sleep-0 {
  95                 pins {
  96                         pinmux = <STM32_PINMUX('H', 8,  ANALOG)>,/* DCMI_HSYNC */
  97                                  <STM32_PINMUX('B', 7,  ANALOG)>,/* DCMI_VSYNC */
  98                                  <STM32_PINMUX('A', 6,  ANALOG)>,/* DCMI_PIXCLK */
  99                                  <STM32_PINMUX('H', 9,  ANALOG)>,/* DCMI_D0 */
 100                                  <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
 101                                  <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
 102                                  <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
 103                                  <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
 104                                  <STM32_PINMUX('I', 4,  ANALOG)>,/* DCMI_D5 */
 105                                  <STM32_PINMUX('B', 8,  ANALOG)>,/* DCMI_D6 */
 106                                  <STM32_PINMUX('E', 6,  ANALOG)>,/* DCMI_D7 */
 107                                  <STM32_PINMUX('I', 1,  ANALOG)>,/* DCMI_D8 */
 108                                  <STM32_PINMUX('H', 7,  ANALOG)>,/* DCMI_D9 */
 109                                  <STM32_PINMUX('I', 3,  ANALOG)>,/* DCMI_D10 */
 110                                  <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
 111                 };
 112         };
 113
 114         ethernet0_rgmii_pins_a: rgmii-0 {
 115                 pins1 {
 116                         pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
 117                                  <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
 118                                  <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
 119                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
 120                                  <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
 121                                  <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
 122                                  <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
 123                                  <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
 124                         bias-disable;
 125                         drive-push-pull;
 126                         slew-rate = <2>;
 127                 };
 128                 pins2 {
 129                         pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
 130                         bias-disable;
 131                         drive-push-pull;
 132                         slew-rate = <0>;
 133                 };
 134                 pins3 {
 135                         pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
 136                                  <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
 137                                  <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
 138                                  <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
 139                                  <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
 140                                  <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
 141                         bias-disable;
 142                 };
 143         };
 144
 145         ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
 146                 pins1 {
 147                         pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
 148                                  <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
 149                                  <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
 150                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
 151                                  <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
 152                                  <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
 153                                  <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
 154                                  <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
 155                                  <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
 156                                  <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
 157                                  <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
 158                                  <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
 159                                  <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
 160                                  <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
 161                                  <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
 162                 };
 163         };
 164
 165         ethernet0_rgmii_pins_b: rgmii-1 {
 166                 pins1 {
 167                         pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
 168                                  <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
 169                                  <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
 170                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
 171                                  <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
 172                                  <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
 173                                  <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
 174                                  <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
 175                         bias-disable;
 176                         drive-push-pull;
 177                         slew-rate = <2>;
 178                 };
 179                 pins2 {
 180                         pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
 181                         bias-disable;
 182                         drive-push-pull;
 183                         slew-rate = <0>;
 184                 };
 185                 pins3 {
 186                         pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
 187                                  <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
 188                                  <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
 189                                  <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
 190                                  <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
 191                                  <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
 192                         bias-disable;
 193                 };
 194         };
 195
 196         ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 {
 197                 pins1 {
 198                         pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
 199                                  <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
 200                                  <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
 201                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
 202                                  <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
 203                                  <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
 204                                  <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
 205                                  <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
 206                                  <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
 207                                  <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
 208                                  <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
 209                                  <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
 210                                  <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
 211                                  <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
 212                                  <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
 213                  };
 214         };
 215
 216         ethernet0_rgmii_pins_c: rgmii-2 {
 217                 pins1 {
 218                         pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
 219                                  <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
 220                                  <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */
 221                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
 222                                  <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
 223                                  <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
 224                                  <STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */
 225                                  <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
 226                         bias-disable;
 227                         drive-push-pull;
 228                         slew-rate = <2>;
 229                 };
 230                 pins2 {
 231                         pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
 232                         bias-disable;
 233                         drive-push-pull;
 234                         slew-rate = <0>;
 235                 };
 236                 pins3 {
 237                         pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
 238                                  <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
 239                                  <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
 240                                  <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
 241                                  <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
 242                                  <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
 243                         bias-disable;
 244                 };
 245         };
 246
 247         ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
 248                 pins1 {
 249                         pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
 250                                  <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
 251                                  <STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */
 252                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
 253                                  <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
 254                                  <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
 255                                  <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
 256                                  <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
 257                                  <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
 258                                  <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
 259                                  <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
 260                                  <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
 261                                  <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
 262                                  <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
 263                                  <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
 264                 };
 265         };
 266
 267         ethernet0_rmii_pins_a: rmii-0 {
 268                 pins1 {
 269                         pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
 270                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
 271                                  <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
 272                                  <STM32_PINMUX('A', 1, AF0)>,   /* ETH1_RMII_REF_CLK */
 273                                  <STM32_PINMUX('A', 2, AF11)>,  /* ETH1_MDIO */
 274                                  <STM32_PINMUX('C', 1, AF11)>;  /* ETH1_MDC */
 275                         bias-disable;
 276                         drive-push-pull;
 277                         slew-rate = <2>;
 278                 };
 279                 pins2 {
 280                         pinmux = <STM32_PINMUX('C', 4, AF11)>,  /* ETH1_RMII_RXD0 */
 281                                  <STM32_PINMUX('C', 5, AF11)>,  /* ETH1_RMII_RXD1 */
 282                                  <STM32_PINMUX('A', 7, AF11)>;  /* ETH1_RMII_CRS_DV */
 283                         bias-disable;
 284                 };
 285         };
 286
 287         ethernet0_rmii_sleep_pins_a: rmii-sleep-0 {
 288                 pins1 {
 289                         pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
 290                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
 291                                  <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
 292                                  <STM32_PINMUX('A', 2, ANALOG)>,  /* ETH1_MDIO */
 293                                  <STM32_PINMUX('C', 1, ANALOG)>,  /* ETH1_MDC */
 294                                  <STM32_PINMUX('C', 4, ANALOG)>,  /* ETH1_RMII_RXD0 */
 295                                  <STM32_PINMUX('C', 5, ANALOG)>,  /* ETH1_RMII_RXD1 */
 296                                  <STM32_PINMUX('A', 1, ANALOG)>,  /* ETH1_RMII_REF_CLK */
 297                                  <STM32_PINMUX('A', 7, ANALOG)>;  /* ETH1_RMII_CRS_DV */
 298                 };
 299         };
 300
 301         fmc_pins_a: fmc-0 {
 302                 pins1 {
 303                         pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
 304                                  <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
 305                                  <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
 306                                  <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
 307                                  <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
 308                                  <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
 309                                  <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
 310                                  <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
 311                                  <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
 312                                  <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
 313                                  <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
 314                                  <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
 315                                  <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
 316                         bias-disable;
 317                         drive-push-pull;
 318                         slew-rate = <1>;
 319                 };
 320                 pins2 {
 321                         pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
 322                         bias-pull-up;
 323                 };
 324         };
 325
 326         fmc_sleep_pins_a: fmc-sleep-0 {
 327                 pins {
 328                         pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
 329                                  <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
 330                                  <STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */
 331                                  <STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */
 332                                  <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
 333                                  <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
 334                                  <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
 335                                  <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
 336                                  <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
 337                                  <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
 338                                  <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
 339                                  <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
 340                                  <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
 341                                  <STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */
 342                 };
 343         };
 344
 345         i2c1_pins_a: i2c1-0 {
 346                 pins {
 347                         pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
 348                                  <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
 349                         bias-disable;
 350                         drive-open-drain;
 351                         slew-rate = <0>;
 352                 };
 353         };
 354
 355         i2c1_sleep_pins_a: i2c1-sleep-0 {
 356                 pins {
 357                         pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
 358                                  <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
 359                 };
 360         };
 361
 362         i2c1_pins_b: i2c1-1 {
 363                 pins {
 364                         pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
 365                                  <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
 366                         bias-disable;
 367                         drive-open-drain;
 368                         slew-rate = <0>;
 369                 };
 370         };
 371
 372         i2c1_sleep_pins_b: i2c1-sleep-1 {
 373                 pins {
 374                         pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
 375                                  <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
 376                 };
 377         };
 378
 379         i2c2_pins_a: i2c2-0 {
 380                 pins {
 381                         pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
 382                                  <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
 383                         bias-disable;
 384                         drive-open-drain;
 385                         slew-rate = <0>;
 386                 };
 387         };
 388
 389         i2c2_sleep_pins_a: i2c2-sleep-0 {
 390                 pins {
 391                         pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
 392                                  <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
 393                 };
 394         };
 395
 396         i2c2_pins_b1: i2c2-1 {
 397                 pins {
 398                         pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
 399                         bias-disable;
 400                         drive-open-drain;
 401                         slew-rate = <0>;
 402                 };
 403         };
 404
 405         i2c2_sleep_pins_b1: i2c2-sleep-1 {
 406                 pins {
 407                         pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
 408                 };
 409         };
 410
 411         i2c2_pins_c: i2c2-2 {
 412                 pins {
 413                         pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
 414                                  <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
 415                         bias-disable;
 416                         drive-open-drain;
 417                         slew-rate = <0>;
 418                 };
 419         };
 420
 421         i2c2_pins_sleep_c: i2c2-sleep-2 {
 422                 pins {
 423                         pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
 424                                  <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
 425                 };
 426         };
 427
 428         i2c5_pins_a: i2c5-0 {
 429                 pins {
 430                         pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
 431                                  <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
 432                         bias-disable;
 433                         drive-open-drain;
 434                         slew-rate = <0>;
 435                 };
 436         };
 437
 438         i2c5_sleep_pins_a: i2c5-sleep-0 {
 439                 pins {
 440                         pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
 441                                  <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */
 442
 443                 };
 444         };
 445
 446         i2c5_pins_b: i2c5-1 {
 447                 pins {
 448                         pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */
 449                                  <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */
 450                         bias-disable;
 451                         drive-open-drain;
 452                         slew-rate = <0>;
 453                 };
 454         };
 455
 456         i2c5_sleep_pins_b: i2c5-sleep-1 {
 457                 pins {
 458                         pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */
 459                                  <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */
 460                 };
 461         };
 462
 463         i2s2_pins_a: i2s2-0 {
 464                 pins {
 465                         pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
 466                                  <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
 467                                  <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
 468                         slew-rate = <1>;
 469                         drive-push-pull;
 470                         bias-disable;
 471                 };
 472         };
 473
 474         i2s2_sleep_pins_a: i2s2-sleep-0 {
 475                 pins {
 476                         pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
 477                                  <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
 478                                  <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
 479                 };
 480         };
 481
 482         ltdc_pins_a: ltdc-0 {
 483                 pins {
 484                         pinmux = <STM32_PINMUX('G',  7, AF14)>, /* LCD_CLK */
 485                                  <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
 486                                  <STM32_PINMUX('I',  9, AF14)>, /* LCD_VSYNC */
 487                                  <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
 488                                  <STM32_PINMUX('H',  2, AF14)>, /* LCD_R0 */
 489                                  <STM32_PINMUX('H',  3, AF14)>, /* LCD_R1 */
 490                                  <STM32_PINMUX('H',  8, AF14)>, /* LCD_R2 */
 491                                  <STM32_PINMUX('H',  9, AF14)>, /* LCD_R3 */
 492                                  <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
 493                                  <STM32_PINMUX('C',  0, AF14)>, /* LCD_R5 */
 494                                  <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
 495                                  <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
 496                                  <STM32_PINMUX('E',  5, AF14)>, /* LCD_G0 */
 497                                  <STM32_PINMUX('E',  6, AF14)>, /* LCD_G1 */
 498                                  <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
 499                                  <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
 500                                  <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
 501                                  <STM32_PINMUX('I',  0, AF14)>, /* LCD_G5 */
 502                                  <STM32_PINMUX('I',  1, AF14)>, /* LCD_G6 */
 503                                  <STM32_PINMUX('I',  2, AF14)>, /* LCD_G7 */
 504                                  <STM32_PINMUX('D',  9, AF14)>, /* LCD_B0 */
 505                                  <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
 506                                  <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
 507                                  <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
 508                                  <STM32_PINMUX('I',  4, AF14)>, /* LCD_B4 */
 509                                  <STM32_PINMUX('A',  3, AF14)>, /* LCD_B5 */
 510                                  <STM32_PINMUX('B',  8, AF14)>, /* LCD_B6 */
 511                                  <STM32_PINMUX('D',  8, AF14)>; /* LCD_B7 */
 512                         bias-disable;
 513                         drive-push-pull;
 514                         slew-rate = <1>;
 515                 };
 516         };
 517
 518         ltdc_sleep_pins_a: ltdc-sleep-0 {
 519                 pins {
 520                         pinmux = <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_CLK */
 521                                  <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
 522                                  <STM32_PINMUX('I',  9, ANALOG)>, /* LCD_VSYNC */
 523                                  <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
 524                                  <STM32_PINMUX('H',  2, ANALOG)>, /* LCD_R0 */
 525                                  <STM32_PINMUX('H',  3, ANALOG)>, /* LCD_R1 */
 526                                  <STM32_PINMUX('H',  8, ANALOG)>, /* LCD_R2 */
 527                                  <STM32_PINMUX('H',  9, ANALOG)>, /* LCD_R3 */
 528                                  <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
 529                                  <STM32_PINMUX('C',  0, ANALOG)>, /* LCD_R5 */
 530                                  <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
 531                                  <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
 532                                  <STM32_PINMUX('E',  5, ANALOG)>, /* LCD_G0 */
 533                                  <STM32_PINMUX('E',  6, ANALOG)>, /* LCD_G1 */
 534                                  <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
 535                                  <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
 536                                  <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
 537                                  <STM32_PINMUX('I',  0, ANALOG)>, /* LCD_G5 */
 538                                  <STM32_PINMUX('I',  1, ANALOG)>, /* LCD_G6 */
 539                                  <STM32_PINMUX('I',  2, ANALOG)>, /* LCD_G7 */
 540                                  <STM32_PINMUX('D',  9, ANALOG)>, /* LCD_B0 */
 541                                  <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
 542                                  <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
 543                                  <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
 544                                  <STM32_PINMUX('I',  4, ANALOG)>, /* LCD_B4 */
 545                                  <STM32_PINMUX('A',  3, ANALOG)>, /* LCD_B5 */
 546                                  <STM32_PINMUX('B',  8, ANALOG)>, /* LCD_B6 */
 547                                  <STM32_PINMUX('D',  8, ANALOG)>; /* LCD_B7 */
 548                 };
 549         };
 550
 551         ltdc_pins_b: ltdc-1 {
 552                 pins {
 553                         pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
 554                                  <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
 555                                  <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
 556                                  <STM32_PINMUX('K',  7, AF14)>, /* LCD_DE */
 557                                  <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
 558                                  <STM32_PINMUX('J',  0, AF14)>, /* LCD_R1 */
 559                                  <STM32_PINMUX('J',  1, AF14)>, /* LCD_R2 */
 560                                  <STM32_PINMUX('J',  2, AF14)>, /* LCD_R3 */
 561                                  <STM32_PINMUX('J',  3, AF14)>, /* LCD_R4 */
 562                                  <STM32_PINMUX('J',  4, AF14)>, /* LCD_R5 */
 563                                  <STM32_PINMUX('J',  5, AF14)>, /* LCD_R6 */
 564                                  <STM32_PINMUX('J',  6, AF14)>, /* LCD_R7 */
 565                                  <STM32_PINMUX('J',  7, AF14)>, /* LCD_G0 */
 566                                  <STM32_PINMUX('J',  8, AF14)>, /* LCD_G1 */
 567                                  <STM32_PINMUX('J',  9, AF14)>, /* LCD_G2 */
 568                                  <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
 569                                  <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
 570                                  <STM32_PINMUX('K',  0, AF14)>, /* LCD_G5 */
 571                                  <STM32_PINMUX('K',  1, AF14)>, /* LCD_G6 */
 572                                  <STM32_PINMUX('K',  2, AF14)>, /* LCD_G7 */
 573                                  <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
 574                                  <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
 575                                  <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
 576                                  <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
 577                                  <STM32_PINMUX('K',  3, AF14)>, /* LCD_B4 */
 578                                  <STM32_PINMUX('K',  4, AF14)>, /* LCD_B5 */
 579                                  <STM32_PINMUX('K',  5, AF14)>, /* LCD_B6 */
 580                                  <STM32_PINMUX('K',  6, AF14)>; /* LCD_B7 */
 581                         bias-disable;
 582                         drive-push-pull;
 583                         slew-rate = <1>;
 584                 };
 585         };
 586
 587         ltdc_sleep_pins_b: ltdc-sleep-1 {
 588                 pins {
 589                         pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
 590                                  <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
 591                                  <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
 592                                  <STM32_PINMUX('K',  7, ANALOG)>, /* LCD_DE */
 593                                  <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
 594                                  <STM32_PINMUX('J',  0, ANALOG)>, /* LCD_R1 */
 595                                  <STM32_PINMUX('J',  1, ANALOG)>, /* LCD_R2 */
 596                                  <STM32_PINMUX('J',  2, ANALOG)>, /* LCD_R3 */
 597                                  <STM32_PINMUX('J',  3, ANALOG)>, /* LCD_R4 */
 598                                  <STM32_PINMUX('J',  4, ANALOG)>, /* LCD_R5 */
 599                                  <STM32_PINMUX('J',  5, ANALOG)>, /* LCD_R6 */
 600                                  <STM32_PINMUX('J',  6, ANALOG)>, /* LCD_R7 */
 601                                  <STM32_PINMUX('J',  7, ANALOG)>, /* LCD_G0 */
 602                                  <STM32_PINMUX('J',  8, ANALOG)>, /* LCD_G1 */
 603                                  <STM32_PINMUX('J',  9, ANALOG)>, /* LCD_G2 */
 604                                  <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
 605                                  <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
 606                                  <STM32_PINMUX('K',  0, ANALOG)>, /* LCD_G5 */
 607                                  <STM32_PINMUX('K',  1, ANALOG)>, /* LCD_G6 */
 608                                  <STM32_PINMUX('K',  2, ANALOG)>, /* LCD_G7 */
 609                                  <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
 610                                  <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
 611                                  <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
 612                                  <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
 613                                  <STM32_PINMUX('K',  3, ANALOG)>, /* LCD_B4 */
 614                                  <STM32_PINMUX('K',  4, ANALOG)>, /* LCD_B5 */
 615                                  <STM32_PINMUX('K',  5, ANALOG)>, /* LCD_B6 */
 616                                  <STM32_PINMUX('K',  6, ANALOG)>; /* LCD_B7 */
 617                 };
 618         };
 619
 620         ltdc_pins_c: ltdc-2 {
 621                 pins1 {
 622                         pinmux = <STM32_PINMUX('B',  1, AF9)>,  /* LTDC_R6 */
 623                                  <STM32_PINMUX('B',  9, AF14)>, /* LTDC_B7 */
 624                                  <STM32_PINMUX('C',  0, AF14)>, /* LTDC_R5 */
 625                                  <STM32_PINMUX('D',  3, AF14)>, /* LTDC_G7 */
 626                                  <STM32_PINMUX('D',  6, AF14)>, /* LTDC_B2 */
 627                                  <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
 628                                  <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */
 629                                  <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
 630                                  <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */
 631                                  <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
 632                                  <STM32_PINMUX('H',  4, AF9)>,  /* LTDC_G5 */
 633                                  <STM32_PINMUX('H',  8, AF14)>, /* LTDC_R2 */
 634                                  <STM32_PINMUX('H',  9, AF14)>, /* LTDC_R3 */
 635                                  <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
 636                                  <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
 637                                  <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
 638                                  <STM32_PINMUX('I',  1, AF14)>, /* LTDC_G6 */
 639                                  <STM32_PINMUX('I',  5, AF14)>, /* LTDC_B5 */
 640                                  <STM32_PINMUX('I',  6, AF14)>, /* LTDC_B6 */
 641                                  <STM32_PINMUX('I',  9, AF14)>, /* LTDC_VSYNC */
 642                                  <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
 643                         bias-disable;
 644                         drive-push-pull;
 645                         slew-rate = <0>;
 646                 };
 647                 pins2 {
 648                         pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
 649                         bias-disable;
 650                         drive-push-pull;
 651                         slew-rate = <1>;
 652                 };
 653         };
 654
 655         ltdc_sleep_pins_c: ltdc-sleep-2 {
 656                 pins1 {
 657                         pinmux = <STM32_PINMUX('B', 1, ANALOG)>,  /* LTDC_R6 */
 658                                  <STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */
 659                                  <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */
 660                                  <STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */
 661                                  <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */
 662                                  <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
 663                                  <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */
 664                                  <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
 665                                  <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */
 666                                  <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
 667                                  <STM32_PINMUX('H', 4, ANALOG)>,  /* LTDC_G5 */
 668                                  <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */
 669                                  <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */
 670                                  <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
 671                                  <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
 672                                  <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */
 673                                  <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */
 674                                  <STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */
 675                                  <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */
 676                                  <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */
 677                                  <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */
 678                                  <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */
 679                 };
 680         };
 681
 682         ltdc_pins_d: ltdc-3 {
 683                 pins1 {
 684                         pinmux = <STM32_PINMUX('G',  7, AF14)>; /* LCD_CLK */
 685                         bias-disable;
 686                         drive-push-pull;
 687                         slew-rate = <3>;
 688                 };
 689                 pins2 {
 690                         pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
 691                                  <STM32_PINMUX('I',  9, AF14)>, /* LCD_VSYNC */
 692                                  <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */
 693                                  <STM32_PINMUX('G', 13, AF14)>, /* LCD_R0 */
 694                                  <STM32_PINMUX('H',  3, AF14)>, /* LCD_R1 */
 695                                  <STM32_PINMUX('H',  8, AF14)>, /* LCD_R2 */
 696                                  <STM32_PINMUX('H',  9, AF14)>, /* LCD_R3 */
 697                                  <STM32_PINMUX('A',  5, AF14)>, /* LCD_R4 */
 698                                  <STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */
 699                                  <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
 700                                  <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
 701                                  <STM32_PINMUX('E',  5, AF14)>, /* LCD_G0 */
 702                                  <STM32_PINMUX('B',  0, AF14)>, /* LCD_G1 */
 703                                  <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
 704                                  <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */
 705                                  <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
 706                                  <STM32_PINMUX('H',  4,  AF9)>, /* LCD_G5 */
 707                                  <STM32_PINMUX('I', 11,  AF9)>, /* LCD_G6 */
 708                                  <STM32_PINMUX('G',  8, AF14)>, /* LCD_G7 */
 709                                  <STM32_PINMUX('D',  9, AF14)>, /* LCD_B0 */
 710                                  <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
 711                                  <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
 712                                  <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
 713                                  <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */
 714                                  <STM32_PINMUX('A',  3, AF14)>, /* LCD_B5 */
 715                                  <STM32_PINMUX('B',  8, AF14)>, /* LCD_B6 */
 716                                  <STM32_PINMUX('I',  7, AF14)>; /* LCD_B7 */
 717                         bias-disable;
 718                         drive-push-pull;
 719                         slew-rate = <2>;
 720                 };
 721         };
 722
 723         ltdc_sleep_pins_d: ltdc-sleep-3 {
 724                 pins {
 725                         pinmux = <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_CLK */
 726                                  <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
 727                                  <STM32_PINMUX('I',  9, ANALOG)>, /* LCD_VSYNC */
 728                                  <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */
 729                                  <STM32_PINMUX('G', 13, ANALOG)>, /* LCD_R0 */
 730                                  <STM32_PINMUX('H',  3, ANALOG)>, /* LCD_R1 */
 731                                  <STM32_PINMUX('H',  8, ANALOG)>, /* LCD_R2 */
 732                                  <STM32_PINMUX('H',  9, ANALOG)>, /* LCD_R3 */
 733                                  <STM32_PINMUX('A',  5, ANALOG)>, /* LCD_R4 */
 734                                  <STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */
 735                                  <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
 736                                  <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
 737                                  <STM32_PINMUX('E',  5, ANALOG)>, /* LCD_G0 */
 738                                  <STM32_PINMUX('B',  0, ANALOG)>, /* LCD_G1 */
 739                                  <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
 740                                  <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */
 741                                  <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
 742                                  <STM32_PINMUX('H',  4, ANALOG)>, /* LCD_G5 */
 743                                  <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */
 744                                  <STM32_PINMUX('G',  8, ANALOG)>, /* LCD_G7 */
 745                                  <STM32_PINMUX('D',  9, ANALOG)>, /* LCD_B0 */
 746                                  <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
 747                                  <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
 748                                  <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
 749                                  <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */
 750                                  <STM32_PINMUX('A',  3, ANALOG)>, /* LCD_B5 */
 751                                  <STM32_PINMUX('B',  8, ANALOG)>, /* LCD_B6 */
 752                                  <STM32_PINMUX('I',  7, ANALOG)>; /* LCD_B7 */
 753                 };
 754         };
 755
 756         m_can1_pins_a: m-can1-0 {
 757                 pins1 {
 758                         pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
 759                         slew-rate = <1>;
 760                         drive-push-pull;
 761                         bias-disable;
 762                 };
 763                 pins2 {
 764                         pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
 765                         bias-disable;
 766                 };
 767         };
 768
 769         m_can1_sleep_pins_a: m_can1-sleep-0 {
 770                 pins {
 771                         pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
 772                                  <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
 773                 };
 774         };
 775
 776         m_can1_pins_b: m-can1-1 {
 777                 pins1 {
 778                         pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
 779                         slew-rate = <1>;
 780                         drive-push-pull;
 781                         bias-disable;
 782                 };
 783                 pins2 {
 784                         pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
 785                         bias-disable;
 786                 };
 787         };
 788
 789         m_can1_sleep_pins_b: m_can1-sleep-1 {
 790                 pins {
 791                         pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */
 792                                  <STM32_PINMUX('A', 11, ANALOG)>; /* CAN1_RX */
 793                 };
 794         };
 795
 796         pwm1_pins_a: pwm1-0 {
 797                 pins {
 798                         pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
 799                                  <STM32_PINMUX('E', 11, AF1)>, /* TIM1_CH2 */
 800                                  <STM32_PINMUX('E', 14, AF1)>; /* TIM1_CH4 */
 801                         bias-pull-down;
 802                         drive-push-pull;
 803                         slew-rate = <0>;
 804                 };
 805         };
 806
 807         pwm1_sleep_pins_a: pwm1-sleep-0 {
 808                 pins {
 809                         pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
 810                                  <STM32_PINMUX('E', 11, ANALOG)>, /* TIM1_CH2 */
 811                                  <STM32_PINMUX('E', 14, ANALOG)>; /* TIM1_CH4 */
 812                 };
 813         };
 814
 815         pwm2_pins_a: pwm2-0 {
 816                 pins {
 817                         pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
 818                         bias-pull-down;
 819                         drive-push-pull;
 820                         slew-rate = <0>;
 821                 };
 822         };
 823
 824         pwm2_sleep_pins_a: pwm2-sleep-0 {
 825                 pins {
 826                         pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */
 827                 };
 828         };
 829
 830         pwm3_pins_a: pwm3-0 {
 831                 pins {
 832                         pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */
 833                         bias-pull-down;
 834                         drive-push-pull;
 835                         slew-rate = <0>;
 836                 };
 837         };
 838
 839         pwm3_sleep_pins_a: pwm3-sleep-0 {
 840                 pins {
 841                         pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */
 842                 };
 843         };
 844
 845         pwm3_pins_b: pwm3-1 {
 846                 pins {
 847                         pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
 848                         bias-disable;
 849                         drive-push-pull;
 850                         slew-rate = <0>;
 851                 };
 852         };
 853
 854         pwm3_sleep_pins_b: pwm3-sleep-1 {
 855                 pins {
 856                         pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
 857                 };
 858         };
 859
 860         pwm4_pins_a: pwm4-0 {
 861                 pins {
 862                         pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */
 863                                  <STM32_PINMUX('D', 15, AF2)>; /* TIM4_CH4 */
 864                         bias-pull-down;
 865                         drive-push-pull;
 866                         slew-rate = <0>;
 867                 };
 868         };
 869
 870         pwm4_sleep_pins_a: pwm4-sleep-0 {
 871                 pins {
 872                         pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */
 873                                  <STM32_PINMUX('D', 15, ANALOG)>; /* TIM4_CH4 */
 874                 };
 875         };
 876
 877         pwm4_pins_b: pwm4-1 {
 878                 pins {
 879                         pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
 880                         bias-pull-down;
 881                         drive-push-pull;
 882                         slew-rate = <0>;
 883                 };
 884         };
 885
 886         pwm4_sleep_pins_b: pwm4-sleep-1 {
 887                 pins {
 888                         pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
 889                 };
 890         };
 891
 892         pwm5_pins_a: pwm5-0 {
 893                 pins {
 894                         pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */
 895                         bias-pull-down;
 896                         drive-push-pull;
 897                         slew-rate = <0>;
 898                 };
 899         };
 900
 901         pwm5_sleep_pins_a: pwm5-sleep-0 {
 902                 pins {
 903                         pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */
 904                 };
 905         };
 906
 907         pwm5_pins_b: pwm5-1 {
 908                 pins {
 909                         pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */
 910                                  <STM32_PINMUX('H', 12, AF2)>, /* TIM5_CH3 */
 911                                  <STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */
 912                         bias-disable;
 913                         drive-push-pull;
 914                         slew-rate = <0>;
 915                 };
 916         };
 917
 918         pwm5_sleep_pins_b: pwm5-sleep-1 {
 919                 pins {
 920                         pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */
 921                                  <STM32_PINMUX('H', 12, ANALOG)>, /* TIM5_CH3 */
 922                                  <STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */
 923                 };
 924         };
 925
 926         pwm8_pins_a: pwm8-0 {
 927                 pins {
 928                         pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
 929                         bias-pull-down;
 930                         drive-push-pull;
 931                         slew-rate = <0>;
 932                 };
 933         };
 934
 935         pwm8_sleep_pins_a: pwm8-sleep-0 {
 936                 pins {
 937                         pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */
 938                 };
 939         };
 940
 941         pwm12_pins_a: pwm12-0 {
 942                 pins {
 943                         pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
 944                         bias-pull-down;
 945                         drive-push-pull;
 946                         slew-rate = <0>;
 947                 };
 948         };
 949
 950         pwm12_sleep_pins_a: pwm12-sleep-0 {
 951                 pins {
 952                         pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
 953                 };
 954         };
 955
 956         qspi_clk_pins_a: qspi-clk-0 {
 957                 pins {
 958                         pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
 959                         bias-disable;
 960                         drive-push-pull;
 961                         slew-rate = <3>;
 962                 };
 963         };
 964
 965         qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
 966                 pins {
 967                         pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
 968                 };
 969         };
 970
 971         qspi_bk1_pins_a: qspi-bk1-0 {
 972                 pins1 {
 973                         pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
 974                                  <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
 975                                  <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
 976                                  <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
 977                         bias-disable;
 978                         drive-push-pull;
 979                         slew-rate = <1>;
 980                 };
 981                 pins2 {
 982                         pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
 983                         bias-pull-up;
 984                         drive-push-pull;
 985                         slew-rate = <1>;
 986                 };
 987         };
 988
 989         qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
 990                 pins {
 991                         pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
 992                                  <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
 993                                  <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
 994                                  <STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */
 995                                  <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
 996                 };
 997         };
 998
 999         qspi_bk2_pins_a: qspi-bk2-0 {
1000                 pins1 {
1001                         pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
1002                                  <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
1003                                  <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
1004                                  <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
1005                         bias-disable;
1006                         drive-push-pull;
1007                         slew-rate = <1>;
1008                 };
1009                 pins2 {
1010                         pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
1011                         bias-pull-up;
1012                         drive-push-pull;
1013                         slew-rate = <1>;
1014                 };
1015         };
1016
1017         qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
1018                 pins {
1019                         pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
1020                                  <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
1021                                  <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
1022                                  <STM32_PINMUX('G', 7, ANALOG)>, /* QSPI_BK2_IO3 */
1023                                  <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
1024                 };
1025         };
1026
1027         sai2a_pins_a: sai2a-0 {
1028                 pins {
1029                         pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
1030                                  <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1031                                  <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
1032                                  <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
1033                         slew-rate = <0>;
1034                         drive-push-pull;
1035                         bias-disable;
1036                 };
1037         };
1038
1039         sai2a_sleep_pins_a: sai2a-sleep-0 {
1040                 pins {
1041                         pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
1042                                  <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1043                                  <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
1044                                  <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
1045                 };
1046         };
1047
1048
1049         sai2a_pins_b: sai2a-1 {
1050                 pins1 {
1051                         pinmux = <STM32_PINMUX('I', 6, AF10)>,  /* SAI2_SD_A */
1052                                  <STM32_PINMUX('I', 7, AF10)>,  /* SAI2_FS_A */
1053                                  <STM32_PINMUX('D', 13, AF10)>; /* SAI2_SCK_A */
1054                         slew-rate = <0>;
1055                         drive-push-pull;
1056                         bias-disable;
1057                 };
1058         };
1059
1060         sai2a_sleep_pins_b: sai2a-sleep-1 {
1061                 pins {
1062                         pinmux = <STM32_PINMUX('I', 6, ANALOG)>,  /* SAI2_SD_A */
1063                                  <STM32_PINMUX('I', 7, ANALOG)>,  /* SAI2_FS_A */
1064                                  <STM32_PINMUX('D', 13, ANALOG)>; /* SAI2_SCK_A */
1065                 };
1066         };
1067
1068         sai2a_pins_c: sai2a-4 {
1069                 pins {
1070                         pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */
1071                                  <STM32_PINMUX('D', 11, AF10)>, /* SAI2_SD_A */
1072                                  <STM32_PINMUX('D', 12, AF10)>; /* SAI2_FS_A */
1073                         slew-rate = <0>;
1074                         drive-push-pull;
1075                         bias-disable;
1076                 };
1077         };
1078
1079         sai2a_sleep_pins_c: sai2a-5 {
1080                 pins {
1081                         pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */
1082                                  <STM32_PINMUX('D', 11, ANALOG)>, /* SAI2_SD_A */
1083                                  <STM32_PINMUX('D', 12, ANALOG)>; /* SAI2_FS_A */
1084                 };
1085         };
1086
1087         sai2b_pins_a: sai2b-0 {
1088                 pins1 {
1089                         pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
1090                                  <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
1091                                  <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
1092                         slew-rate = <0>;
1093                         drive-push-pull;
1094                         bias-disable;
1095                 };
1096                 pins2 {
1097                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1098                         bias-disable;
1099                 };
1100         };
1101
1102         sai2b_sleep_pins_a: sai2b-sleep-0 {
1103                 pins {
1104                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
1105                                  <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
1106                                  <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
1107                                  <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
1108                 };
1109         };
1110
1111         sai2b_pins_b: sai2b-1 {
1112                 pins {
1113                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1114                         bias-disable;
1115                 };
1116         };
1117
1118         sai2b_sleep_pins_b: sai2b-sleep-1 {
1119                 pins {
1120                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1121                 };
1122         };
1123
1124         sai2b_pins_c: sai2a-4 {
1125                 pins1 {
1126                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1127                         bias-disable;
1128                 };
1129         };
1130
1131         sai2b_sleep_pins_c: sai2a-sleep-5 {
1132                 pins {
1133                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1134                 };
1135         };
1136
1137         sai4a_pins_a: sai4a-0 {
1138                 pins {
1139                         pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
1140                         slew-rate = <0>;
1141                         drive-push-pull;
1142                         bias-disable;
1143                 };
1144         };
1145
1146         sai4a_sleep_pins_a: sai4a-sleep-0 {
1147                 pins {
1148                         pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
1149                 };
1150         };
1151
1152         sdmmc1_b4_pins_a: sdmmc1-b4-0 {
1153                 pins1 {
1154                         pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1155                                  <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1156                                  <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1157                                  <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
1158                                  <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1159                         slew-rate = <1>;
1160                         drive-push-pull;
1161                         bias-disable;
1162                 };
1163                 pins2 {
1164                         pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1165                         slew-rate = <2>;
1166                         drive-push-pull;
1167                         bias-disable;
1168                 };
1169         };
1170
1171         sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
1172                 pins1 {
1173                         pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1174                                  <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1175                                  <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1176                                  <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1177                         slew-rate = <1>;
1178                         drive-push-pull;
1179                         bias-disable;
1180                 };
1181                 pins2 {
1182                         pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1183                         slew-rate = <2>;
1184                         drive-push-pull;
1185                         bias-disable;
1186                 };
1187                 pins3 {
1188                         pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1189                         slew-rate = <1>;
1190                         drive-open-drain;
1191                         bias-disable;
1192                 };
1193         };
1194
1195         sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
1196                 pins {
1197                         pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
1198                                  <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
1199                                  <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
1200                                  <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
1201                                  <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
1202                                  <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
1203                 };
1204         };
1205
1206         sdmmc1_dir_pins_a: sdmmc1-dir-0 {
1207                 pins1 {
1208                         pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1209                                  <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
1210                                  <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1211                         slew-rate = <1>;
1212                         drive-push-pull;
1213                         bias-pull-up;
1214                 };
1215                 pins2{
1216                         pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1217                         bias-pull-up;
1218                 };
1219         };
1220
1221         sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
1222                 pins {
1223                         pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1224                                  <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
1225                                  <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
1226                                  <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
1227                 };
1228         };
1229
1230         sdmmc1_dir_pins_b: sdmmc1-dir-1 {
1231                 pins1 {
1232                         pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1233                                  <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
1234                                  <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1235                         slew-rate = <1>;
1236                         drive-push-pull;
1237                         bias-pull-up;
1238                 };
1239                 pins2{
1240                         pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1241                         bias-pull-up;
1242                 };
1243         };
1244
1245         sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
1246                 pins {
1247                         pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1248                                  <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */
1249                                  <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
1250                                  <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
1251                 };
1252         };
1253
1254         sdmmc2_b4_pins_a: sdmmc2-b4-0 {
1255                 pins1 {
1256                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1257                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1258                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1259                                  <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
1260                                  <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1261                         slew-rate = <1>;
1262                         drive-push-pull;
1263                         bias-pull-up;
1264                 };
1265                 pins2 {
1266                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1267                         slew-rate = <2>;
1268                         drive-push-pull;
1269                         bias-pull-up;
1270                 };
1271         };
1272
1273         sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
1274                 pins1 {
1275                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1276                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1277                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1278                                  <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
1279                         slew-rate = <1>;
1280                         drive-push-pull;
1281                         bias-pull-up;
1282                 };
1283                 pins2 {
1284                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1285                         slew-rate = <2>;
1286                         drive-push-pull;
1287                         bias-pull-up;
1288                 };
1289                 pins3 {
1290                         pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1291                         slew-rate = <1>;
1292                         drive-open-drain;
1293                         bias-pull-up;
1294                 };
1295         };
1296
1297         sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
1298                 pins {
1299                         pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
1300                                  <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
1301                                  <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
1302                                  <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
1303                                  <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
1304                                  <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
1305                 };
1306         };
1307
1308         sdmmc2_b4_pins_b: sdmmc2-b4-1 {
1309                 pins1 {
1310                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1311                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1312                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1313                                  <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
1314                                  <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1315                         slew-rate = <1>;
1316                         drive-push-pull;
1317                         bias-disable;
1318                 };
1319                 pins2 {
1320                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1321                         slew-rate = <2>;
1322                         drive-push-pull;
1323                         bias-disable;
1324                 };
1325         };
1326
1327         sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
1328                 pins1 {
1329                         pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1330                                  <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1331                                  <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1332                                  <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
1333                         slew-rate = <1>;
1334                         drive-push-pull;
1335                         bias-disable;
1336                 };
1337                 pins2 {
1338                         pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1339                         slew-rate = <2>;
1340                         drive-push-pull;
1341                         bias-disable;
1342                 };
1343                 pins3 {
1344                         pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1345                         slew-rate = <1>;
1346                         drive-open-drain;
1347                         bias-disable;
1348                 };
1349         };
1350
1351         sdmmc2_d47_pins_a: sdmmc2-d47-0 {
1352                 pins {
1353                         pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1354                                  <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1355                                  <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
1356                                  <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
1357                         slew-rate = <1>;
1358                         drive-push-pull;
1359                         bias-pull-up;
1360                 };
1361         };
1362
1363         sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
1364                 pins {
1365                         pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1366                                  <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1367                                  <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
1368                                  <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
1369                 };
1370         };
1371
1372         sdmmc2_d47_pins_b: sdmmc2-d47-1 {
1373                 pins {
1374                         pinmux = <STM32_PINMUX('A', 8, AF9)>,  /* SDMMC2_D4 */
1375                                  <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1376                                  <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
1377                                  <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1378                         slew-rate = <1>;
1379                         drive-push-pull;
1380                         bias-disable;
1381                 };
1382         };
1383
1384         sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
1385                 pins {
1386                         pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1387                                  <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1388                                  <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
1389                                  <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1390                 };
1391         };
1392
1393         sdmmc2_d47_pins_c: sdmmc2-d47-2 {
1394                 pins {
1395                         pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1396                                  <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
1397                                  <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
1398                                  <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1399                         slew-rate = <1>;
1400                         drive-push-pull;
1401                         bias-pull-up;
1402                 };
1403         };
1404
1405         sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 {
1406                 pins {
1407                         pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1408                                  <STM32_PINMUX('A', 15, ANALOG)>, /* SDMMC2_D5 */
1409                                  <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
1410                                  <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1411                 };
1412         };
1413
1414         sdmmc3_b4_pins_a: sdmmc3-b4-0 {
1415                 pins1 {
1416                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1417                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1418                                  <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
1419                                  <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
1420                                  <STM32_PINMUX('F', 1, AF9)>; /* SDMMC3_CMD */
1421                         slew-rate = <1>;
1422                         drive-push-pull;
1423                         bias-pull-up;
1424                 };
1425                 pins2 {
1426                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1427                         slew-rate = <2>;
1428                         drive-push-pull;
1429                         bias-pull-up;
1430                 };
1431         };
1432
1433         sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
1434                 pins1 {
1435                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1436                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1437                                  <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
1438                                  <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
1439                         slew-rate = <1>;
1440                         drive-push-pull;
1441                         bias-pull-up;
1442                 };
1443                 pins2 {
1444                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1445                         slew-rate = <2>;
1446                         drive-push-pull;
1447                         bias-pull-up;
1448                 };
1449                 pins3 {
1450                         pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */
1451                         slew-rate = <1>;
1452                         drive-open-drain;
1453                         bias-pull-up;
1454                 };
1455         };
1456
1457         sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 {
1458                 pins {
1459                         pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1460                                  <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
1461                                  <STM32_PINMUX('F', 5, ANALOG)>, /* SDMMC3_D2 */
1462                                  <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
1463                                  <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
1464                                  <STM32_PINMUX('F', 1, ANALOG)>; /* SDMMC3_CMD */
1465                 };
1466         };
1467
1468         sdmmc3_b4_pins_b: sdmmc3-b4-1 {
1469                 pins1 {
1470                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1471                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1472                                  <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
1473                                  <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
1474                                  <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
1475                         slew-rate = <1>;
1476                         drive-push-pull;
1477                         bias-pull-up;
1478                 };
1479                 pins2 {
1480                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1481                         slew-rate = <2>;
1482                         drive-push-pull;
1483                         bias-pull-up;
1484                 };
1485         };
1486
1487         sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
1488                 pins1 {
1489                         pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1490                                  <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1491                                  <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
1492                                  <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
1493                         slew-rate = <1>;
1494                         drive-push-pull;
1495                         bias-pull-up;
1496                 };
1497                 pins2 {
1498                         pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1499                         slew-rate = <2>;
1500                         drive-push-pull;
1501                         bias-pull-up;
1502                 };
1503                 pins3 {
1504                         pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */
1505                         slew-rate = <1>;
1506                         drive-open-drain;
1507                         bias-pull-up;
1508                 };
1509         };
1510
1511         sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
1512                 pins {
1513                         pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1514                                  <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
1515                                  <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
1516                                  <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
1517                                  <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
1518                                  <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
1519                 };
1520         };
1521
1522         spdifrx_pins_a: spdifrx-0 {
1523                 pins {
1524                         pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
1525                         bias-disable;
1526                 };
1527         };
1528
1529         spdifrx_sleep_pins_a: spdifrx-sleep-0 {
1530                 pins {
1531                         pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
1532                 };
1533         };
1534
1535         usart2_pins_a: usart2-0 {
1536                 pins1 {
1537                         pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
1538                                  <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
1539                         bias-disable;
1540                         drive-push-pull;
1541                         slew-rate = <0>;
1542                 };
1543                 pins2 {
1544                         pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
1545                                  <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
1546                         bias-disable;
1547                 };
1548         };
1549
1550         usart2_sleep_pins_a: usart2-sleep-0 {
1551                 pins {
1552                         pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
1553                                  <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
1554                                  <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
1555                                  <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
1556                 };
1557         };
1558
1559         usart3_pins_a: usart3-0 {
1560                 pins1 {
1561                         pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
1562                         bias-disable;
1563                         drive-push-pull;
1564                         slew-rate = <0>;
1565                 };
1566                 pins2 {
1567                         pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
1568                         bias-disable;
1569                 };
1570         };
1571
1572         uart4_pins_a: uart4-0 {
1573                 pins1 {
1574                         pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
1575                         bias-disable;
1576                         drive-push-pull;
1577                         slew-rate = <0>;
1578                 };
1579                 pins2 {
1580                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1581                         bias-disable;
1582                 };
1583         };
1584
1585         uart4_pins_b: uart4-1 {
1586                 pins1 {
1587                         pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
1588                         bias-disable;
1589                         drive-push-pull;
1590                         slew-rate = <0>;
1591                 };
1592                 pins2 {
1593                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1594                         bias-disable;
1595                 };
1596         };
1597
1598         uart7_pins_a: uart7-0 {
1599                 pins1 {
1600                         pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
1601                         bias-disable;
1602                         drive-push-pull;
1603                         slew-rate = <0>;
1604                 };
1605                 pins2 {
1606                         pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */
1607                                  <STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */
1608                                  <STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */
1609                         bias-disable;
1610                 };
1611         };
1612
1613         uart8_pins_a: uart8-0 {
1614                 pins1 {
1615                         pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
1616                         bias-disable;
1617                         drive-push-pull;
1618                         slew-rate = <0>;
1619                 };
1620                 pins2 {
1621                         pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
1622                         bias-disable;
1623                 };
1624         };
1625
1626         usbotg_hs_pins_a: usbotg-hs-0 {
1627                 pins {
1628                         pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
1629                 };
1630         };
1631
1632         usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
1633                 pins {
1634                         pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
1635                                  <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
1636                 };
1637         };
1638 };
1639
1640 &pinctrl_z {
1641         i2c2_pins_b2: i2c2-0 {
1642                 pins {
1643                         pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
1644                         bias-disable;
1645                         drive-open-drain;
1646                         slew-rate = <0>;
1647                 };
1648         };
1649
1650         i2c2_sleep_pins_b2: i2c2-sleep-0 {
1651                 pins {
1652                         pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
1653                 };
1654         };
1655
1656         i2c4_pins_a: i2c4-0 {
1657                 pins {
1658                         pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
1659                                  <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
1660                         bias-disable;
1661                         drive-open-drain;
1662                         slew-rate = <0>;
1663                 };
1664         };
1665
1666         i2c4_sleep_pins_a: i2c4-sleep-0 {
1667                 pins {
1668                         pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
1669                                  <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
1670                 };
1671         };
1672
1673         spi1_pins_a: spi1-0 {
1674                 pins1 {
1675                         pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
1676                                  <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
1677                         bias-disable;
1678                         drive-push-pull;
1679                         slew-rate = <1>;
1680                 };
1681
1682                 pins2 {
1683                         pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
1684                         bias-disable;
1685                 };
1686         };
1687 };