1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 adc1_in6_pins_a: adc1-in6-0 {
11 pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
15 adc12_ain_pins_a: adc12-ain-0 {
17 pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
18 <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
19 <STM32_PINMUX('F', 13, ANALOG)>, /* ADC2 in2 */
20 <STM32_PINMUX('F', 14, ANALOG)>; /* ADC2 in6 */
24 adc12_ain_pins_b: adc12-ain-1 {
26 pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
27 <STM32_PINMUX('F', 13, ANALOG)>; /* ADC2 in2 */
31 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
33 pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
34 <STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */
40 pinmux = <STM32_PINMUX('A', 15, AF4)>;
47 cec_sleep_pins_a: cec-sleep-0 {
49 pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
55 pinmux = <STM32_PINMUX('B', 6, AF5)>;
62 cec_sleep_pins_b: cec-sleep-1 {
64 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
68 dac_ch1_pins_a: dac-ch1-0 {
70 pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
74 dac_ch2_pins_a: dac-ch2-0 {
76 pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
82 pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
83 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
84 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
85 <STM32_PINMUX('H', 9, AF13)>,/* DCMI_D0 */
86 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
87 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
88 <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
89 <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
90 <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */
91 <STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */
92 <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
93 <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */
94 <STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */
95 <STM32_PINMUX('I', 3, AF13)>,/* DCMI_D10 */
96 <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
101 dcmi_sleep_pins_a: dcmi-sleep-0 {
103 pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */
104 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
105 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
106 <STM32_PINMUX('H', 9, ANALOG)>,/* DCMI_D0 */
107 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
108 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
109 <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
110 <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
111 <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */
112 <STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */
113 <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
114 <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */
115 <STM32_PINMUX('H', 7, ANALOG)>,/* DCMI_D9 */
116 <STM32_PINMUX('I', 3, ANALOG)>,/* DCMI_D10 */
117 <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
121 dcmi_pins_b: dcmi-1 {
123 pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */
124 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
125 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
126 <STM32_PINMUX('C', 6, AF13)>,/* DCMI_D0 */
127 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
128 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
129 <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */
130 <STM32_PINMUX('E', 11, AF13)>,/* DCMI_D4 */
131 <STM32_PINMUX('D', 3, AF13)>,/* DCMI_D5 */
132 <STM32_PINMUX('E', 13, AF13)>,/* DCMI_D6 */
133 <STM32_PINMUX('B', 9, AF13)>;/* DCMI_D7 */
138 dcmi_sleep_pins_b: dcmi-sleep-1 {
140 pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */
141 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
142 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
143 <STM32_PINMUX('C', 6, ANALOG)>,/* DCMI_D0 */
144 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
145 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
146 <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */
147 <STM32_PINMUX('E', 11, ANALOG)>,/* DCMI_D4 */
148 <STM32_PINMUX('D', 3, ANALOG)>,/* DCMI_D5 */
149 <STM32_PINMUX('E', 13, ANALOG)>,/* DCMI_D6 */
150 <STM32_PINMUX('B', 9, ANALOG)>;/* DCMI_D7 */
154 ethernet0_rgmii_pins_a: rgmii-0 {
156 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
157 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
158 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
159 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
160 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
161 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
162 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
163 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
169 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
175 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
176 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
177 <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
178 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
179 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
180 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
185 ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
187 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
188 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
189 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
190 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
191 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
192 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
193 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
194 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
195 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
196 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
197 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
198 <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
199 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
200 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
201 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
205 ethernet0_rgmii_pins_b: rgmii-1 {
207 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
208 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
209 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
210 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
211 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
212 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
213 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
214 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
220 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
226 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
227 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
228 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
229 <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
230 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
231 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
236 ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 {
238 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
239 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
240 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
241 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
242 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
243 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
244 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
245 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
246 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
247 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
248 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
249 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
250 <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
251 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
252 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
256 ethernet0_rgmii_pins_c: rgmii-2 {
258 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
259 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
260 <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */
261 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
262 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
263 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
264 <STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */
265 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
271 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
277 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
278 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
279 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
280 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
281 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
282 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
287 ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
289 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
290 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
291 <STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */
292 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
293 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
294 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
295 <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
296 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
297 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
298 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
299 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
300 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
301 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
302 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
303 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
307 ethernet0_rmii_pins_a: rmii-0 {
309 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
310 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
311 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
312 <STM32_PINMUX('A', 1, AF0)>, /* ETH1_RMII_REF_CLK */
313 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
314 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
320 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
321 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
322 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
327 ethernet0_rmii_sleep_pins_a: rmii-sleep-0 {
329 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
330 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
331 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
332 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
333 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
334 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
335 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
336 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
337 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
343 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
344 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
345 <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
346 <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
347 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
348 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
349 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
350 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
351 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
352 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
353 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
354 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
355 <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
361 pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
366 fmc_sleep_pins_a: fmc-sleep-0 {
368 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
369 <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
370 <STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */
371 <STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */
372 <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
373 <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
374 <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
375 <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
376 <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
377 <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
378 <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
379 <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
380 <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
381 <STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */
387 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
388 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
389 <STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */
390 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
391 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
392 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
393 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
394 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
395 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
396 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
397 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
398 <STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */
399 <STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */
400 <STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */
401 <STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */
402 <STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */
403 <STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */
404 <STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */
405 <STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */
406 <STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */
407 <STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */
414 fmc_sleep_pins_b: fmc-sleep-1 {
416 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
417 <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
418 <STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */
419 <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
420 <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
421 <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
422 <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
423 <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
424 <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
425 <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
426 <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
427 <STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */
428 <STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */
429 <STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */
430 <STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */
431 <STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */
432 <STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */
433 <STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */
434 <STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */
435 <STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */
436 <STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */
440 i2c1_pins_a: i2c1-0 {
442 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
443 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
450 i2c1_sleep_pins_a: i2c1-sleep-0 {
452 pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
453 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
457 i2c1_pins_b: i2c1-1 {
459 pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
460 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
467 i2c1_sleep_pins_b: i2c1-sleep-1 {
469 pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
470 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
474 i2c2_pins_a: i2c2-0 {
476 pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
477 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
484 i2c2_sleep_pins_a: i2c2-sleep-0 {
486 pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
487 <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
491 i2c2_pins_b1: i2c2-1 {
493 pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
500 i2c2_sleep_pins_b1: i2c2-sleep-1 {
502 pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
506 i2c2_pins_c: i2c2-2 {
508 pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
509 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
516 i2c2_pins_sleep_c: i2c2-sleep-2 {
518 pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
519 <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
523 i2c5_pins_a: i2c5-0 {
525 pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
526 <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
533 i2c5_sleep_pins_a: i2c5-sleep-0 {
535 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
536 <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */
541 i2c5_pins_b: i2c5-1 {
543 pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */
544 <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */
551 i2c5_sleep_pins_b: i2c5-sleep-1 {
553 pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */
554 <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */
558 i2s2_pins_a: i2s2-0 {
560 pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
561 <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
562 <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
569 i2s2_sleep_pins_a: i2s2-sleep-0 {
571 pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
572 <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
573 <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
577 ltdc_pins_a: ltdc-0 {
579 pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
580 <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
581 <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
582 <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
583 <STM32_PINMUX('H', 2, AF14)>, /* LCD_R0 */
584 <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
585 <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
586 <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
587 <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
588 <STM32_PINMUX('C', 0, AF14)>, /* LCD_R5 */
589 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
590 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
591 <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
592 <STM32_PINMUX('E', 6, AF14)>, /* LCD_G1 */
593 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
594 <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
595 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
596 <STM32_PINMUX('I', 0, AF14)>, /* LCD_G5 */
597 <STM32_PINMUX('I', 1, AF14)>, /* LCD_G6 */
598 <STM32_PINMUX('I', 2, AF14)>, /* LCD_G7 */
599 <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
600 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
601 <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
602 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
603 <STM32_PINMUX('I', 4, AF14)>, /* LCD_B4 */
604 <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
605 <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
606 <STM32_PINMUX('D', 8, AF14)>; /* LCD_B7 */
613 ltdc_sleep_pins_a: ltdc-sleep-0 {
615 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
616 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
617 <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
618 <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
619 <STM32_PINMUX('H', 2, ANALOG)>, /* LCD_R0 */
620 <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
621 <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
622 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
623 <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
624 <STM32_PINMUX('C', 0, ANALOG)>, /* LCD_R5 */
625 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
626 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
627 <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
628 <STM32_PINMUX('E', 6, ANALOG)>, /* LCD_G1 */
629 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
630 <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
631 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
632 <STM32_PINMUX('I', 0, ANALOG)>, /* LCD_G5 */
633 <STM32_PINMUX('I', 1, ANALOG)>, /* LCD_G6 */
634 <STM32_PINMUX('I', 2, ANALOG)>, /* LCD_G7 */
635 <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
636 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
637 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
638 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
639 <STM32_PINMUX('I', 4, ANALOG)>, /* LCD_B4 */
640 <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
641 <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
642 <STM32_PINMUX('D', 8, ANALOG)>; /* LCD_B7 */
646 ltdc_pins_b: ltdc-1 {
648 pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
649 <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
650 <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
651 <STM32_PINMUX('K', 7, AF14)>, /* LCD_DE */
652 <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
653 <STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */
654 <STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */
655 <STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */
656 <STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */
657 <STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */
658 <STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */
659 <STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */
660 <STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */
661 <STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */
662 <STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */
663 <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
664 <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
665 <STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */
666 <STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */
667 <STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */
668 <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
669 <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
670 <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
671 <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
672 <STM32_PINMUX('K', 3, AF14)>, /* LCD_B4 */
673 <STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */
674 <STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */
675 <STM32_PINMUX('K', 6, AF14)>; /* LCD_B7 */
682 ltdc_sleep_pins_b: ltdc-sleep-1 {
684 pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
685 <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
686 <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
687 <STM32_PINMUX('K', 7, ANALOG)>, /* LCD_DE */
688 <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
689 <STM32_PINMUX('J', 0, ANALOG)>, /* LCD_R1 */
690 <STM32_PINMUX('J', 1, ANALOG)>, /* LCD_R2 */
691 <STM32_PINMUX('J', 2, ANALOG)>, /* LCD_R3 */
692 <STM32_PINMUX('J', 3, ANALOG)>, /* LCD_R4 */
693 <STM32_PINMUX('J', 4, ANALOG)>, /* LCD_R5 */
694 <STM32_PINMUX('J', 5, ANALOG)>, /* LCD_R6 */
695 <STM32_PINMUX('J', 6, ANALOG)>, /* LCD_R7 */
696 <STM32_PINMUX('J', 7, ANALOG)>, /* LCD_G0 */
697 <STM32_PINMUX('J', 8, ANALOG)>, /* LCD_G1 */
698 <STM32_PINMUX('J', 9, ANALOG)>, /* LCD_G2 */
699 <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
700 <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
701 <STM32_PINMUX('K', 0, ANALOG)>, /* LCD_G5 */
702 <STM32_PINMUX('K', 1, ANALOG)>, /* LCD_G6 */
703 <STM32_PINMUX('K', 2, ANALOG)>, /* LCD_G7 */
704 <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
705 <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
706 <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
707 <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
708 <STM32_PINMUX('K', 3, ANALOG)>, /* LCD_B4 */
709 <STM32_PINMUX('K', 4, ANALOG)>, /* LCD_B5 */
710 <STM32_PINMUX('K', 5, ANALOG)>, /* LCD_B6 */
711 <STM32_PINMUX('K', 6, ANALOG)>; /* LCD_B7 */
715 ltdc_pins_c: ltdc-2 {
717 pinmux = <STM32_PINMUX('B', 1, AF9)>, /* LTDC_R6 */
718 <STM32_PINMUX('B', 9, AF14)>, /* LTDC_B7 */
719 <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */
720 <STM32_PINMUX('D', 3, AF14)>, /* LTDC_G7 */
721 <STM32_PINMUX('D', 6, AF14)>, /* LTDC_B2 */
722 <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
723 <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */
724 <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
725 <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */
726 <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
727 <STM32_PINMUX('H', 4, AF9)>, /* LTDC_G5 */
728 <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */
729 <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */
730 <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
731 <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
732 <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
733 <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */
734 <STM32_PINMUX('I', 5, AF14)>, /* LTDC_B5 */
735 <STM32_PINMUX('I', 6, AF14)>, /* LTDC_B6 */
736 <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */
737 <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
743 pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
750 ltdc_sleep_pins_c: ltdc-sleep-2 {
752 pinmux = <STM32_PINMUX('B', 1, ANALOG)>, /* LTDC_R6 */
753 <STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */
754 <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */
755 <STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */
756 <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */
757 <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
758 <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */
759 <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
760 <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */
761 <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
762 <STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G5 */
763 <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */
764 <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */
765 <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
766 <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
767 <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */
768 <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */
769 <STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */
770 <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */
771 <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */
772 <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */
773 <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */
777 ltdc_pins_d: ltdc-3 {
779 pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LCD_CLK */
785 pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
786 <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
787 <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */
788 <STM32_PINMUX('G', 13, AF14)>, /* LCD_R0 */
789 <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
790 <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
791 <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
792 <STM32_PINMUX('A', 5, AF14)>, /* LCD_R4 */
793 <STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */
794 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
795 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
796 <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
797 <STM32_PINMUX('B', 0, AF14)>, /* LCD_G1 */
798 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
799 <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */
800 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
801 <STM32_PINMUX('H', 4, AF9)>, /* LCD_G5 */
802 <STM32_PINMUX('I', 11, AF9)>, /* LCD_G6 */
803 <STM32_PINMUX('G', 8, AF14)>, /* LCD_G7 */
804 <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
805 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
806 <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
807 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
808 <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */
809 <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
810 <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
811 <STM32_PINMUX('I', 7, AF14)>; /* LCD_B7 */
818 ltdc_sleep_pins_d: ltdc-sleep-3 {
820 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
821 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
822 <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
823 <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */
824 <STM32_PINMUX('G', 13, ANALOG)>, /* LCD_R0 */
825 <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
826 <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
827 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
828 <STM32_PINMUX('A', 5, ANALOG)>, /* LCD_R4 */
829 <STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */
830 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
831 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
832 <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
833 <STM32_PINMUX('B', 0, ANALOG)>, /* LCD_G1 */
834 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
835 <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */
836 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
837 <STM32_PINMUX('H', 4, ANALOG)>, /* LCD_G5 */
838 <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */
839 <STM32_PINMUX('G', 8, ANALOG)>, /* LCD_G7 */
840 <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
841 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
842 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
843 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
844 <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */
845 <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
846 <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
847 <STM32_PINMUX('I', 7, ANALOG)>; /* LCD_B7 */
851 m_can1_pins_a: m-can1-0 {
853 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
859 pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
864 m_can1_sleep_pins_a: m_can1-sleep-0 {
866 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
867 <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
871 m_can1_pins_b: m-can1-1 {
873 pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
879 pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
884 m_can1_sleep_pins_b: m_can1-sleep-1 {
886 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */
887 <STM32_PINMUX('A', 11, ANALOG)>; /* CAN1_RX */
891 m_can2_pins_a: m-can2-0 {
893 pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
899 pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
904 m_can2_sleep_pins_a: m_can2-sleep-0 {
906 pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */
907 <STM32_PINMUX('B', 5, ANALOG)>; /* CAN2_RX */
911 pwm1_pins_a: pwm1-0 {
913 pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
914 <STM32_PINMUX('E', 11, AF1)>, /* TIM1_CH2 */
915 <STM32_PINMUX('E', 14, AF1)>; /* TIM1_CH4 */
922 pwm1_sleep_pins_a: pwm1-sleep-0 {
924 pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
925 <STM32_PINMUX('E', 11, ANALOG)>, /* TIM1_CH2 */
926 <STM32_PINMUX('E', 14, ANALOG)>; /* TIM1_CH4 */
930 pwm2_pins_a: pwm2-0 {
932 pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
939 pwm2_sleep_pins_a: pwm2-sleep-0 {
941 pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */
945 pwm3_pins_a: pwm3-0 {
947 pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */
954 pwm3_sleep_pins_a: pwm3-sleep-0 {
956 pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */
960 pwm3_pins_b: pwm3-1 {
962 pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
969 pwm3_sleep_pins_b: pwm3-sleep-1 {
971 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
975 pwm4_pins_a: pwm4-0 {
977 pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */
978 <STM32_PINMUX('D', 15, AF2)>; /* TIM4_CH4 */
985 pwm4_sleep_pins_a: pwm4-sleep-0 {
987 pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */
988 <STM32_PINMUX('D', 15, ANALOG)>; /* TIM4_CH4 */
992 pwm4_pins_b: pwm4-1 {
994 pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
1001 pwm4_sleep_pins_b: pwm4-sleep-1 {
1003 pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
1007 pwm5_pins_a: pwm5-0 {
1009 pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */
1016 pwm5_sleep_pins_a: pwm5-sleep-0 {
1018 pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */
1022 pwm5_pins_b: pwm5-1 {
1024 pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */
1025 <STM32_PINMUX('H', 12, AF2)>, /* TIM5_CH3 */
1026 <STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */
1033 pwm5_sleep_pins_b: pwm5-sleep-1 {
1035 pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */
1036 <STM32_PINMUX('H', 12, ANALOG)>, /* TIM5_CH3 */
1037 <STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */
1041 pwm8_pins_a: pwm8-0 {
1043 pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
1050 pwm8_sleep_pins_a: pwm8-sleep-0 {
1052 pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */
1056 pwm12_pins_a: pwm12-0 {
1058 pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
1065 pwm12_sleep_pins_a: pwm12-sleep-0 {
1067 pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
1071 qspi_clk_pins_a: qspi-clk-0 {
1073 pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
1080 qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
1082 pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
1086 qspi_bk1_pins_a: qspi-bk1-0 {
1088 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
1089 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
1090 <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
1091 <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
1097 pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
1104 qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
1106 pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
1107 <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
1108 <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
1109 <STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */
1110 <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
1114 qspi_bk2_pins_a: qspi-bk2-0 {
1116 pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
1117 <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
1118 <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
1119 <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
1125 pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
1132 qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
1134 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
1135 <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
1136 <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
1137 <STM32_PINMUX('G', 7, ANALOG)>, /* QSPI_BK2_IO3 */
1138 <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
1142 sai2a_pins_a: sai2a-0 {
1144 pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
1145 <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1146 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
1147 <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
1154 sai2a_sleep_pins_a: sai2a-sleep-0 {
1156 pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
1157 <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1158 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
1159 <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
1163 sai2a_pins_b: sai2a-1 {
1165 pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1166 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
1167 <STM32_PINMUX('D', 13, AF10)>; /* SAI2_SCK_A */
1174 sai2a_sleep_pins_b: sai2a-sleep-1 {
1176 pinmux = <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1177 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
1178 <STM32_PINMUX('D', 13, ANALOG)>; /* SAI2_SCK_A */
1182 sai2a_pins_c: sai2a-4 {
1184 pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */
1185 <STM32_PINMUX('D', 11, AF10)>, /* SAI2_SD_A */
1186 <STM32_PINMUX('D', 12, AF10)>; /* SAI2_FS_A */
1193 sai2a_sleep_pins_c: sai2a-5 {
1195 pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */
1196 <STM32_PINMUX('D', 11, ANALOG)>, /* SAI2_SD_A */
1197 <STM32_PINMUX('D', 12, ANALOG)>; /* SAI2_FS_A */
1201 sai2b_pins_a: sai2b-0 {
1203 pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
1204 <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
1205 <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
1211 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1216 sai2b_sleep_pins_a: sai2b-sleep-0 {
1218 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
1219 <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
1220 <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
1221 <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
1225 sai2b_pins_b: sai2b-1 {
1227 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1232 sai2b_sleep_pins_b: sai2b-sleep-1 {
1234 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1238 sai2b_pins_c: sai2a-4 {
1240 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1245 sai2b_sleep_pins_c: sai2a-sleep-5 {
1247 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1251 sai4a_pins_a: sai4a-0 {
1253 pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
1260 sai4a_sleep_pins_a: sai4a-sleep-0 {
1262 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
1266 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
1268 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1269 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1270 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1271 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
1272 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1278 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1285 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
1287 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1288 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1289 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1290 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1296 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1302 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1309 sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 {
1311 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1312 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1313 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1314 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1321 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
1323 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
1324 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
1325 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
1326 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
1327 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
1328 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
1332 sdmmc1_dir_pins_a: sdmmc1-dir-0 {
1334 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1335 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
1336 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1342 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1347 sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 {
1349 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1350 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
1351 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1358 sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
1360 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1361 <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
1362 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
1363 <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
1367 sdmmc1_dir_pins_b: sdmmc1-dir-1 {
1369 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1370 <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
1371 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1377 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1382 sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
1384 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1385 <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */
1386 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
1387 <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
1391 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
1393 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1394 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1395 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1396 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
1397 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1403 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1410 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
1412 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1413 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1414 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1415 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
1421 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1427 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1434 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
1436 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
1437 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
1438 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
1439 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
1440 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
1441 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
1445 sdmmc2_b4_pins_b: sdmmc2-b4-1 {
1447 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1448 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1449 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1450 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
1451 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1457 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1464 sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
1466 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1467 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1468 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1469 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
1475 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1481 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1488 sdmmc2_d47_pins_a: sdmmc2-d47-0 {
1490 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1491 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1492 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
1493 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
1500 sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
1502 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1503 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1504 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
1505 <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
1509 sdmmc2_d47_pins_b: sdmmc2-d47-1 {
1511 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1512 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1513 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
1514 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1521 sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
1523 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1524 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1525 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
1526 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1530 sdmmc2_d47_pins_c: sdmmc2-d47-2 {
1532 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1533 <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
1534 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
1535 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1542 sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 {
1544 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1545 <STM32_PINMUX('A', 15, ANALOG)>, /* SDMMC2_D5 */
1546 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
1547 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1551 sdmmc2_d47_pins_d: sdmmc2-d47-3 {
1553 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1554 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1555 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
1556 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1560 sdmmc2_d47_sleep_pins_d: sdmmc2-d47-sleep-3 {
1562 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1563 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1564 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
1565 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1569 sdmmc3_b4_pins_a: sdmmc3-b4-0 {
1571 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1572 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1573 <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
1574 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
1575 <STM32_PINMUX('F', 1, AF9)>; /* SDMMC3_CMD */
1581 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1588 sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
1590 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1591 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1592 <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
1593 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
1599 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1605 pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */
1612 sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 {
1614 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1615 <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
1616 <STM32_PINMUX('F', 5, ANALOG)>, /* SDMMC3_D2 */
1617 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
1618 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
1619 <STM32_PINMUX('F', 1, ANALOG)>; /* SDMMC3_CMD */
1623 sdmmc3_b4_pins_b: sdmmc3-b4-1 {
1625 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1626 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1627 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
1628 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
1629 <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
1635 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1642 sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
1644 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1645 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1646 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
1647 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
1653 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1659 pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */
1666 sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
1668 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1669 <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
1670 <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
1671 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
1672 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
1673 <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
1677 spdifrx_pins_a: spdifrx-0 {
1679 pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
1684 spdifrx_sleep_pins_a: spdifrx-sleep-0 {
1686 pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
1690 spi2_pins_a: spi2-0 {
1692 pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI1_SCK */
1693 <STM32_PINMUX('I', 3, AF5)>; /* SPI1_MOSI */
1700 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI1_MISO */
1705 spi4_pins_a: spi4-0 {
1707 pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
1708 <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */
1714 pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
1719 stusb1600_pins_a: stusb1600-0 {
1721 pinmux = <STM32_PINMUX('I', 11, ANALOG)>;
1726 uart4_pins_a: uart4-0 {
1728 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
1734 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1739 uart4_idle_pins_a: uart4-idle-0 {
1741 pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
1744 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1749 uart4_sleep_pins_a: uart4-sleep-0 {
1751 pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */
1752 <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
1756 uart4_pins_b: uart4-1 {
1758 pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
1764 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1769 uart4_pins_c: uart4-2 {
1771 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
1777 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1782 uart7_pins_a: uart7-0 {
1784 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
1790 pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
1791 <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */
1792 <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */
1797 uart7_pins_b: uart7-1 {
1799 pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
1805 pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
1810 uart7_pins_c: uart7-2 {
1812 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
1818 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
1823 uart7_idle_pins_c: uart7-idle-2 {
1825 pinmux = <STM32_PINMUX('E', 8, ANALOG)>; /* UART7_TX */
1828 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
1833 uart7_sleep_pins_c: uart7-sleep-2 {
1835 pinmux = <STM32_PINMUX('E', 8, ANALOG)>, /* UART7_TX */
1836 <STM32_PINMUX('E', 7, ANALOG)>; /* UART7_RX */
1840 uart8_pins_a: uart8-0 {
1842 pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
1848 pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
1853 uart8_rtscts_pins_a: uart8rtscts-0 {
1855 pinmux = <STM32_PINMUX('G', 7, AF8)>, /* UART8_RTS */
1856 <STM32_PINMUX('G', 10, AF8)>; /* UART8_CTS */
1861 usart2_pins_a: usart2-0 {
1863 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
1864 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
1870 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
1871 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
1876 usart2_sleep_pins_a: usart2-sleep-0 {
1878 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
1879 <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
1880 <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
1881 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
1885 usart2_pins_b: usart2-1 {
1887 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
1888 <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
1894 pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
1895 <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
1900 usart2_sleep_pins_b: usart2-sleep-1 {
1902 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
1903 <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */
1904 <STM32_PINMUX('F', 4, ANALOG)>, /* USART2_RX */
1905 <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
1909 usart2_pins_c: usart2-2 {
1911 pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
1912 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
1918 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
1919 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
1924 usart2_idle_pins_c: usart2-idle-2 {
1926 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
1927 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
1930 pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
1936 pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
1941 usart2_sleep_pins_c: usart2-sleep-2 {
1943 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
1944 <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
1945 <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
1946 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
1950 usart3_pins_a: usart3-0 {
1952 pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
1958 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
1963 usart3_pins_b: usart3-1 {
1965 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
1966 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
1972 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
1973 <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */
1978 usart3_idle_pins_b: usart3-idle-1 {
1980 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
1981 <STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */
1984 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
1990 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
1995 usart3_sleep_pins_b: usart3-sleep-1 {
1997 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
1998 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
1999 <STM32_PINMUX('I', 10, ANALOG)>, /* USART3_CTS_NSS */
2000 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
2004 usart3_pins_c: usart3-2 {
2006 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2007 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2013 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
2014 <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */
2019 usart3_idle_pins_c: usart3-idle-2 {
2021 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2022 <STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */
2025 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2031 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2036 usart3_sleep_pins_c: usart3-sleep-2 {
2038 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2039 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2040 <STM32_PINMUX('B', 13, ANALOG)>, /* USART3_CTS_NSS */
2041 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
2045 usbotg_hs_pins_a: usbotg-hs-0 {
2047 pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
2051 usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
2053 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
2054 <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
2060 i2c2_pins_b2: i2c2-0 {
2062 pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
2069 i2c2_sleep_pins_b2: i2c2-sleep-0 {
2071 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
2075 i2c4_pins_a: i2c4-0 {
2077 pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
2078 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
2085 i2c4_sleep_pins_a: i2c4-sleep-0 {
2087 pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
2088 <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
2092 i2c6_pins_a: i2c6-0 {
2094 pinmux = <STM32_PINMUX('Z', 6, AF2)>, /* I2C6_SCL */
2095 <STM32_PINMUX('Z', 7, AF2)>; /* I2C6_SDA */
2102 i2c6_sleep_pins_a: i2c6-sleep-0 {
2104 pinmux = <STM32_PINMUX('Z', 6, ANALOG)>, /* I2C6_SCL */
2105 <STM32_PINMUX('Z', 7, ANALOG)>; /* I2C6_SDA */
2109 spi1_pins_a: spi1-0 {
2111 pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
2112 <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
2119 pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */