arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2016 Intel. All rights reserved.
   4  */
   5
   6 /dts-v1/;
   7 #include "socfpga_arria10_socdk.dtsi"
   8
   9 &qspi {
  10         status = "okay";
  11
  12         flash0: n25q00@0 {
  13                 #address-cells = <1>;
  14                 #size-cells = <1>;
  15                 compatible = "n25q00aa";
  16                 reg = <0>;
  17                 spi-max-frequency = <100000000>;
  18
  19                 m25p,fast-read;
  20                 cdns,page-size = <256>;
  21                 cdns,block-size = <16>;
  22                 cdns,read-delay = <4>;
  23                 cdns,tshsl-ns = <50>;
  24                 cdns,tsd2d-ns = <50>;
  25                 cdns,tchsh-ns = <4>;
  26                 cdns,tslch-ns = <4>;
  27
  28                 partition@qspi-boot {
  29                         label = "Boot and fpga data";
  30                         reg = <0x0 0x2720000>;
  31                 };
  32
  33                 partition@qspi-rootfs {
  34                         label = "Root Filesystem - JFFS2";
  35                         reg = <0x2720000 0x58E0000>;
  36                 };
  37         };
  38 };