1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
5 * Copyright (C) 2014 Atmel,
6 * 2014 Nicolas Ferre <nicolas.ferre@atmel.com>
9 #include <dt-bindings/clock/at91.h>
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
18 model = "Atmel SAMA5D4 family SoC";
19 compatible = "atmel,sama5d4";
20 interrupt-parent = <&aic>;
50 compatible = "arm,cortex-a5";
52 next-level-cache = <&L2>;
57 device_type = "memory";
58 reg = <0x20000000 0x20000000>;
62 slow_xtal: slow_xtal {
63 compatible = "fixed-clock";
65 clock-frequency = <0>;
68 main_xtal: main_xtal {
69 compatible = "fixed-clock";
71 clock-frequency = <0>;
74 adc_op_clk: adc_op_clk{
75 compatible = "fixed-clock";
77 clock-frequency = <1000000>;
81 ns_sram: sram@210000 {
82 compatible = "mmio-sram";
83 reg = <0x00210000 0x10000>;
87 compatible = "simple-bus";
92 nfc_sram: sram@100000 {
93 compatible = "mmio-sram";
95 reg = <0x100000 0x2400>;
99 compatible = "atmel,sama5d3-udc";
100 reg = <0x00400000 0x100000
102 interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>;
103 clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
104 clock-names = "pclk", "hclk";
109 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
110 reg = <0x00500000 0x100000>;
111 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
112 clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 6>;
113 clock-names = "ohci_clk", "hclk", "uhpck";
118 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
119 reg = <0x00600000 0x100000>;
120 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
121 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 46>;
122 clock-names = "usb_clk", "ehci_clk";
126 L2: cache-controller@a00000 {
127 compatible = "arm,pl310-cache";
128 reg = <0x00a00000 0x1000>;
129 interrupts = <67 IRQ_TYPE_LEVEL_HIGH 4>;
135 compatible = "atmel,sama5d3-ebi";
136 #address-cells = <2>;
139 reg = <0x10000000 0x10000000
140 0x60000000 0x28000000>;
141 ranges = <0x0 0x0 0x10000000 0x10000000
142 0x1 0x0 0x60000000 0x10000000
143 0x2 0x0 0x70000000 0x10000000
144 0x3 0x0 0x80000000 0x8000000>;
145 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
148 nand_controller: nand-controller {
149 compatible = "atmel,sama5d3-nand-controller";
150 atmel,nfc-sram = <&nfc_sram>;
151 atmel,nfc-io = <&nfc_io>;
152 ecc-engine = <&pmecc>;
153 #address-cells = <2>;
160 nfc_io: nfc-io@90000000 {
161 compatible = "atmel,sama5d3-nfc-io", "syscon";
162 reg = <0x90000000 0x8000000>;
166 compatible = "simple-bus";
167 #address-cells = <1>;
171 hlcdc: hlcdc@f0000000 {
172 compatible = "atmel,sama5d4-hlcdc";
173 reg = <0xf0000000 0x4000>;
174 interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>;
175 clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
176 clock-names = "periph_clk","sys_clk", "slow_clk";
179 hlcdc-display-controller {
180 compatible = "atmel,hlcdc-display-controller";
181 #address-cells = <1>;
185 #address-cells = <1>;
191 hlcdc_pwm: hlcdc-pwm {
192 compatible = "atmel,hlcdc-pwm";
193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_lcd_pwm>;
199 dma1: dma-controller@f0004000 {
200 compatible = "atmel,sama5d4-dma";
201 reg = <0xf0004000 0x200>;
202 interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
204 clocks = <&pmc PMC_TYPE_PERIPHERAL 50>;
205 clock-names = "dma_clk";
209 compatible = "atmel,at91sam9g45-isi";
210 reg = <0xf0008000 0x4000>;
211 interrupts = <52 IRQ_TYPE_LEVEL_HIGH 5>;
212 pinctrl-names = "default";
213 pinctrl-0 = <&pinctrl_isi_data_0_7>;
214 clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
215 clock-names = "isi_clk";
218 #address-cells = <1>;
223 ramc0: ramc@f0010000 {
224 compatible = "atmel,sama5d3-ddramc";
225 reg = <0xf0010000 0x200>;
226 clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 16>;
227 clock-names = "ddrck", "mpddr";
230 dma0: dma-controller@f0014000 {
231 compatible = "atmel,sama5d4-dma";
232 reg = <0xf0014000 0x200>;
233 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
235 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
236 clock-names = "dma_clk";
240 compatible = "atmel,sama5d4-pmc", "syscon";
241 reg = <0xf0018000 0x120>;
242 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
244 clocks = <&clk32k>, <&main_xtal>;
245 clock-names = "slow_clk", "main_xtal";
249 compatible = "atmel,hsmci";
250 reg = <0xf8000000 0x600>;
251 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
253 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
254 | AT91_XDMAC_DT_PERID(0))>;
256 pinctrl-names = "default";
257 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>;
259 #address-cells = <1>;
261 clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
262 clock-names = "mci_clk";
265 uart0: serial@f8004000 {
266 compatible = "atmel,at91sam9260-usart";
267 reg = <0xf8004000 0x100>;
268 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>;
270 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
271 | AT91_XDMAC_DT_PERID(22))>,
273 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
274 | AT91_XDMAC_DT_PERID(23))>;
275 dma-names = "tx", "rx";
276 pinctrl-names = "default";
277 pinctrl-0 = <&pinctrl_uart0>;
278 clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
279 clock-names = "usart";
284 compatible = "atmel,at91sam9g45-ssc";
285 reg = <0xf8008000 0x4000>;
286 interrupts = <48 IRQ_TYPE_LEVEL_HIGH 0>;
287 pinctrl-names = "default";
288 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
290 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
291 | AT91_XDMAC_DT_PERID(26))>,
293 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
294 | AT91_XDMAC_DT_PERID(27))>;
295 dma-names = "tx", "rx";
296 clocks = <&pmc PMC_TYPE_PERIPHERAL 48>;
297 clock-names = "pclk";
302 compatible = "atmel,sama5d3-pwm";
303 reg = <0xf800c000 0x300>;
304 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>;
306 clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
311 #address-cells = <1>;
313 compatible = "atmel,at91rm9200-spi";
314 reg = <0xf8010000 0x100>;
315 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>;
317 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
318 | AT91_XDMAC_DT_PERID(10))>,
320 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
321 | AT91_XDMAC_DT_PERID(11))>;
322 dma-names = "tx", "rx";
323 pinctrl-names = "default";
324 pinctrl-0 = <&pinctrl_spi0>;
325 clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
326 clock-names = "spi_clk";
331 compatible = "atmel,sama5d4-i2c";
332 reg = <0xf8014000 0x4000>;
333 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
335 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
336 | AT91_XDMAC_DT_PERID(2))>,
338 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
339 | AT91_XDMAC_DT_PERID(3))>;
340 dma-names = "tx", "rx";
341 pinctrl-names = "default", "gpio";
342 pinctrl-0 = <&pinctrl_i2c0>;
343 pinctrl-1 = <&pinctrl_i2c0_gpio>;
344 sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>;
345 scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
346 #address-cells = <1>;
348 clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
353 compatible = "atmel,sama5d4-i2c";
354 reg = <0xf8018000 0x4000>;
355 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>;
357 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
358 | AT91_XDMAC_DT_PERID(4))>,
360 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
361 | AT91_XDMAC_DT_PERID(5))>;
362 dma-names = "tx", "rx";
363 pinctrl-names = "default", "gpio";
364 pinctrl-0 = <&pinctrl_i2c1>;
365 pinctrl-1 = <&pinctrl_i2c1_gpio>;
366 sda-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>;
367 scl-gpios = <&pioE 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
368 #address-cells = <1>;
370 clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
374 tcb0: timer@f801c000 {
375 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
376 #address-cells = <1>;
378 reg = <0xf801c000 0x100>;
379 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
380 clocks = <&pmc PMC_TYPE_PERIPHERAL 40>, <&clk32k>;
381 clock-names = "t0_clk", "slow_clk";
384 macb0: ethernet@f8020000 {
385 compatible = "atmel,sama5d4-gem";
386 reg = <0xf8020000 0x100>;
387 interrupts = <54 IRQ_TYPE_LEVEL_HIGH 3>;
388 pinctrl-names = "default";
389 pinctrl-0 = <&pinctrl_macb0_rmii>;
390 #address-cells = <1>;
392 clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_PERIPHERAL 54>;
393 clock-names = "hclk", "pclk";
398 compatible = "atmel,sama5d4-i2c";
399 reg = <0xf8024000 0x4000>;
400 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
402 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
403 | AT91_XDMAC_DT_PERID(6))>,
405 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
406 | AT91_XDMAC_DT_PERID(7))>;
407 dma-names = "tx", "rx";
408 pinctrl-names = "default", "gpio";
409 pinctrl-0 = <&pinctrl_i2c2>;
410 pinctrl-1 = <&pinctrl_i2c2_gpio>;
411 sda-gpios = <&pioB 29 GPIO_ACTIVE_HIGH>;
412 scl-gpios = <&pioB 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
413 #address-cells = <1>;
415 clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
420 compatible = "atmel,sama5d4-sfr", "syscon";
421 reg = <0xf8028000 0x60>;
424 usart0: serial@f802c000 {
425 compatible = "atmel,at91sam9260-usart";
426 reg = <0xf802c000 0x100>;
427 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
429 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
430 | AT91_XDMAC_DT_PERID(36))>,
432 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
433 | AT91_XDMAC_DT_PERID(37))>;
434 dma-names = "tx", "rx";
435 pinctrl-names = "default";
436 pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts &pinctrl_usart0_cts>;
437 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
438 clock-names = "usart";
442 usart1: serial@f8030000 {
443 compatible = "atmel,at91sam9260-usart";
444 reg = <0xf8030000 0x100>;
445 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
447 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
448 | AT91_XDMAC_DT_PERID(38))>,
450 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
451 | AT91_XDMAC_DT_PERID(39))>;
452 dma-names = "tx", "rx";
453 pinctrl-names = "default";
454 pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts>;
455 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
456 clock-names = "usart";
461 compatible = "atmel,hsmci";
462 reg = <0xfc000000 0x600>;
463 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
465 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
466 | AT91_XDMAC_DT_PERID(1))>;
468 pinctrl-names = "default";
469 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
471 #address-cells = <1>;
473 clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
474 clock-names = "mci_clk";
477 uart1: serial@fc004000 {
478 compatible = "atmel,at91sam9260-usart";
479 reg = <0xfc004000 0x100>;
480 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
482 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
483 | AT91_XDMAC_DT_PERID(24))>,
485 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
486 | AT91_XDMAC_DT_PERID(25))>;
487 dma-names = "tx", "rx";
488 pinctrl-names = "default";
489 pinctrl-0 = <&pinctrl_uart1>;
490 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
491 clock-names = "usart";
495 usart2: serial@fc008000 {
496 compatible = "atmel,at91sam9260-usart";
497 reg = <0xfc008000 0x100>;
498 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
500 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
501 | AT91_XDMAC_DT_PERID(16))>,
503 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
504 | AT91_XDMAC_DT_PERID(17))>;
505 dma-names = "tx", "rx";
506 pinctrl-names = "default";
507 pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
508 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
509 clock-names = "usart";
513 usart3: serial@fc00c000 {
514 compatible = "atmel,at91sam9260-usart";
515 reg = <0xfc00c000 0x100>;
516 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
518 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
519 | AT91_XDMAC_DT_PERID(18))>,
521 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
522 | AT91_XDMAC_DT_PERID(19))>;
523 dma-names = "tx", "rx";
524 pinctrl-names = "default";
525 pinctrl-0 = <&pinctrl_usart3>;
526 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
527 clock-names = "usart";
531 usart4: serial@fc010000 {
532 compatible = "atmel,at91sam9260-usart";
533 reg = <0xfc010000 0x100>;
534 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
536 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
537 | AT91_XDMAC_DT_PERID(20))>,
539 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
540 | AT91_XDMAC_DT_PERID(21))>;
541 dma-names = "tx", "rx";
542 pinctrl-names = "default";
543 pinctrl-0 = <&pinctrl_usart4>;
544 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>;
545 clock-names = "usart";
550 compatible = "atmel,at91sam9g45-ssc";
551 reg = <0xfc014000 0x4000>;
552 interrupts = <49 IRQ_TYPE_LEVEL_HIGH 0>;
553 pinctrl-names = "default";
554 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
556 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
557 | AT91_XDMAC_DT_PERID(28))>,
559 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
560 | AT91_XDMAC_DT_PERID(29))>;
561 dma-names = "tx", "rx";
562 clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
563 clock-names = "pclk";
568 #address-cells = <1>;
570 compatible = "atmel,at91rm9200-spi";
571 reg = <0xfc018000 0x100>;
572 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 3>;
574 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
575 | AT91_XDMAC_DT_PERID(12))>,
577 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
578 | AT91_XDMAC_DT_PERID(13))>;
579 dma-names = "tx", "rx";
580 pinctrl-names = "default";
581 pinctrl-0 = <&pinctrl_spi1>;
582 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
583 clock-names = "spi_clk";
588 #address-cells = <1>;
590 compatible = "atmel,at91rm9200-spi";
591 reg = <0xfc01c000 0x100>;
592 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 3>;
594 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
595 | AT91_XDMAC_DT_PERID(14))>,
597 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
598 | AT91_XDMAC_DT_PERID(15))>;
599 dma-names = "tx", "rx";
600 pinctrl-names = "default";
601 pinctrl-0 = <&pinctrl_spi2>;
602 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
603 clock-names = "spi_clk";
607 tcb1: timer@fc020000 {
608 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
609 #address-cells = <1>;
611 reg = <0xfc020000 0x100>;
612 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
613 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&clk32k>;
614 clock-names = "t0_clk", "slow_clk";
617 tcb2: timer@fc024000 {
618 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
619 #address-cells = <1>;
621 reg = <0xfc024000 0x100>;
622 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
623 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&clk32k>;
624 clock-names = "t0_clk", "slow_clk";
627 macb1: ethernet@fc028000 {
628 compatible = "atmel,sama5d4-gem";
629 reg = <0xfc028000 0x100>;
630 interrupts = <55 IRQ_TYPE_LEVEL_HIGH 3>;
631 pinctrl-names = "default";
632 pinctrl-0 = <&pinctrl_macb1_rmii>;
633 #address-cells = <1>;
635 clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_PERIPHERAL 55>;
636 clock-names = "hclk", "pclk";
641 compatible = "atmel,at91sam9g45-trng";
642 reg = <0xfc030000 0x100>;
643 interrupts = <53 IRQ_TYPE_LEVEL_HIGH 0>;
644 clocks = <&pmc PMC_TYPE_PERIPHERAL 53>;
648 compatible = "atmel,at91sam9x5-adc";
649 reg = <0xfc034000 0x100>;
650 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>;
651 clocks = <&pmc PMC_TYPE_PERIPHERAL 44>,
653 clock-names = "adc_clk", "adc_op_clk";
654 atmel,adc-channels-used = <0x01f>;
655 atmel,adc-startup-time = <40>;
656 atmel,adc-use-external-triggers;
657 atmel,adc-vref = <3000>;
658 atmel,adc-res = <8 10>;
659 atmel,adc-sample-hold-time = <11>;
660 atmel,adc-res-names = "lowres", "highres";
661 atmel,adc-ts-pressure-threshold = <10000>;
665 trigger-name = "external-rising";
666 trigger-value = <0x1>;
670 trigger-name = "external-falling";
671 trigger-value = <0x2>;
675 trigger-name = "external-any";
676 trigger-value = <0x3>;
680 trigger-name = "continuous";
681 trigger-value = <0x6>;
686 compatible = "atmel,at91sam9g46-aes";
687 reg = <0xfc044000 0x100>;
688 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
689 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
690 | AT91_XDMAC_DT_PERID(41))>,
691 <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
692 | AT91_XDMAC_DT_PERID(40))>;
693 dma-names = "tx", "rx";
694 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
695 clock-names = "aes_clk";
700 compatible = "atmel,at91sam9g46-tdes";
701 reg = <0xfc04c000 0x100>;
702 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 0>;
703 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
704 | AT91_XDMAC_DT_PERID(42))>,
705 <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
706 | AT91_XDMAC_DT_PERID(43))>;
707 dma-names = "tx", "rx";
708 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
709 clock-names = "tdes_clk";
714 compatible = "atmel,at91sam9g46-sha";
715 reg = <0xfc050000 0x100>;
716 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 0>;
717 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
718 | AT91_XDMAC_DT_PERID(44))>;
720 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
721 clock-names = "sha_clk";
726 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
727 reg = <0xfc05c000 0x1000>;
728 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
729 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
730 #address-cells = <1>;
734 pmecc: ecc-engine@ffffc070 {
735 compatible = "atmel,sama5d4-pmecc";
736 reg = <0xfc05c070 0x490>,
741 reset_controller: rstc@fc068600 {
742 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
743 reg = <0xfc068600 0x10>;
747 shutdown_controller: shdwc@fc068610 {
748 compatible = "atmel,at91sam9x5-shdwc";
749 reg = <0xfc068610 0x10>;
753 pit: timer@fc068630 {
754 compatible = "atmel,at91sam9260-pit";
755 reg = <0xfc068630 0x10>;
756 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
757 clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
760 watchdog: watchdog@fc068640 {
761 compatible = "atmel,sama5d4-wdt";
762 reg = <0xfc068640 0x10>;
763 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
768 clk32k: sckc@fc068650 {
769 compatible = "atmel,sama5d4-sckc";
770 reg = <0xfc068650 0x4>;
772 clocks = <&slow_xtal>;
776 compatible = "atmel,sama5d4-rtc";
777 reg = <0xfc0686b0 0x30>;
778 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
782 dbgu: serial@fc069000 {
783 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
784 reg = <0xfc069000 0x200>;
785 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
786 pinctrl-names = "default";
787 pinctrl-0 = <&pinctrl_dbgu>;
788 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
789 clock-names = "usart";
794 pinctrl: pinctrl@fc06a000 {
795 #address-cells = <1>;
797 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
798 ranges = <0xfc068000 0xfc068000 0x100
799 0xfc06a000 0xfc06a000 0x4000>;
800 /* WARNING: revisit as pin spec has changed */
803 0xffffffff 0x3ffcfe7c 0x1c010101 /* pioA */
804 0x7fffffff 0xfffccc3a 0x3f00cc3a /* pioB */
805 0xffffffff 0x3ff83fff 0xff00ffff /* pioC */
806 0x0003ff00 0x8002a800 0x00000000 /* pioD */
807 0xffffffff 0x7fffffff 0x76fff1bf /* pioE */
810 pioA: gpio@fc06a000 {
811 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
812 reg = <0xfc06a000 0x100>;
813 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 1>;
816 interrupt-controller;
817 #interrupt-cells = <2>;
818 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
821 pioB: gpio@fc06b000 {
822 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
823 reg = <0xfc06b000 0x100>;
824 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 1>;
827 interrupt-controller;
828 #interrupt-cells = <2>;
829 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
832 pioC: gpio@fc06c000 {
833 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
834 reg = <0xfc06c000 0x100>;
835 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 1>;
838 interrupt-controller;
839 #interrupt-cells = <2>;
840 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
843 pioD: gpio@fc068000 {
844 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
845 reg = <0xfc068000 0x100>;
846 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
849 interrupt-controller;
850 #interrupt-cells = <2>;
851 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
854 pioE: gpio@fc06d000 {
855 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
856 reg = <0xfc06d000 0x100>;
857 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 1>;
860 interrupt-controller;
861 #interrupt-cells = <2>;
862 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
865 /* pinctrl pin settings */
867 pinctrl_adc0_adtrg: adc0_adtrg {
869 <AT91_PIOE 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with USBA_VBUS */
871 pinctrl_adc0_ad0: adc0_ad0 {
873 <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
875 pinctrl_adc0_ad1: adc0_ad1 {
877 <AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
879 pinctrl_adc0_ad2: adc0_ad2 {
881 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
883 pinctrl_adc0_ad3: adc0_ad3 {
885 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
887 pinctrl_adc0_ad4: adc0_ad4 {
889 <AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
894 pinctrl_dbgu: dbgu-0 {
896 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with D14 and TDI */
897 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with D15 and TDO */
902 pinctrl_ebi_addr: ebi-addr-0 {
904 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE
905 AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
906 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
907 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
908 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
909 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
910 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
911 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
912 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
913 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
914 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
915 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
916 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
917 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
918 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
919 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
920 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
921 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
922 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
923 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
924 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
925 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
926 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE
927 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
928 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
929 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
932 pinctrl_ebi_nand_addr: ebi-addr-1 {
934 <AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
935 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
938 pinctrl_ebi_cs0: ebi-cs0-0 {
940 <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
943 pinctrl_ebi_cs1: ebi-cs1-0 {
945 <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
948 pinctrl_ebi_cs2: ebi-cs2-0 {
950 <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
953 pinctrl_ebi_cs3: ebi-cs3-0 {
955 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
958 pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
960 <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE
961 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE
962 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE
963 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE
964 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE
965 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE
966 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE
967 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
970 pinctrl_ebi_data_8_15: ebi-data-msb-0 {
972 <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE
973 AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE
974 AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE
975 AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE
976 AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE
977 AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE
978 AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE
979 AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
982 pinctrl_ebi_nandrdy: ebi-nandrdy-0 {
984 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
987 pinctrl_ebi_nrd_nandoe: ebi-nrd-nandoe-0 {
989 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
992 pinctrl_ebi_nwait: ebi-nwait-0 {
994 <AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
997 pinctrl_ebi_nwe_nandwe: ebi-nwe-nandwe-0 {
999 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1002 pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
1004 <AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1009 pinctrl_i2c0: i2c0-0 {
1011 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
1012 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1015 pinctrl_i2c0_gpio: i2c0-gpio {
1017 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1018 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1023 pinctrl_i2c1: i2c1-0 {
1025 <AT91_PIOE 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* TWD1, conflicts with UART0 RX and DIBP */
1026 AT91_PIOE 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* TWCK1, conflicts with UART0 TX and DIBN */
1029 pinctrl_i2c1_gpio: i2c1-gpio {
1031 <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1032 AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1037 pinctrl_i2c2: i2c2-0 {
1039 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* TWD2, conflicts with RD0 and PWML1 */
1040 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* TWCK2, conflicts with RF0 */
1043 pinctrl_i2c2_gpio: i2c2-gpio {
1045 <AT91_PIOB 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1046 AT91_PIOB 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1051 pinctrl_isi_data_0_7: isi-0-data-0-7 {
1053 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D0 */
1054 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D1 */
1055 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D2 */
1056 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D3 */
1057 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D4 */
1058 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D5 */
1059 AT91_PIOC 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D6 */
1060 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D7 */
1061 AT91_PIOB 1 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_PCK, conflict with G0_RXCK */
1062 AT91_PIOB 3 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_VSYNC */
1063 AT91_PIOB 4 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_HSYNC */
1065 pinctrl_isi_data_8_9: isi-0-data-8-9 {
1067 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_D8, conflicts with SPI0_MISO, PWMH2 */
1068 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_D9, conflicts with SPI0_MOSI, PWML2 */
1070 pinctrl_isi_data_10_11: isi-0-data-10-11 {
1072 <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_D10, conflicts with SPI0_SPCK, PWMH3 */
1073 AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_D11, conflicts with SPI0_NPCS0, PWML3 */
1078 pinctrl_lcd_base: lcd-base-0 {
1080 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */
1081 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */
1082 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */
1083 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
1085 pinctrl_lcd_pwm: lcd-pwm-0 {
1086 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */
1088 pinctrl_lcd_rgb444: lcd-rgb-0 {
1090 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1091 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1092 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1093 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1094 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1095 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1096 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1097 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1098 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1099 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1100 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1101 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD11 pin */
1103 pinctrl_lcd_rgb565: lcd-rgb-1 {
1105 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1106 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1107 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1108 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1109 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1110 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1111 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1112 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1113 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1114 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1115 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1116 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1117 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1118 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1119 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1120 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD15 pin */
1122 pinctrl_lcd_rgb666: lcd-rgb-2 {
1124 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1125 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1126 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1127 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1128 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1129 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1130 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1131 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1132 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1133 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1134 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1135 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1136 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1137 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1138 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1139 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1140 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1141 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1143 pinctrl_lcd_rgb777: lcd-rgb-3 {
1145 /* LCDDAT0 conflicts with TMS */
1146 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1147 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1148 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1149 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1150 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1151 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1152 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1153 /* LCDDAT8 conflicts with TCK */
1154 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1155 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1156 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1157 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1158 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1159 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1160 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1161 /* LCDDAT16 conflicts with NTRST */
1162 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
1163 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1164 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1165 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1166 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1167 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1168 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1170 pinctrl_lcd_rgb888: lcd-rgb-4 {
1172 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1173 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1174 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1175 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1176 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1177 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1178 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1179 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1180 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1181 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1182 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1183 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1184 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1185 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1186 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1187 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1188 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */
1189 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
1190 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1191 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1192 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1193 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1194 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1195 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1200 pinctrl_macb0_rmii: macb0_rmii-0 {
1202 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX0 */
1203 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX1 */
1204 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX0 */
1205 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX1 */
1206 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXDV */
1207 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXER */
1208 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXEN */
1209 AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXCK */
1210 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDC */
1211 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDIO */
1217 pinctrl_macb1_rmii: macb1_rmii-0 {
1219 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX0 */
1220 AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX1 */
1221 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX0 */
1222 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX1 */
1223 AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXDV */
1224 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXER */
1225 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXEN */
1226 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXCK */
1227 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDC */
1228 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDIO */
1234 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
1236 <AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* MCI0_CK, conflict with PCK1(ISI_MCK) */
1237 AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_CDA, conflict with NAND_D0 */
1238 AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA0, conflict with NAND_D1 */
1241 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
1243 <AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA1, conflict with NAND_D2 */
1244 AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA2, conflict with NAND_D3 */
1245 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA3, conflict with NAND_D4 */
1248 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
1250 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA4, conflict with NAND_D5 */
1251 AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA5, conflict with NAND_D6 */
1252 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA6, conflict with NAND_D7 */
1253 AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA7, conflict with NAND_OE */
1259 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
1261 <AT91_PIOE 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* MCI1_CK */
1262 AT91_PIOE 19 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_CDA */
1263 AT91_PIOE 20 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA0 */
1266 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
1268 <AT91_PIOE 21 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA1 */
1269 AT91_PIOE 22 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA2 */
1270 AT91_PIOE 23 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA3 */
1276 pinctrl_nand: nand-0 {
1278 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A Read Enable */
1279 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A Write Enable */
1281 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC17 ALE */
1282 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC18 CLE */
1284 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC15 NCS3/Chip Enable */
1285 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC16 NANDRDY */
1286 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 Data bit 0 */
1287 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 Data bit 1 */
1288 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 Data bit 2 */
1289 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 Data bit 3 */
1290 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 Data bit 4 */
1291 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 Data bit 5 */
1292 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A Data bit 6 */
1293 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC12 periph A Data bit 7 */
1298 pinctrl_spi0: spi0-0 {
1300 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MISO */
1301 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MOSI */
1302 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_SPCK */
1308 pinctrl_ssc0_tx: ssc0_tx {
1310 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TK0 */
1311 AT91_PIOB 31 AT91_PERIPH_B AT91_PINCTRL_NONE /* TF0 */
1312 AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD0 */
1315 pinctrl_ssc0_rx: ssc0_rx {
1317 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* RK0 */
1318 AT91_PIOB 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF0 */
1319 AT91_PIOB 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD0 */
1324 pinctrl_ssc1_tx: ssc1_tx {
1326 <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* TK1 */
1327 AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* TF1 */
1328 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD1 */
1331 pinctrl_ssc1_rx: ssc1_rx {
1333 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* RK1 */
1334 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF1 */
1335 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD1 */
1340 pinctrl_spi1: spi1-0 {
1342 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_MISO */
1343 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_MOSI */
1344 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_SPCK */
1350 pinctrl_spi2: spi2-0 {
1352 <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_MISO conflicts with RTS0 */
1353 AT91_PIOD 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_MOSI conflicts with TXD0 */
1354 AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_SPCK conflicts with RTS1 */
1360 pinctrl_uart0: uart0-0 {
1362 <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1363 AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1369 pinctrl_uart1: uart1-0 {
1371 <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* RXD */
1372 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE /* TXD */
1378 pinctrl_usart0: usart0-0 {
1380 <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
1381 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */
1384 pinctrl_usart0_rts: usart0_rts-0 {
1385 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1387 pinctrl_usart0_cts: usart0_cts-0 {
1388 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1393 pinctrl_usart1: usart1-0 {
1395 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
1396 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */
1399 pinctrl_usart1_rts: usart1_rts-0 {
1400 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1402 pinctrl_usart1_cts: usart1_cts-0 {
1403 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1408 pinctrl_usart2: usart2-0 {
1410 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD - conflicts with G0_CRS, ISI_HSYNC */
1411 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD - conflicts with G0_COL, PCK2 */
1414 pinctrl_usart2_rts: usart2_rts-0 {
1415 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_RX3, PWMH1 */
1417 pinctrl_usart2_cts: usart2_cts-0 {
1418 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_TXER, ISI_VSYNC */
1423 pinctrl_usart3: usart3-0 {
1425 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1426 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1432 pinctrl_usart4: usart4-0 {
1434 <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1435 AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1438 pinctrl_usart4_rts: usart4_rts-0 {
1439 atmel,pins = <AT91_PIOE 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with NWAIT, A19 */
1441 pinctrl_usart4_cts: usart4_cts-0 {
1442 atmel,pins = <AT91_PIOE 0 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with A0/NBS0, MCI0_CDB */
1447 aic: interrupt-controller@fc06e000 {
1448 #interrupt-cells = <3>;
1449 compatible = "atmel,sama5d4-aic";
1450 interrupt-controller;
1451 reg = <0xfc06e000 0x200>;
1452 atmel,external-irqs = <56>;