1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
5 * Copyright (C) 2014 Atmel,
6 * 2014 Nicolas Ferre <nicolas.ferre@atmel.com>
9 #include <dt-bindings/clock/at91.h>
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
18 model = "Atmel SAMA5D4 family SoC";
19 compatible = "atmel,sama5d4";
20 interrupt-parent = <&aic>;
50 compatible = "arm,cortex-a5";
52 next-level-cache = <&L2>;
57 device_type = "memory";
58 reg = <0x20000000 0x20000000>;
62 slow_xtal: slow_xtal {
63 compatible = "fixed-clock";
65 clock-frequency = <0>;
68 main_xtal: main_xtal {
69 compatible = "fixed-clock";
71 clock-frequency = <0>;
74 adc_op_clk: adc_op_clk{
75 compatible = "fixed-clock";
77 clock-frequency = <1000000>;
81 ns_sram: sram@210000 {
82 compatible = "mmio-sram";
83 reg = <0x00210000 0x10000>;
86 ranges = <0 0x00210000 0x10000>;
90 compatible = "simple-bus";
95 nfc_sram: sram@100000 {
96 compatible = "mmio-sram";
98 reg = <0x100000 0x2400>;
101 ranges = <0 0x100000 0x2400>;
105 compatible = "microchip,sama5d4-vdec";
106 reg = <0x00300000 0x100000>;
107 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
108 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
111 usb0: gadget@400000 {
112 compatible = "atmel,sama5d3-udc";
113 reg = <0x00400000 0x100000
115 interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>;
116 clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
117 clock-names = "pclk", "hclk";
122 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
123 reg = <0x00500000 0x100000>;
124 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
125 clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 6>;
126 clock-names = "ohci_clk", "hclk", "uhpck";
131 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
132 reg = <0x00600000 0x100000>;
133 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
134 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 46>;
135 clock-names = "usb_clk", "ehci_clk";
139 L2: cache-controller@a00000 {
140 compatible = "arm,pl310-cache";
141 reg = <0x00a00000 0x1000>;
142 interrupts = <67 IRQ_TYPE_LEVEL_HIGH 4>;
148 compatible = "atmel,sama5d3-ebi";
149 #address-cells = <2>;
152 reg = <0x10000000 0x10000000
153 0x60000000 0x28000000>;
154 ranges = <0x0 0x0 0x10000000 0x10000000
155 0x1 0x0 0x60000000 0x10000000
156 0x2 0x0 0x70000000 0x10000000
157 0x3 0x0 0x80000000 0x8000000>;
158 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
161 nand_controller: nand-controller {
162 compatible = "atmel,sama5d3-nand-controller";
163 atmel,nfc-sram = <&nfc_sram>;
164 atmel,nfc-io = <&nfc_io>;
165 ecc-engine = <&pmecc>;
166 #address-cells = <2>;
173 nfc_io: nfc-io@90000000 {
174 compatible = "atmel,sama5d3-nfc-io", "syscon";
175 reg = <0x90000000 0x8000000>;
179 compatible = "simple-bus";
180 #address-cells = <1>;
184 hlcdc: hlcdc@f0000000 {
185 compatible = "atmel,sama5d4-hlcdc";
186 reg = <0xf0000000 0x4000>;
187 interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>;
188 clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
189 clock-names = "periph_clk","sys_clk", "slow_clk";
192 hlcdc-display-controller {
193 compatible = "atmel,hlcdc-display-controller";
194 #address-cells = <1>;
198 #address-cells = <1>;
204 hlcdc_pwm: hlcdc-pwm {
205 compatible = "atmel,hlcdc-pwm";
206 pinctrl-names = "default";
207 pinctrl-0 = <&pinctrl_lcd_pwm>;
212 dma1: dma-controller@f0004000 {
213 compatible = "atmel,sama5d4-dma";
214 reg = <0xf0004000 0x200>;
215 interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
217 clocks = <&pmc PMC_TYPE_PERIPHERAL 50>;
218 clock-names = "dma_clk";
222 compatible = "atmel,at91sam9g45-isi";
223 reg = <0xf0008000 0x4000>;
224 interrupts = <52 IRQ_TYPE_LEVEL_HIGH 5>;
225 pinctrl-names = "default";
226 pinctrl-0 = <&pinctrl_isi_data_0_7>;
227 clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
228 clock-names = "isi_clk";
231 #address-cells = <1>;
236 ramc0: ramc@f0010000 {
237 compatible = "atmel,sama5d3-ddramc";
238 reg = <0xf0010000 0x200>;
239 clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 16>;
240 clock-names = "ddrck", "mpddr";
243 dma0: dma-controller@f0014000 {
244 compatible = "atmel,sama5d4-dma";
245 reg = <0xf0014000 0x200>;
246 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
248 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
249 clock-names = "dma_clk";
253 compatible = "atmel,sama5d4-pmc", "syscon";
254 reg = <0xf0018000 0x120>;
255 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
257 clocks = <&clk32k>, <&main_xtal>;
258 clock-names = "slow_clk", "main_xtal";
262 compatible = "atmel,hsmci";
263 reg = <0xf8000000 0x600>;
264 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
266 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
267 | AT91_XDMAC_DT_PERID(0))>;
269 pinctrl-names = "default";
270 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>;
272 #address-cells = <1>;
274 clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
275 clock-names = "mci_clk";
278 uart0: serial@f8004000 {
279 compatible = "atmel,at91sam9260-usart";
280 reg = <0xf8004000 0x100>;
281 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>;
283 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
284 | AT91_XDMAC_DT_PERID(22))>,
286 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
287 | AT91_XDMAC_DT_PERID(23))>;
288 dma-names = "tx", "rx";
289 pinctrl-names = "default";
290 pinctrl-0 = <&pinctrl_uart0>;
291 clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
292 clock-names = "usart";
297 compatible = "atmel,at91sam9g45-ssc";
298 reg = <0xf8008000 0x4000>;
299 interrupts = <48 IRQ_TYPE_LEVEL_HIGH 0>;
300 pinctrl-names = "default";
301 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
303 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
304 | AT91_XDMAC_DT_PERID(26))>,
306 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
307 | AT91_XDMAC_DT_PERID(27))>;
308 dma-names = "tx", "rx";
309 clocks = <&pmc PMC_TYPE_PERIPHERAL 48>;
310 clock-names = "pclk";
315 compatible = "atmel,sama5d3-pwm";
316 reg = <0xf800c000 0x300>;
317 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>;
319 clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
324 #address-cells = <1>;
326 compatible = "atmel,at91rm9200-spi";
327 reg = <0xf8010000 0x100>;
328 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>;
330 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
331 | AT91_XDMAC_DT_PERID(10))>,
333 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
334 | AT91_XDMAC_DT_PERID(11))>;
335 dma-names = "tx", "rx";
336 pinctrl-names = "default";
337 pinctrl-0 = <&pinctrl_spi0>;
338 clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
339 clock-names = "spi_clk";
344 compatible = "atmel,sama5d4-i2c";
345 reg = <0xf8014000 0x4000>;
346 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
348 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
349 | AT91_XDMAC_DT_PERID(2))>,
351 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
352 | AT91_XDMAC_DT_PERID(3))>;
353 dma-names = "tx", "rx";
354 pinctrl-names = "default", "gpio";
355 pinctrl-0 = <&pinctrl_i2c0>;
356 pinctrl-1 = <&pinctrl_i2c0_gpio>;
357 sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>;
358 scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
359 #address-cells = <1>;
361 clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
366 compatible = "atmel,sama5d4-i2c";
367 reg = <0xf8018000 0x4000>;
368 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>;
370 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
371 | AT91_XDMAC_DT_PERID(4))>,
373 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
374 | AT91_XDMAC_DT_PERID(5))>;
375 dma-names = "tx", "rx";
376 pinctrl-names = "default", "gpio";
377 pinctrl-0 = <&pinctrl_i2c1>;
378 pinctrl-1 = <&pinctrl_i2c1_gpio>;
379 sda-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>;
380 scl-gpios = <&pioE 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
381 #address-cells = <1>;
383 clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
387 tcb0: timer@f801c000 {
388 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
389 #address-cells = <1>;
391 reg = <0xf801c000 0x100>;
392 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
393 clocks = <&pmc PMC_TYPE_PERIPHERAL 40>, <&clk32k>;
394 clock-names = "t0_clk", "slow_clk";
397 macb0: ethernet@f8020000 {
398 compatible = "atmel,sama5d4-gem";
399 reg = <0xf8020000 0x100>;
400 interrupts = <54 IRQ_TYPE_LEVEL_HIGH 3>;
401 pinctrl-names = "default";
402 pinctrl-0 = <&pinctrl_macb0_rmii>;
403 #address-cells = <1>;
405 clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_PERIPHERAL 54>;
406 clock-names = "hclk", "pclk";
411 compatible = "atmel,sama5d4-i2c";
412 reg = <0xf8024000 0x4000>;
413 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
415 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
416 | AT91_XDMAC_DT_PERID(6))>,
418 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
419 | AT91_XDMAC_DT_PERID(7))>;
420 dma-names = "tx", "rx";
421 pinctrl-names = "default", "gpio";
422 pinctrl-0 = <&pinctrl_i2c2>;
423 pinctrl-1 = <&pinctrl_i2c2_gpio>;
424 sda-gpios = <&pioB 29 GPIO_ACTIVE_HIGH>;
425 scl-gpios = <&pioB 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
426 #address-cells = <1>;
428 clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
433 compatible = "atmel,sama5d4-sfr", "syscon";
434 reg = <0xf8028000 0x60>;
437 usart0: serial@f802c000 {
438 compatible = "atmel,at91sam9260-usart";
439 reg = <0xf802c000 0x100>;
440 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
442 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
443 | AT91_XDMAC_DT_PERID(36))>,
445 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
446 | AT91_XDMAC_DT_PERID(37))>;
447 dma-names = "tx", "rx";
448 pinctrl-names = "default";
449 pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts &pinctrl_usart0_cts>;
450 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
451 clock-names = "usart";
455 usart1: serial@f8030000 {
456 compatible = "atmel,at91sam9260-usart";
457 reg = <0xf8030000 0x100>;
458 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
460 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
461 | AT91_XDMAC_DT_PERID(38))>,
463 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
464 | AT91_XDMAC_DT_PERID(39))>;
465 dma-names = "tx", "rx";
466 pinctrl-names = "default";
467 pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts>;
468 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
469 clock-names = "usart";
474 compatible = "atmel,hsmci";
475 reg = <0xfc000000 0x600>;
476 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
478 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
479 | AT91_XDMAC_DT_PERID(1))>;
481 pinctrl-names = "default";
482 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
484 #address-cells = <1>;
486 clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
487 clock-names = "mci_clk";
490 uart1: serial@fc004000 {
491 compatible = "atmel,at91sam9260-usart";
492 reg = <0xfc004000 0x100>;
493 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
495 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
496 | AT91_XDMAC_DT_PERID(24))>,
498 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
499 | AT91_XDMAC_DT_PERID(25))>;
500 dma-names = "tx", "rx";
501 pinctrl-names = "default";
502 pinctrl-0 = <&pinctrl_uart1>;
503 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
504 clock-names = "usart";
508 usart2: serial@fc008000 {
509 compatible = "atmel,at91sam9260-usart";
510 reg = <0xfc008000 0x100>;
511 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
513 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
514 | AT91_XDMAC_DT_PERID(16))>,
516 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
517 | AT91_XDMAC_DT_PERID(17))>;
518 dma-names = "tx", "rx";
519 pinctrl-names = "default";
520 pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
521 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
522 clock-names = "usart";
526 usart3: serial@fc00c000 {
527 compatible = "atmel,at91sam9260-usart";
528 reg = <0xfc00c000 0x100>;
529 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
531 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
532 | AT91_XDMAC_DT_PERID(18))>,
534 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
535 | AT91_XDMAC_DT_PERID(19))>;
536 dma-names = "tx", "rx";
537 pinctrl-names = "default";
538 pinctrl-0 = <&pinctrl_usart3>;
539 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
540 clock-names = "usart";
544 usart4: serial@fc010000 {
545 compatible = "atmel,at91sam9260-usart";
546 reg = <0xfc010000 0x100>;
547 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
549 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
550 | AT91_XDMAC_DT_PERID(20))>,
552 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
553 | AT91_XDMAC_DT_PERID(21))>;
554 dma-names = "tx", "rx";
555 pinctrl-names = "default";
556 pinctrl-0 = <&pinctrl_usart4>;
557 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>;
558 clock-names = "usart";
563 compatible = "atmel,at91sam9g45-ssc";
564 reg = <0xfc014000 0x4000>;
565 interrupts = <49 IRQ_TYPE_LEVEL_HIGH 0>;
566 pinctrl-names = "default";
567 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
569 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
570 | AT91_XDMAC_DT_PERID(28))>,
572 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
573 | AT91_XDMAC_DT_PERID(29))>;
574 dma-names = "tx", "rx";
575 clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
576 clock-names = "pclk";
581 #address-cells = <1>;
583 compatible = "atmel,at91rm9200-spi";
584 reg = <0xfc018000 0x100>;
585 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 3>;
587 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
588 | AT91_XDMAC_DT_PERID(12))>,
590 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
591 | AT91_XDMAC_DT_PERID(13))>;
592 dma-names = "tx", "rx";
593 pinctrl-names = "default";
594 pinctrl-0 = <&pinctrl_spi1>;
595 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
596 clock-names = "spi_clk";
601 #address-cells = <1>;
603 compatible = "atmel,at91rm9200-spi";
604 reg = <0xfc01c000 0x100>;
605 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 3>;
607 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
608 | AT91_XDMAC_DT_PERID(14))>,
610 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
611 | AT91_XDMAC_DT_PERID(15))>;
612 dma-names = "tx", "rx";
613 pinctrl-names = "default";
614 pinctrl-0 = <&pinctrl_spi2>;
615 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
616 clock-names = "spi_clk";
620 tcb1: timer@fc020000 {
621 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
622 #address-cells = <1>;
624 reg = <0xfc020000 0x100>;
625 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
626 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&clk32k>;
627 clock-names = "t0_clk", "slow_clk";
630 tcb2: timer@fc024000 {
631 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
632 #address-cells = <1>;
634 reg = <0xfc024000 0x100>;
635 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
636 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&clk32k>;
637 clock-names = "t0_clk", "slow_clk";
640 macb1: ethernet@fc028000 {
641 compatible = "atmel,sama5d4-gem";
642 reg = <0xfc028000 0x100>;
643 interrupts = <55 IRQ_TYPE_LEVEL_HIGH 3>;
644 pinctrl-names = "default";
645 pinctrl-0 = <&pinctrl_macb1_rmii>;
646 #address-cells = <1>;
648 clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_PERIPHERAL 55>;
649 clock-names = "hclk", "pclk";
654 compatible = "atmel,at91sam9g45-trng";
655 reg = <0xfc030000 0x100>;
656 interrupts = <53 IRQ_TYPE_LEVEL_HIGH 0>;
657 clocks = <&pmc PMC_TYPE_PERIPHERAL 53>;
661 compatible = "atmel,at91sam9x5-adc";
662 reg = <0xfc034000 0x100>;
663 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>;
664 clocks = <&pmc PMC_TYPE_PERIPHERAL 44>,
666 clock-names = "adc_clk", "adc_op_clk";
667 atmel,adc-channels-used = <0x01f>;
668 atmel,adc-startup-time = <40>;
669 atmel,adc-use-external-triggers;
670 atmel,adc-vref = <3000>;
671 atmel,adc-sample-hold-time = <11>;
672 atmel,adc-ts-pressure-threshold = <10000>;
677 compatible = "atmel,at91sam9g46-aes";
678 reg = <0xfc044000 0x100>;
679 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
680 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
681 | AT91_XDMAC_DT_PERID(41))>,
682 <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
683 | AT91_XDMAC_DT_PERID(40))>;
684 dma-names = "tx", "rx";
685 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
686 clock-names = "aes_clk";
691 compatible = "atmel,at91sam9g46-tdes";
692 reg = <0xfc04c000 0x100>;
693 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 0>;
694 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
695 | AT91_XDMAC_DT_PERID(42))>,
696 <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
697 | AT91_XDMAC_DT_PERID(43))>;
698 dma-names = "tx", "rx";
699 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
700 clock-names = "tdes_clk";
705 compatible = "atmel,at91sam9g46-sha";
706 reg = <0xfc050000 0x100>;
707 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 0>;
708 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
709 | AT91_XDMAC_DT_PERID(44))>;
711 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
712 clock-names = "sha_clk";
717 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
718 reg = <0xfc05c000 0x1000>;
719 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
720 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
721 #address-cells = <1>;
725 pmecc: ecc-engine@ffffc070 {
726 compatible = "atmel,sama5d4-pmecc";
727 reg = <0xfc05c070 0x490>,
732 reset_controller: rstc@fc068600 {
733 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
734 reg = <0xfc068600 0x10>;
738 shutdown_controller: shdwc@fc068610 {
739 compatible = "atmel,at91sam9x5-shdwc";
740 reg = <0xfc068610 0x10>;
744 pit: timer@fc068630 {
745 compatible = "atmel,at91sam9260-pit";
746 reg = <0xfc068630 0x10>;
747 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
748 clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
751 watchdog: watchdog@fc068640 {
752 compatible = "atmel,sama5d4-wdt";
753 reg = <0xfc068640 0x10>;
754 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
759 clk32k: sckc@fc068650 {
760 compatible = "atmel,sama5d4-sckc";
761 reg = <0xfc068650 0x4>;
763 clocks = <&slow_xtal>;
767 compatible = "atmel,sama5d4-rtc";
768 reg = <0xfc0686b0 0x30>;
769 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
773 dbgu: serial@fc069000 {
774 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
775 reg = <0xfc069000 0x200>;
776 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
777 pinctrl-names = "default";
778 pinctrl-0 = <&pinctrl_dbgu>;
779 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
780 clock-names = "usart";
785 pinctrl: pinctrl@fc06a000 {
786 #address-cells = <1>;
788 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
789 ranges = <0xfc068000 0xfc068000 0x100
790 0xfc06a000 0xfc06a000 0x4000>;
791 /* WARNING: revisit as pin spec has changed */
794 0xffffffff 0x3ffcfe7c 0x1c010101 /* pioA */
795 0x7fffffff 0xfffccc3a 0x3f00cc3a /* pioB */
796 0xffffffff 0x3ff83fff 0xff00ffff /* pioC */
797 0xb003ff00 0x8002a800 0x00000000 /* pioD */
798 0xffffffff 0x7fffffff 0x76fff1bf /* pioE */
801 pioA: gpio@fc06a000 {
802 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
803 reg = <0xfc06a000 0x100>;
804 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 1>;
807 interrupt-controller;
808 #interrupt-cells = <2>;
809 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
812 pioB: gpio@fc06b000 {
813 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
814 reg = <0xfc06b000 0x100>;
815 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 1>;
818 interrupt-controller;
819 #interrupt-cells = <2>;
820 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
823 pioC: gpio@fc06c000 {
824 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
825 reg = <0xfc06c000 0x100>;
826 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 1>;
829 interrupt-controller;
830 #interrupt-cells = <2>;
831 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
834 pioD: gpio@fc068000 {
835 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
836 reg = <0xfc068000 0x100>;
837 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
840 interrupt-controller;
841 #interrupt-cells = <2>;
842 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
845 pioE: gpio@fc06d000 {
846 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
847 reg = <0xfc06d000 0x100>;
848 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 1>;
851 interrupt-controller;
852 #interrupt-cells = <2>;
853 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
856 /* pinctrl pin settings */
858 pinctrl_adc0_adtrg: adc0_adtrg {
860 <AT91_PIOE 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with USBA_VBUS */
862 pinctrl_adc0_ad0: adc0_ad0 {
864 <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
866 pinctrl_adc0_ad1: adc0_ad1 {
868 <AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
870 pinctrl_adc0_ad2: adc0_ad2 {
872 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
874 pinctrl_adc0_ad3: adc0_ad3 {
876 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
878 pinctrl_adc0_ad4: adc0_ad4 {
880 <AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
885 pinctrl_dbgu: dbgu-0 {
887 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with D14 and TDI */
888 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with D15 and TDO */
893 pinctrl_ebi_addr: ebi-addr-0 {
895 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE
896 AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
897 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
898 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
899 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
900 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
901 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
902 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
903 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
904 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
905 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
906 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
907 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
908 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
909 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
910 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
911 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
912 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
913 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
914 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
915 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
916 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
917 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE
918 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
919 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
920 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
923 pinctrl_ebi_nand_addr: ebi-addr-1 {
925 <AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
926 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
929 pinctrl_ebi_cs0: ebi-cs0-0 {
931 <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
934 pinctrl_ebi_cs1: ebi-cs1-0 {
936 <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
939 pinctrl_ebi_cs2: ebi-cs2-0 {
941 <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
944 pinctrl_ebi_cs3: ebi-cs3-0 {
946 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
949 pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
951 <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE
952 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE
953 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE
954 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE
955 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE
956 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE
957 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE
958 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
961 pinctrl_ebi_data_8_15: ebi-data-msb-0 {
963 <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE
964 AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE
965 AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE
966 AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE
967 AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE
968 AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE
969 AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE
970 AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
973 pinctrl_ebi_nandrdy: ebi-nandrdy-0 {
975 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
978 pinctrl_ebi_nrd_nandoe: ebi-nrd-nandoe-0 {
980 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
983 pinctrl_ebi_nwait: ebi-nwait-0 {
985 <AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
988 pinctrl_ebi_nwe_nandwe: ebi-nwe-nandwe-0 {
990 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
993 pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
995 <AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1000 pinctrl_i2c0: i2c0-0 {
1002 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
1003 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1006 pinctrl_i2c0_gpio: i2c0-gpio {
1008 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1009 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1014 pinctrl_i2c1: i2c1-0 {
1016 <AT91_PIOE 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* TWD1, conflicts with UART0 RX and DIBP */
1017 AT91_PIOE 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* TWCK1, conflicts with UART0 TX and DIBN */
1020 pinctrl_i2c1_gpio: i2c1-gpio {
1022 <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1023 AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1028 pinctrl_i2c2: i2c2-0 {
1030 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* TWD2, conflicts with RD0 and PWML1 */
1031 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* TWCK2, conflicts with RF0 */
1034 pinctrl_i2c2_gpio: i2c2-gpio {
1036 <AT91_PIOB 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1037 AT91_PIOB 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1042 pinctrl_isi_data_0_7: isi-0-data-0-7 {
1044 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D0 */
1045 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D1 */
1046 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D2 */
1047 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D3 */
1048 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D4 */
1049 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D5 */
1050 AT91_PIOC 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D6 */
1051 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D7 */
1052 AT91_PIOB 1 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_PCK, conflict with G0_RXCK */
1053 AT91_PIOB 3 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_VSYNC */
1054 AT91_PIOB 4 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_HSYNC */
1056 pinctrl_isi_data_8_9: isi-0-data-8-9 {
1058 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_D8, conflicts with SPI0_MISO, PWMH2 */
1059 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_D9, conflicts with SPI0_MOSI, PWML2 */
1061 pinctrl_isi_data_10_11: isi-0-data-10-11 {
1063 <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_D10, conflicts with SPI0_SPCK, PWMH3 */
1064 AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_D11, conflicts with SPI0_NPCS0, PWML3 */
1069 pinctrl_lcd_base: lcd-base-0 {
1071 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */
1072 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */
1073 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */
1074 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
1076 pinctrl_lcd_pwm: lcd-pwm-0 {
1077 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */
1079 pinctrl_lcd_rgb444: lcd-rgb-0 {
1081 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1082 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1083 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1084 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1085 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1086 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1087 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1088 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1089 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1090 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1091 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1092 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD11 pin */
1094 pinctrl_lcd_rgb565: lcd-rgb-1 {
1096 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1097 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1098 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1099 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1100 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1101 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1102 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1103 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1104 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1105 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1106 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1107 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1108 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1109 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1110 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1111 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD15 pin */
1113 pinctrl_lcd_rgb666: lcd-rgb-2 {
1115 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1116 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1117 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1118 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1119 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1120 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1121 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1122 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1123 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1124 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1125 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1126 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1127 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1128 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1129 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1130 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1131 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1132 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1134 pinctrl_lcd_rgb777: lcd-rgb-3 {
1136 /* LCDDAT0 conflicts with TMS */
1137 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1138 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1139 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1140 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1141 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1142 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1143 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1144 /* LCDDAT8 conflicts with TCK */
1145 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1146 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1147 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1148 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1149 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1150 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1151 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1152 /* LCDDAT16 conflicts with NTRST */
1153 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
1154 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1155 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1156 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1157 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1158 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1159 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1161 pinctrl_lcd_rgb888: lcd-rgb-4 {
1163 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1164 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1165 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1166 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1167 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1168 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1169 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1170 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1171 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1172 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1173 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1174 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1175 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1176 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1177 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1178 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1179 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */
1180 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
1181 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1182 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1183 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1184 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1185 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1186 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1191 pinctrl_macb0_rmii: macb0_rmii-0 {
1193 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX0 */
1194 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX1 */
1195 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX0 */
1196 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX1 */
1197 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXDV */
1198 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXER */
1199 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXEN */
1200 AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXCK */
1201 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDC */
1202 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDIO */
1208 pinctrl_macb1_rmii: macb1_rmii-0 {
1210 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX0 */
1211 AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX1 */
1212 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX0 */
1213 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX1 */
1214 AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXDV */
1215 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXER */
1216 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXEN */
1217 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXCK */
1218 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDC */
1219 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDIO */
1225 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
1227 <AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* MCI0_CK, conflict with PCK1(ISI_MCK) */
1228 AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_CDA, conflict with NAND_D0 */
1229 AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA0, conflict with NAND_D1 */
1232 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
1234 <AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA1, conflict with NAND_D2 */
1235 AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA2, conflict with NAND_D3 */
1236 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA3, conflict with NAND_D4 */
1239 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
1241 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA4, conflict with NAND_D5 */
1242 AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA5, conflict with NAND_D6 */
1243 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA6, conflict with NAND_D7 */
1244 AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA7, conflict with NAND_OE */
1250 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
1252 <AT91_PIOE 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* MCI1_CK */
1253 AT91_PIOE 19 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_CDA */
1254 AT91_PIOE 20 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA0 */
1257 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
1259 <AT91_PIOE 21 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA1 */
1260 AT91_PIOE 22 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA2 */
1261 AT91_PIOE 23 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA3 */
1267 pinctrl_nand: nand-0 {
1269 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A Read Enable */
1270 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A Write Enable */
1272 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC17 ALE */
1273 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC18 CLE */
1275 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC15 NCS3/Chip Enable */
1276 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC16 NANDRDY */
1277 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 Data bit 0 */
1278 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 Data bit 1 */
1279 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 Data bit 2 */
1280 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 Data bit 3 */
1281 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 Data bit 4 */
1282 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 Data bit 5 */
1283 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A Data bit 6 */
1284 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC12 periph A Data bit 7 */
1289 pinctrl_spi0: spi0-0 {
1291 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MISO */
1292 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MOSI */
1293 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_SPCK */
1299 pinctrl_ssc0_tx: ssc0_tx {
1301 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TK0 */
1302 AT91_PIOB 31 AT91_PERIPH_B AT91_PINCTRL_NONE /* TF0 */
1303 AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD0 */
1306 pinctrl_ssc0_rx: ssc0_rx {
1308 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* RK0 */
1309 AT91_PIOB 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF0 */
1310 AT91_PIOB 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD0 */
1315 pinctrl_ssc1_tx: ssc1_tx {
1317 <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* TK1 */
1318 AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* TF1 */
1319 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD1 */
1322 pinctrl_ssc1_rx: ssc1_rx {
1324 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* RK1 */
1325 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF1 */
1326 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD1 */
1331 pinctrl_spi1: spi1-0 {
1333 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_MISO */
1334 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_MOSI */
1335 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_SPCK */
1341 pinctrl_spi2: spi2-0 {
1343 <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_MISO conflicts with RTS0 */
1344 AT91_PIOD 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_MOSI conflicts with TXD0 */
1345 AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_SPCK conflicts with RTS1 */
1351 pinctrl_uart0: uart0-0 {
1353 <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1354 AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1360 pinctrl_uart1: uart1-0 {
1362 <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* RXD */
1363 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE /* TXD */
1369 pinctrl_usart0: usart0-0 {
1371 <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
1372 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */
1375 pinctrl_usart0_rts: usart0_rts-0 {
1376 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1378 pinctrl_usart0_cts: usart0_cts-0 {
1379 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1384 pinctrl_usart1: usart1-0 {
1386 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
1387 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */
1390 pinctrl_usart1_rts: usart1_rts-0 {
1391 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1393 pinctrl_usart1_cts: usart1_cts-0 {
1394 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1399 pinctrl_usart2: usart2-0 {
1401 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD - conflicts with G0_CRS, ISI_HSYNC */
1402 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD - conflicts with G0_COL, PCK2 */
1405 pinctrl_usart2_rts: usart2_rts-0 {
1406 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_RX3, PWMH1 */
1408 pinctrl_usart2_cts: usart2_cts-0 {
1409 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_TXER, ISI_VSYNC */
1414 pinctrl_usart3: usart3-0 {
1416 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1417 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1423 pinctrl_usart4: usart4-0 {
1425 <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1426 AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1429 pinctrl_usart4_rts: usart4_rts-0 {
1430 atmel,pins = <AT91_PIOE 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with NWAIT, A19 */
1432 pinctrl_usart4_cts: usart4_cts-0 {
1433 atmel,pins = <AT91_PIOE 0 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with A0/NBS0, MCI0_CDB */
1438 aic: interrupt-controller@fc06e000 {
1439 #interrupt-cells = <3>;
1440 compatible = "atmel,sama5d4-aic";
1441 interrupt-controller;
1442 reg = <0xfc06e000 0x200>;
1443 atmel,external-irqs = <56>;