1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
5 * Copyright (C) 2014 Atmel,
6 * 2014 Nicolas Ferre <nicolas.ferre@atmel.com>
9 #include <dt-bindings/clock/at91.h>
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
18 model = "Atmel SAMA5D4 family SoC";
19 compatible = "atmel,sama5d4";
20 interrupt-parent = <&aic>;
50 compatible = "arm,cortex-a5";
52 next-level-cache = <&L2>;
57 device_type = "memory";
58 reg = <0x20000000 0x20000000>;
62 slow_xtal: slow_xtal {
63 compatible = "fixed-clock";
65 clock-frequency = <0>;
68 main_xtal: main_xtal {
69 compatible = "fixed-clock";
71 clock-frequency = <0>;
74 adc_op_clk: adc_op_clk{
75 compatible = "fixed-clock";
77 clock-frequency = <1000000>;
81 ns_sram: sram@210000 {
82 compatible = "mmio-sram";
83 reg = <0x00210000 0x10000>;
86 ranges = <0 0x00210000 0x10000>;
90 compatible = "simple-bus";
95 nfc_sram: sram@100000 {
96 compatible = "mmio-sram";
98 reg = <0x100000 0x2400>;
101 ranges = <0 0x100000 0x2400>;
104 usb0: gadget@400000 {
105 compatible = "atmel,sama5d3-udc";
106 reg = <0x00400000 0x100000
108 interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>;
109 clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
110 clock-names = "pclk", "hclk";
115 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
116 reg = <0x00500000 0x100000>;
117 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
118 clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 6>;
119 clock-names = "ohci_clk", "hclk", "uhpck";
124 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
125 reg = <0x00600000 0x100000>;
126 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
127 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 46>;
128 clock-names = "usb_clk", "ehci_clk";
132 L2: cache-controller@a00000 {
133 compatible = "arm,pl310-cache";
134 reg = <0x00a00000 0x1000>;
135 interrupts = <67 IRQ_TYPE_LEVEL_HIGH 4>;
141 compatible = "atmel,sama5d3-ebi";
142 #address-cells = <2>;
145 reg = <0x10000000 0x10000000
146 0x60000000 0x28000000>;
147 ranges = <0x0 0x0 0x10000000 0x10000000
148 0x1 0x0 0x60000000 0x10000000
149 0x2 0x0 0x70000000 0x10000000
150 0x3 0x0 0x80000000 0x8000000>;
151 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
154 nand_controller: nand-controller {
155 compatible = "atmel,sama5d3-nand-controller";
156 atmel,nfc-sram = <&nfc_sram>;
157 atmel,nfc-io = <&nfc_io>;
158 ecc-engine = <&pmecc>;
159 #address-cells = <2>;
166 nfc_io: nfc-io@90000000 {
167 compatible = "atmel,sama5d3-nfc-io", "syscon";
168 reg = <0x90000000 0x8000000>;
172 compatible = "simple-bus";
173 #address-cells = <1>;
177 hlcdc: hlcdc@f0000000 {
178 compatible = "atmel,sama5d4-hlcdc";
179 reg = <0xf0000000 0x4000>;
180 interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>;
181 clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
182 clock-names = "periph_clk","sys_clk", "slow_clk";
185 hlcdc-display-controller {
186 compatible = "atmel,hlcdc-display-controller";
187 #address-cells = <1>;
191 #address-cells = <1>;
197 hlcdc_pwm: hlcdc-pwm {
198 compatible = "atmel,hlcdc-pwm";
199 pinctrl-names = "default";
200 pinctrl-0 = <&pinctrl_lcd_pwm>;
205 dma1: dma-controller@f0004000 {
206 compatible = "atmel,sama5d4-dma";
207 reg = <0xf0004000 0x200>;
208 interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
210 clocks = <&pmc PMC_TYPE_PERIPHERAL 50>;
211 clock-names = "dma_clk";
215 compatible = "atmel,at91sam9g45-isi";
216 reg = <0xf0008000 0x4000>;
217 interrupts = <52 IRQ_TYPE_LEVEL_HIGH 5>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_isi_data_0_7>;
220 clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
221 clock-names = "isi_clk";
224 #address-cells = <1>;
229 ramc0: ramc@f0010000 {
230 compatible = "atmel,sama5d3-ddramc";
231 reg = <0xf0010000 0x200>;
232 clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 16>;
233 clock-names = "ddrck", "mpddr";
236 dma0: dma-controller@f0014000 {
237 compatible = "atmel,sama5d4-dma";
238 reg = <0xf0014000 0x200>;
239 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
241 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
242 clock-names = "dma_clk";
246 compatible = "atmel,sama5d4-pmc", "syscon";
247 reg = <0xf0018000 0x120>;
248 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
250 clocks = <&clk32k>, <&main_xtal>;
251 clock-names = "slow_clk", "main_xtal";
255 compatible = "atmel,hsmci";
256 reg = <0xf8000000 0x600>;
257 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
259 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
260 | AT91_XDMAC_DT_PERID(0))>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>;
265 #address-cells = <1>;
267 clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
268 clock-names = "mci_clk";
271 uart0: serial@f8004000 {
272 compatible = "atmel,at91sam9260-usart";
273 reg = <0xf8004000 0x100>;
274 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>;
276 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
277 | AT91_XDMAC_DT_PERID(22))>,
279 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
280 | AT91_XDMAC_DT_PERID(23))>;
281 dma-names = "tx", "rx";
282 pinctrl-names = "default";
283 pinctrl-0 = <&pinctrl_uart0>;
284 clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
285 clock-names = "usart";
290 compatible = "atmel,at91sam9g45-ssc";
291 reg = <0xf8008000 0x4000>;
292 interrupts = <48 IRQ_TYPE_LEVEL_HIGH 0>;
293 pinctrl-names = "default";
294 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
296 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
297 | AT91_XDMAC_DT_PERID(26))>,
299 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
300 | AT91_XDMAC_DT_PERID(27))>;
301 dma-names = "tx", "rx";
302 clocks = <&pmc PMC_TYPE_PERIPHERAL 48>;
303 clock-names = "pclk";
308 compatible = "atmel,sama5d3-pwm";
309 reg = <0xf800c000 0x300>;
310 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>;
312 clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
317 #address-cells = <1>;
319 compatible = "atmel,at91rm9200-spi";
320 reg = <0xf8010000 0x100>;
321 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>;
323 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
324 | AT91_XDMAC_DT_PERID(10))>,
326 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
327 | AT91_XDMAC_DT_PERID(11))>;
328 dma-names = "tx", "rx";
329 pinctrl-names = "default";
330 pinctrl-0 = <&pinctrl_spi0>;
331 clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
332 clock-names = "spi_clk";
337 compatible = "atmel,sama5d4-i2c";
338 reg = <0xf8014000 0x4000>;
339 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
341 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
342 | AT91_XDMAC_DT_PERID(2))>,
344 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
345 | AT91_XDMAC_DT_PERID(3))>;
346 dma-names = "tx", "rx";
347 pinctrl-names = "default", "gpio";
348 pinctrl-0 = <&pinctrl_i2c0>;
349 pinctrl-1 = <&pinctrl_i2c0_gpio>;
350 sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>;
351 scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
352 #address-cells = <1>;
354 clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
359 compatible = "atmel,sama5d4-i2c";
360 reg = <0xf8018000 0x4000>;
361 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>;
363 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
364 | AT91_XDMAC_DT_PERID(4))>,
366 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
367 | AT91_XDMAC_DT_PERID(5))>;
368 dma-names = "tx", "rx";
369 pinctrl-names = "default", "gpio";
370 pinctrl-0 = <&pinctrl_i2c1>;
371 pinctrl-1 = <&pinctrl_i2c1_gpio>;
372 sda-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>;
373 scl-gpios = <&pioE 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
374 #address-cells = <1>;
376 clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
380 tcb0: timer@f801c000 {
381 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
382 #address-cells = <1>;
384 reg = <0xf801c000 0x100>;
385 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
386 clocks = <&pmc PMC_TYPE_PERIPHERAL 40>, <&clk32k>;
387 clock-names = "t0_clk", "slow_clk";
390 macb0: ethernet@f8020000 {
391 compatible = "atmel,sama5d4-gem";
392 reg = <0xf8020000 0x100>;
393 interrupts = <54 IRQ_TYPE_LEVEL_HIGH 3>;
394 pinctrl-names = "default";
395 pinctrl-0 = <&pinctrl_macb0_rmii>;
396 #address-cells = <1>;
398 clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_PERIPHERAL 54>;
399 clock-names = "hclk", "pclk";
404 compatible = "atmel,sama5d4-i2c";
405 reg = <0xf8024000 0x4000>;
406 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
408 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
409 | AT91_XDMAC_DT_PERID(6))>,
411 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
412 | AT91_XDMAC_DT_PERID(7))>;
413 dma-names = "tx", "rx";
414 pinctrl-names = "default", "gpio";
415 pinctrl-0 = <&pinctrl_i2c2>;
416 pinctrl-1 = <&pinctrl_i2c2_gpio>;
417 sda-gpios = <&pioB 29 GPIO_ACTIVE_HIGH>;
418 scl-gpios = <&pioB 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
419 #address-cells = <1>;
421 clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
426 compatible = "atmel,sama5d4-sfr", "syscon";
427 reg = <0xf8028000 0x60>;
430 usart0: serial@f802c000 {
431 compatible = "atmel,at91sam9260-usart";
432 reg = <0xf802c000 0x100>;
433 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
435 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
436 | AT91_XDMAC_DT_PERID(36))>,
438 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
439 | AT91_XDMAC_DT_PERID(37))>;
440 dma-names = "tx", "rx";
441 pinctrl-names = "default";
442 pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts &pinctrl_usart0_cts>;
443 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
444 clock-names = "usart";
448 usart1: serial@f8030000 {
449 compatible = "atmel,at91sam9260-usart";
450 reg = <0xf8030000 0x100>;
451 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
453 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
454 | AT91_XDMAC_DT_PERID(38))>,
456 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
457 | AT91_XDMAC_DT_PERID(39))>;
458 dma-names = "tx", "rx";
459 pinctrl-names = "default";
460 pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts>;
461 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
462 clock-names = "usart";
467 compatible = "atmel,hsmci";
468 reg = <0xfc000000 0x600>;
469 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
471 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
472 | AT91_XDMAC_DT_PERID(1))>;
474 pinctrl-names = "default";
475 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
477 #address-cells = <1>;
479 clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
480 clock-names = "mci_clk";
483 uart1: serial@fc004000 {
484 compatible = "atmel,at91sam9260-usart";
485 reg = <0xfc004000 0x100>;
486 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
488 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
489 | AT91_XDMAC_DT_PERID(24))>,
491 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
492 | AT91_XDMAC_DT_PERID(25))>;
493 dma-names = "tx", "rx";
494 pinctrl-names = "default";
495 pinctrl-0 = <&pinctrl_uart1>;
496 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
497 clock-names = "usart";
501 usart2: serial@fc008000 {
502 compatible = "atmel,at91sam9260-usart";
503 reg = <0xfc008000 0x100>;
504 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
506 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
507 | AT91_XDMAC_DT_PERID(16))>,
509 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
510 | AT91_XDMAC_DT_PERID(17))>;
511 dma-names = "tx", "rx";
512 pinctrl-names = "default";
513 pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
514 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
515 clock-names = "usart";
519 usart3: serial@fc00c000 {
520 compatible = "atmel,at91sam9260-usart";
521 reg = <0xfc00c000 0x100>;
522 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
524 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
525 | AT91_XDMAC_DT_PERID(18))>,
527 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
528 | AT91_XDMAC_DT_PERID(19))>;
529 dma-names = "tx", "rx";
530 pinctrl-names = "default";
531 pinctrl-0 = <&pinctrl_usart3>;
532 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
533 clock-names = "usart";
537 usart4: serial@fc010000 {
538 compatible = "atmel,at91sam9260-usart";
539 reg = <0xfc010000 0x100>;
540 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
542 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
543 | AT91_XDMAC_DT_PERID(20))>,
545 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
546 | AT91_XDMAC_DT_PERID(21))>;
547 dma-names = "tx", "rx";
548 pinctrl-names = "default";
549 pinctrl-0 = <&pinctrl_usart4>;
550 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>;
551 clock-names = "usart";
556 compatible = "atmel,at91sam9g45-ssc";
557 reg = <0xfc014000 0x4000>;
558 interrupts = <49 IRQ_TYPE_LEVEL_HIGH 0>;
559 pinctrl-names = "default";
560 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
562 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
563 | AT91_XDMAC_DT_PERID(28))>,
565 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
566 | AT91_XDMAC_DT_PERID(29))>;
567 dma-names = "tx", "rx";
568 clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
569 clock-names = "pclk";
574 #address-cells = <1>;
576 compatible = "atmel,at91rm9200-spi";
577 reg = <0xfc018000 0x100>;
578 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 3>;
580 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
581 | AT91_XDMAC_DT_PERID(12))>,
583 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
584 | AT91_XDMAC_DT_PERID(13))>;
585 dma-names = "tx", "rx";
586 pinctrl-names = "default";
587 pinctrl-0 = <&pinctrl_spi1>;
588 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
589 clock-names = "spi_clk";
594 #address-cells = <1>;
596 compatible = "atmel,at91rm9200-spi";
597 reg = <0xfc01c000 0x100>;
598 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 3>;
600 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
601 | AT91_XDMAC_DT_PERID(14))>,
603 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
604 | AT91_XDMAC_DT_PERID(15))>;
605 dma-names = "tx", "rx";
606 pinctrl-names = "default";
607 pinctrl-0 = <&pinctrl_spi2>;
608 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
609 clock-names = "spi_clk";
613 tcb1: timer@fc020000 {
614 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
615 #address-cells = <1>;
617 reg = <0xfc020000 0x100>;
618 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
619 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&clk32k>;
620 clock-names = "t0_clk", "slow_clk";
623 tcb2: timer@fc024000 {
624 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
625 #address-cells = <1>;
627 reg = <0xfc024000 0x100>;
628 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
629 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&clk32k>;
630 clock-names = "t0_clk", "slow_clk";
633 macb1: ethernet@fc028000 {
634 compatible = "atmel,sama5d4-gem";
635 reg = <0xfc028000 0x100>;
636 interrupts = <55 IRQ_TYPE_LEVEL_HIGH 3>;
637 pinctrl-names = "default";
638 pinctrl-0 = <&pinctrl_macb1_rmii>;
639 #address-cells = <1>;
641 clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_PERIPHERAL 55>;
642 clock-names = "hclk", "pclk";
647 compatible = "atmel,at91sam9g45-trng";
648 reg = <0xfc030000 0x100>;
649 interrupts = <53 IRQ_TYPE_LEVEL_HIGH 0>;
650 clocks = <&pmc PMC_TYPE_PERIPHERAL 53>;
654 compatible = "atmel,at91sam9x5-adc";
655 reg = <0xfc034000 0x100>;
656 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>;
657 clocks = <&pmc PMC_TYPE_PERIPHERAL 44>,
659 clock-names = "adc_clk", "adc_op_clk";
660 atmel,adc-channels-used = <0x01f>;
661 atmel,adc-startup-time = <40>;
662 atmel,adc-use-external-triggers;
663 atmel,adc-vref = <3000>;
664 atmel,adc-res = <8 10>;
665 atmel,adc-sample-hold-time = <11>;
666 atmel,adc-res-names = "lowres", "highres";
667 atmel,adc-ts-pressure-threshold = <10000>;
671 trigger-name = "external-rising";
672 trigger-value = <0x1>;
676 trigger-name = "external-falling";
677 trigger-value = <0x2>;
681 trigger-name = "external-any";
682 trigger-value = <0x3>;
686 trigger-name = "continuous";
687 trigger-value = <0x6>;
692 compatible = "atmel,at91sam9g46-aes";
693 reg = <0xfc044000 0x100>;
694 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
695 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
696 | AT91_XDMAC_DT_PERID(41))>,
697 <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
698 | AT91_XDMAC_DT_PERID(40))>;
699 dma-names = "tx", "rx";
700 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
701 clock-names = "aes_clk";
706 compatible = "atmel,at91sam9g46-tdes";
707 reg = <0xfc04c000 0x100>;
708 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 0>;
709 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
710 | AT91_XDMAC_DT_PERID(42))>,
711 <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
712 | AT91_XDMAC_DT_PERID(43))>;
713 dma-names = "tx", "rx";
714 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
715 clock-names = "tdes_clk";
720 compatible = "atmel,at91sam9g46-sha";
721 reg = <0xfc050000 0x100>;
722 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 0>;
723 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
724 | AT91_XDMAC_DT_PERID(44))>;
726 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
727 clock-names = "sha_clk";
732 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
733 reg = <0xfc05c000 0x1000>;
734 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
735 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
736 #address-cells = <1>;
740 pmecc: ecc-engine@ffffc070 {
741 compatible = "atmel,sama5d4-pmecc";
742 reg = <0xfc05c070 0x490>,
747 reset_controller: rstc@fc068600 {
748 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
749 reg = <0xfc068600 0x10>;
753 shutdown_controller: shdwc@fc068610 {
754 compatible = "atmel,at91sam9x5-shdwc";
755 reg = <0xfc068610 0x10>;
759 pit: timer@fc068630 {
760 compatible = "atmel,at91sam9260-pit";
761 reg = <0xfc068630 0x10>;
762 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
763 clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
766 watchdog: watchdog@fc068640 {
767 compatible = "atmel,sama5d4-wdt";
768 reg = <0xfc068640 0x10>;
769 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
774 clk32k: sckc@fc068650 {
775 compatible = "atmel,sama5d4-sckc";
776 reg = <0xfc068650 0x4>;
778 clocks = <&slow_xtal>;
782 compatible = "atmel,sama5d4-rtc";
783 reg = <0xfc0686b0 0x30>;
784 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
788 dbgu: serial@fc069000 {
789 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
790 reg = <0xfc069000 0x200>;
791 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
792 pinctrl-names = "default";
793 pinctrl-0 = <&pinctrl_dbgu>;
794 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
795 clock-names = "usart";
800 pinctrl: pinctrl@fc06a000 {
801 #address-cells = <1>;
803 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
804 ranges = <0xfc068000 0xfc068000 0x100
805 0xfc06a000 0xfc06a000 0x4000>;
806 /* WARNING: revisit as pin spec has changed */
809 0xffffffff 0x3ffcfe7c 0x1c010101 /* pioA */
810 0x7fffffff 0xfffccc3a 0x3f00cc3a /* pioB */
811 0xffffffff 0x3ff83fff 0xff00ffff /* pioC */
812 0x0003ff00 0x8002a800 0x00000000 /* pioD */
813 0xffffffff 0x7fffffff 0x76fff1bf /* pioE */
816 pioA: gpio@fc06a000 {
817 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
818 reg = <0xfc06a000 0x100>;
819 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 1>;
822 interrupt-controller;
823 #interrupt-cells = <2>;
824 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
827 pioB: gpio@fc06b000 {
828 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
829 reg = <0xfc06b000 0x100>;
830 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 1>;
833 interrupt-controller;
834 #interrupt-cells = <2>;
835 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
838 pioC: gpio@fc06c000 {
839 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
840 reg = <0xfc06c000 0x100>;
841 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 1>;
844 interrupt-controller;
845 #interrupt-cells = <2>;
846 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
849 pioD: gpio@fc068000 {
850 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
851 reg = <0xfc068000 0x100>;
852 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
855 interrupt-controller;
856 #interrupt-cells = <2>;
857 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
860 pioE: gpio@fc06d000 {
861 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
862 reg = <0xfc06d000 0x100>;
863 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 1>;
866 interrupt-controller;
867 #interrupt-cells = <2>;
868 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
871 /* pinctrl pin settings */
873 pinctrl_adc0_adtrg: adc0_adtrg {
875 <AT91_PIOE 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with USBA_VBUS */
877 pinctrl_adc0_ad0: adc0_ad0 {
879 <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
881 pinctrl_adc0_ad1: adc0_ad1 {
883 <AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
885 pinctrl_adc0_ad2: adc0_ad2 {
887 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
889 pinctrl_adc0_ad3: adc0_ad3 {
891 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
893 pinctrl_adc0_ad4: adc0_ad4 {
895 <AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
900 pinctrl_dbgu: dbgu-0 {
902 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with D14 and TDI */
903 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with D15 and TDO */
908 pinctrl_ebi_addr: ebi-addr-0 {
910 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE
911 AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
912 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
913 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
914 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
915 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
916 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
917 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
918 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
919 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
920 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
921 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
922 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
923 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
924 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
925 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
926 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
927 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
928 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
929 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
930 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
931 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
932 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE
933 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
934 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
935 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
938 pinctrl_ebi_nand_addr: ebi-addr-1 {
940 <AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
941 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
944 pinctrl_ebi_cs0: ebi-cs0-0 {
946 <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
949 pinctrl_ebi_cs1: ebi-cs1-0 {
951 <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
954 pinctrl_ebi_cs2: ebi-cs2-0 {
956 <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
959 pinctrl_ebi_cs3: ebi-cs3-0 {
961 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
964 pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
966 <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE
967 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE
968 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE
969 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE
970 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE
971 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE
972 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE
973 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
976 pinctrl_ebi_data_8_15: ebi-data-msb-0 {
978 <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE
979 AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE
980 AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE
981 AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE
982 AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE
983 AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE
984 AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE
985 AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
988 pinctrl_ebi_nandrdy: ebi-nandrdy-0 {
990 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
993 pinctrl_ebi_nrd_nandoe: ebi-nrd-nandoe-0 {
995 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
998 pinctrl_ebi_nwait: ebi-nwait-0 {
1000 <AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1003 pinctrl_ebi_nwe_nandwe: ebi-nwe-nandwe-0 {
1005 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1008 pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
1010 <AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1015 pinctrl_i2c0: i2c0-0 {
1017 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
1018 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1021 pinctrl_i2c0_gpio: i2c0-gpio {
1023 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1024 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1029 pinctrl_i2c1: i2c1-0 {
1031 <AT91_PIOE 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* TWD1, conflicts with UART0 RX and DIBP */
1032 AT91_PIOE 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* TWCK1, conflicts with UART0 TX and DIBN */
1035 pinctrl_i2c1_gpio: i2c1-gpio {
1037 <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1038 AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1043 pinctrl_i2c2: i2c2-0 {
1045 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* TWD2, conflicts with RD0 and PWML1 */
1046 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* TWCK2, conflicts with RF0 */
1049 pinctrl_i2c2_gpio: i2c2-gpio {
1051 <AT91_PIOB 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1052 AT91_PIOB 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1057 pinctrl_isi_data_0_7: isi-0-data-0-7 {
1059 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D0 */
1060 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D1 */
1061 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D2 */
1062 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D3 */
1063 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D4 */
1064 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D5 */
1065 AT91_PIOC 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D6 */
1066 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D7 */
1067 AT91_PIOB 1 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_PCK, conflict with G0_RXCK */
1068 AT91_PIOB 3 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_VSYNC */
1069 AT91_PIOB 4 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_HSYNC */
1071 pinctrl_isi_data_8_9: isi-0-data-8-9 {
1073 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_D8, conflicts with SPI0_MISO, PWMH2 */
1074 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_D9, conflicts with SPI0_MOSI, PWML2 */
1076 pinctrl_isi_data_10_11: isi-0-data-10-11 {
1078 <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_D10, conflicts with SPI0_SPCK, PWMH3 */
1079 AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_D11, conflicts with SPI0_NPCS0, PWML3 */
1084 pinctrl_lcd_base: lcd-base-0 {
1086 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */
1087 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */
1088 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */
1089 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
1091 pinctrl_lcd_pwm: lcd-pwm-0 {
1092 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */
1094 pinctrl_lcd_rgb444: lcd-rgb-0 {
1096 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1097 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1098 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1099 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1100 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1101 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1102 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1103 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1104 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1105 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1106 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1107 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD11 pin */
1109 pinctrl_lcd_rgb565: lcd-rgb-1 {
1111 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1112 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1113 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1114 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1115 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1116 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1117 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1118 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1119 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1120 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1121 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1122 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1123 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1124 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1125 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1126 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD15 pin */
1128 pinctrl_lcd_rgb666: lcd-rgb-2 {
1130 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1131 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1132 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1133 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1134 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1135 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1136 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1137 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1138 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1139 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1140 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1141 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1142 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1143 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1144 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1145 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1146 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1147 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1149 pinctrl_lcd_rgb777: lcd-rgb-3 {
1151 /* LCDDAT0 conflicts with TMS */
1152 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1153 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1154 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1155 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1156 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1157 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1158 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1159 /* LCDDAT8 conflicts with TCK */
1160 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1161 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1162 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1163 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1164 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1165 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1166 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1167 /* LCDDAT16 conflicts with NTRST */
1168 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
1169 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1170 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1171 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1172 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1173 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1174 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1176 pinctrl_lcd_rgb888: lcd-rgb-4 {
1178 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1179 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1180 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1181 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1182 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1183 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1184 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1185 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1186 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1187 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1188 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1189 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1190 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1191 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1192 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1193 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1194 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */
1195 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
1196 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1197 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1198 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1199 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1200 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1201 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1206 pinctrl_macb0_rmii: macb0_rmii-0 {
1208 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX0 */
1209 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX1 */
1210 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX0 */
1211 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX1 */
1212 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXDV */
1213 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXER */
1214 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXEN */
1215 AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXCK */
1216 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDC */
1217 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDIO */
1223 pinctrl_macb1_rmii: macb1_rmii-0 {
1225 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX0 */
1226 AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX1 */
1227 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX0 */
1228 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX1 */
1229 AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXDV */
1230 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXER */
1231 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXEN */
1232 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXCK */
1233 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDC */
1234 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDIO */
1240 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
1242 <AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* MCI0_CK, conflict with PCK1(ISI_MCK) */
1243 AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_CDA, conflict with NAND_D0 */
1244 AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA0, conflict with NAND_D1 */
1247 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
1249 <AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA1, conflict with NAND_D2 */
1250 AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA2, conflict with NAND_D3 */
1251 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA3, conflict with NAND_D4 */
1254 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
1256 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA4, conflict with NAND_D5 */
1257 AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA5, conflict with NAND_D6 */
1258 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA6, conflict with NAND_D7 */
1259 AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA7, conflict with NAND_OE */
1265 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
1267 <AT91_PIOE 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* MCI1_CK */
1268 AT91_PIOE 19 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_CDA */
1269 AT91_PIOE 20 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA0 */
1272 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
1274 <AT91_PIOE 21 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA1 */
1275 AT91_PIOE 22 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA2 */
1276 AT91_PIOE 23 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA3 */
1282 pinctrl_nand: nand-0 {
1284 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A Read Enable */
1285 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A Write Enable */
1287 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC17 ALE */
1288 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC18 CLE */
1290 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC15 NCS3/Chip Enable */
1291 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC16 NANDRDY */
1292 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 Data bit 0 */
1293 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 Data bit 1 */
1294 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 Data bit 2 */
1295 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 Data bit 3 */
1296 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 Data bit 4 */
1297 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 Data bit 5 */
1298 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A Data bit 6 */
1299 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC12 periph A Data bit 7 */
1304 pinctrl_spi0: spi0-0 {
1306 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MISO */
1307 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MOSI */
1308 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_SPCK */
1314 pinctrl_ssc0_tx: ssc0_tx {
1316 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TK0 */
1317 AT91_PIOB 31 AT91_PERIPH_B AT91_PINCTRL_NONE /* TF0 */
1318 AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD0 */
1321 pinctrl_ssc0_rx: ssc0_rx {
1323 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* RK0 */
1324 AT91_PIOB 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF0 */
1325 AT91_PIOB 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD0 */
1330 pinctrl_ssc1_tx: ssc1_tx {
1332 <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* TK1 */
1333 AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* TF1 */
1334 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD1 */
1337 pinctrl_ssc1_rx: ssc1_rx {
1339 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* RK1 */
1340 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF1 */
1341 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD1 */
1346 pinctrl_spi1: spi1-0 {
1348 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_MISO */
1349 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_MOSI */
1350 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_SPCK */
1356 pinctrl_spi2: spi2-0 {
1358 <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_MISO conflicts with RTS0 */
1359 AT91_PIOD 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_MOSI conflicts with TXD0 */
1360 AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_SPCK conflicts with RTS1 */
1366 pinctrl_uart0: uart0-0 {
1368 <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1369 AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1375 pinctrl_uart1: uart1-0 {
1377 <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* RXD */
1378 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE /* TXD */
1384 pinctrl_usart0: usart0-0 {
1386 <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
1387 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */
1390 pinctrl_usart0_rts: usart0_rts-0 {
1391 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1393 pinctrl_usart0_cts: usart0_cts-0 {
1394 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1399 pinctrl_usart1: usart1-0 {
1401 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
1402 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */
1405 pinctrl_usart1_rts: usart1_rts-0 {
1406 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1408 pinctrl_usart1_cts: usart1_cts-0 {
1409 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1414 pinctrl_usart2: usart2-0 {
1416 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD - conflicts with G0_CRS, ISI_HSYNC */
1417 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD - conflicts with G0_COL, PCK2 */
1420 pinctrl_usart2_rts: usart2_rts-0 {
1421 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_RX3, PWMH1 */
1423 pinctrl_usart2_cts: usart2_cts-0 {
1424 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_TXER, ISI_VSYNC */
1429 pinctrl_usart3: usart3-0 {
1431 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1432 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1438 pinctrl_usart4: usart4-0 {
1440 <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1441 AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1444 pinctrl_usart4_rts: usart4_rts-0 {
1445 atmel,pins = <AT91_PIOE 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with NWAIT, A19 */
1447 pinctrl_usart4_cts: usart4_cts-0 {
1448 atmel,pins = <AT91_PIOE 0 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with A0/NBS0, MCI0_CDB */
1453 aic: interrupt-controller@fc06e000 {
1454 #interrupt-cells = <3>;
1455 compatible = "atmel,sama5d4-aic";
1456 interrupt-controller;
1457 reg = <0xfc06e000 0x200>;
1458 atmel,external-irqs = <56>;