1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
4 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
6 * Copyright (C) 2013 Atmel,
7 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/clock/at91.h>
19 model = "Atmel SAMA5D3 family SoC";
20 compatible = "atmel,sama5d3", "atmel,sama5";
21 interrupt-parent = <&aic>;
48 compatible = "arm,cortex-a5";
54 compatible = "arm,cortex-a5-pmu";
55 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
59 device_type = "memory";
60 reg = <0x20000000 0x8000000>;
64 slow_xtal: slow_xtal {
65 compatible = "fixed-clock";
67 clock-frequency = <0>;
70 main_xtal: main_xtal {
71 compatible = "fixed-clock";
73 clock-frequency = <0>;
76 adc_op_clk: adc_op_clk{
77 compatible = "fixed-clock";
79 clock-frequency = <1000000>;
84 compatible = "mmio-sram";
85 reg = <0x00300000 0x20000>;
89 compatible = "simple-bus";
95 compatible = "simple-bus";
101 compatible = "atmel,hsmci";
102 reg = <0xf0000000 0x600>;
103 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
104 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
106 pinctrl-names = "default";
107 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
109 #address-cells = <1>;
111 clocks = <&mci0_clk>;
112 clock-names = "mci_clk";
116 #address-cells = <1>;
118 compatible = "atmel,at91rm9200-spi";
119 reg = <0xf0004000 0x100>;
120 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
121 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
122 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
123 dma-names = "tx", "rx";
124 pinctrl-names = "default";
125 pinctrl-0 = <&pinctrl_spi0>;
126 clocks = <&spi0_clk>;
127 clock-names = "spi_clk";
132 compatible = "atmel,at91sam9g45-ssc";
133 reg = <0xf0008000 0x4000>;
134 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
135 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>,
136 <&dma0 2 AT91_DMA_CFG_PER_ID(14)>;
137 dma-names = "tx", "rx";
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
140 clocks = <&ssc0_clk>;
141 clock-names = "pclk";
145 tcb0: timer@f0010000 {
146 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
147 #address-cells = <1>;
149 reg = <0xf0010000 0x100>;
150 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
151 clocks = <&tcb0_clk>, <&clk32k>;
152 clock-names = "t0_clk", "slow_clk";
156 compatible = "atmel,at91sam9x5-i2c";
157 reg = <0xf0014000 0x4000>;
158 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
159 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
160 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
161 dma-names = "tx", "rx";
162 pinctrl-names = "default", "gpio";
163 pinctrl-0 = <&pinctrl_i2c0>;
164 pinctrl-1 = <&pinctrl_i2c0_gpio>;
165 sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>;
166 scl-gpios = <&pioA 31 GPIO_ACTIVE_HIGH>;
167 #address-cells = <1>;
169 clocks = <&twi0_clk>;
174 compatible = "atmel,at91sam9x5-i2c";
175 reg = <0xf0018000 0x4000>;
176 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
177 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
178 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
179 dma-names = "tx", "rx";
180 pinctrl-names = "default", "gpio";
181 pinctrl-0 = <&pinctrl_i2c1>;
182 pinctrl-1 = <&pinctrl_i2c1_gpio>;
183 sda-gpios = <&pioC 26 GPIO_ACTIVE_HIGH>;
184 scl-gpios = <&pioC 27 GPIO_ACTIVE_HIGH>;
185 #address-cells = <1>;
187 clocks = <&twi1_clk>;
191 usart0: serial@f001c000 {
192 compatible = "atmel,at91sam9260-usart";
193 reg = <0xf001c000 0x100>;
194 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
195 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
196 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
197 dma-names = "tx", "rx";
198 pinctrl-names = "default";
199 pinctrl-0 = <&pinctrl_usart0>;
200 clocks = <&usart0_clk>;
201 clock-names = "usart";
205 usart1: serial@f0020000 {
206 compatible = "atmel,at91sam9260-usart";
207 reg = <0xf0020000 0x100>;
208 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
209 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
210 <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
211 dma-names = "tx", "rx";
212 pinctrl-names = "default";
213 pinctrl-0 = <&pinctrl_usart1>;
214 clocks = <&usart1_clk>;
215 clock-names = "usart";
219 uart0: serial@f0024000 {
220 compatible = "atmel,at91sam9260-usart";
221 reg = <0xf0024000 0x100>;
222 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
223 pinctrl-names = "default";
224 pinctrl-0 = <&pinctrl_uart0>;
225 clocks = <&uart0_clk>;
226 clock-names = "usart";
231 compatible = "atmel,sama5d3-pwm";
232 reg = <0xf002c000 0x300>;
233 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
240 compatible = "atmel,at91sam9g45-isi";
241 reg = <0xf0034000 0x4000>;
242 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
243 pinctrl-names = "default";
244 pinctrl-0 = <&pinctrl_isi_data_0_7>;
246 clock-names = "isi_clk";
249 #address-cells = <1>;
255 compatible = "atmel,sama5d3-sfr", "syscon";
256 reg = <0xf0038000 0x60>;
260 compatible = "atmel,hsmci";
261 reg = <0xf8000000 0x600>;
262 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
263 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
265 pinctrl-names = "default";
266 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
268 #address-cells = <1>;
270 clocks = <&mci1_clk>;
271 clock-names = "mci_clk";
275 #address-cells = <1>;
277 compatible = "atmel,at91rm9200-spi";
278 reg = <0xf8008000 0x100>;
279 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
280 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
281 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
282 dma-names = "tx", "rx";
283 pinctrl-names = "default";
284 pinctrl-0 = <&pinctrl_spi1>;
285 clocks = <&spi1_clk>;
286 clock-names = "spi_clk";
291 compatible = "atmel,at91sam9g45-ssc";
292 reg = <0xf800c000 0x4000>;
293 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
294 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>,
295 <&dma1 2 AT91_DMA_CFG_PER_ID(4)>;
296 dma-names = "tx", "rx";
297 pinctrl-names = "default";
298 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
299 clocks = <&ssc1_clk>;
300 clock-names = "pclk";
305 #address-cells = <1>;
307 compatible = "atmel,at91sam9x5-adc";
308 reg = <0xf8018000 0x100>;
309 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
310 pinctrl-names = "default";
328 clock-names = "adc_clk", "adc_op_clk";
329 atmel,adc-channels-used = <0xfff>;
330 atmel,adc-startup-time = <40>;
331 atmel,adc-use-external-triggers;
332 atmel,adc-vref = <3000>;
333 atmel,adc-res = <10 12>;
334 atmel,adc-sample-hold-time = <11>;
335 atmel,adc-res-names = "lowres", "highres";
339 trigger-name = "external-rising";
340 trigger-value = <0x1>;
344 trigger-name = "external-falling";
345 trigger-value = <0x2>;
349 trigger-name = "external-any";
350 trigger-value = <0x3>;
354 trigger-name = "continuous";
355 trigger-value = <0x6>;
360 compatible = "atmel,at91sam9x5-i2c";
361 reg = <0xf801c000 0x4000>;
362 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
363 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
364 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
365 dma-names = "tx", "rx";
366 pinctrl-names = "default", "gpio";
367 pinctrl-0 = <&pinctrl_i2c2>;
368 pinctrl-1 = <&pinctrl_i2c2_gpio>;
369 sda-gpios = <&pioA 18 GPIO_ACTIVE_HIGH>;
370 scl-gpios = <&pioA 19 GPIO_ACTIVE_HIGH>;
371 #address-cells = <1>;
373 clocks = <&twi2_clk>;
377 usart2: serial@f8020000 {
378 compatible = "atmel,at91sam9260-usart";
379 reg = <0xf8020000 0x100>;
380 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
381 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
382 <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
383 dma-names = "tx", "rx";
384 pinctrl-names = "default";
385 pinctrl-0 = <&pinctrl_usart2>;
386 clocks = <&usart2_clk>;
387 clock-names = "usart";
391 usart3: serial@f8024000 {
392 compatible = "atmel,at91sam9260-usart";
393 reg = <0xf8024000 0x100>;
394 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
395 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
396 <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
397 dma-names = "tx", "rx";
398 pinctrl-names = "default";
399 pinctrl-0 = <&pinctrl_usart3>;
400 clocks = <&usart3_clk>;
401 clock-names = "usart";
406 compatible = "atmel,at91sam9g46-sha";
407 reg = <0xf8034000 0x100>;
408 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
409 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
412 clock-names = "sha_clk";
416 compatible = "atmel,at91sam9g46-aes";
417 reg = <0xf8038000 0x100>;
418 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
419 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
420 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
421 dma-names = "tx", "rx";
423 clock-names = "aes_clk";
427 compatible = "atmel,at91sam9g46-tdes";
428 reg = <0xf803c000 0x100>;
429 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
430 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
431 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
432 dma-names = "tx", "rx";
433 clocks = <&tdes_clk>;
434 clock-names = "tdes_clk";
438 compatible = "atmel,at91sam9g45-trng";
439 reg = <0xf8040000 0x100>;
440 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>;
441 clocks = <&trng_clk>;
444 hsmc: hsmc@ffffc000 {
445 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
446 reg = <0xffffc000 0x1000>;
447 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
448 clocks = <&hsmc_clk>;
449 #address-cells = <1>;
453 pmecc: ecc-engine@ffffc070 {
454 compatible = "atmel,at91sam9g45-pmecc";
455 reg = <0xffffc070 0x490>,
460 dma0: dma-controller@ffffe600 {
461 compatible = "atmel,at91sam9g45-dma";
462 reg = <0xffffe600 0x200>;
463 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
465 clocks = <&dma0_clk>;
466 clock-names = "dma_clk";
469 dma1: dma-controller@ffffe800 {
470 compatible = "atmel,at91sam9g45-dma";
471 reg = <0xffffe800 0x200>;
472 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
474 clocks = <&dma1_clk>;
475 clock-names = "dma_clk";
478 ramc0: ramc@ffffea00 {
479 compatible = "atmel,sama5d3-ddramc";
480 reg = <0xffffea00 0x200>;
481 clocks = <&ddrck>, <&mpddr_clk>;
482 clock-names = "ddrck", "mpddr";
485 dbgu: serial@ffffee00 {
486 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
487 reg = <0xffffee00 0x200>;
488 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
489 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
490 <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
491 dma-names = "tx", "rx";
492 pinctrl-names = "default";
493 pinctrl-0 = <&pinctrl_dbgu>;
494 clocks = <&dbgu_clk>;
495 clock-names = "usart";
499 aic: interrupt-controller@fffff000 {
500 #interrupt-cells = <3>;
501 compatible = "atmel,sama5d3-aic";
502 interrupt-controller;
503 reg = <0xfffff000 0x200>;
504 atmel,external-irqs = <47>;
507 pinctrl: pinctrl@fffff200 {
508 #address-cells = <1>;
510 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
511 ranges = <0xfffff200 0xfffff200 0xa00>;
514 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
515 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
516 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
517 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
518 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
521 /* shared pinctrl settings */
523 pinctrl_adc0_adtrg: adc0_adtrg {
525 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
527 pinctrl_adc0_ad0: adc0_ad0 {
529 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
531 pinctrl_adc0_ad1: adc0_ad1 {
533 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
535 pinctrl_adc0_ad2: adc0_ad2 {
537 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
539 pinctrl_adc0_ad3: adc0_ad3 {
541 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
543 pinctrl_adc0_ad4: adc0_ad4 {
545 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
547 pinctrl_adc0_ad5: adc0_ad5 {
549 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
551 pinctrl_adc0_ad6: adc0_ad6 {
553 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
555 pinctrl_adc0_ad7: adc0_ad7 {
557 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
559 pinctrl_adc0_ad8: adc0_ad8 {
561 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
563 pinctrl_adc0_ad9: adc0_ad9 {
565 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
567 pinctrl_adc0_ad10: adc0_ad10 {
569 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
571 pinctrl_adc0_ad11: adc0_ad11 {
573 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
578 pinctrl_dbgu: dbgu-0 {
580 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
581 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
586 pinctrl_ebi_addr: ebi-addr-0 {
588 <AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
589 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
590 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
591 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
592 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
593 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
594 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
595 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
596 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
597 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
598 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
599 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
600 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
601 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
602 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
603 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
604 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
605 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
606 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
607 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
608 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
609 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
610 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
613 pinctrl_ebi_nand_addr: ebi-addr-1 {
615 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
616 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
619 pinctrl_ebi_cs0: ebi-cs0-0 {
621 <AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
624 pinctrl_ebi_cs1: ebi-cs1-0 {
626 <AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
629 pinctrl_ebi_cs2: ebi-cs2-0 {
631 <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
634 pinctrl_ebi_nwait: ebi-nwait-0 {
636 <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
639 pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
641 <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
646 pinctrl_i2c0: i2c0-0 {
648 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
649 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
652 pinctrl_i2c0_gpio: i2c0-gpio {
654 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
655 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
660 pinctrl_i2c1: i2c1-0 {
662 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
663 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
666 pinctrl_i2c1_gpio: i2c1-gpio {
668 <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
669 AT91_PIOC 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
674 pinctrl_i2c2: i2c2-0 {
676 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
677 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
680 pinctrl_i2c2_gpio: i2c2-gpio {
682 <AT91_PIOA 18 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
683 AT91_PIOA 19 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
688 pinctrl_isi_data_0_7: isi-0-data-0-7 {
690 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
691 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
692 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
693 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
694 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
695 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
696 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
697 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
698 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
699 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
700 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
703 pinctrl_isi_data_8_9: isi-0-data-8-9 {
705 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
706 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
709 pinctrl_isi_data_10_11: isi-0-data-10-11 {
711 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */
712 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */
717 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
719 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
720 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
721 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
723 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
725 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
726 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
727 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
729 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
731 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
732 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
733 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
734 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
739 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
741 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
742 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
743 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
745 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
747 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
748 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
749 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
754 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
756 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
757 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
762 pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
764 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */
766 pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
768 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */
770 pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
772 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */
774 pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
776 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */
779 pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
781 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */
783 pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
785 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */
787 pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
789 <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */
791 pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
793 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */
795 pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
797 <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */
799 pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
801 <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */
804 pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
806 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */
808 pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
810 <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */
812 pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
814 <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */
816 pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
818 <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */
821 pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
823 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */
825 pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
827 <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */
829 pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
831 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */
833 pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
835 <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */
840 pinctrl_spi0: spi0-0 {
842 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
843 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
844 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
849 pinctrl_spi1: spi1-0 {
851 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
852 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
853 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
858 pinctrl_ssc0_tx: ssc0_tx {
860 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
861 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
862 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
865 pinctrl_ssc0_rx: ssc0_rx {
867 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
868 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
869 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
874 pinctrl_ssc1_tx: ssc1_tx {
876 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
877 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
878 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
881 pinctrl_ssc1_rx: ssc1_rx {
883 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
884 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
885 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
890 pinctrl_uart0: uart0-0 {
892 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with PWMFI2, ISI_D8 */
893 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */
898 pinctrl_uart1: uart1-0 {
900 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with TWD0, ISI_VSYNC */
901 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */
906 pinctrl_usart0: usart0-0 {
908 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
909 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
912 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
914 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
915 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
920 pinctrl_usart1: usart1-0 {
922 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
923 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
926 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
928 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
929 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
934 pinctrl_usart2: usart2-0 {
936 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A25 */
937 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts NCS0 */
940 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
942 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
943 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
948 pinctrl_usart3: usart3-0 {
950 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A18 */
951 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with A19 */
954 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
956 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
957 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
962 pioA: gpio@fffff200 {
963 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
964 reg = <0xfffff200 0x100>;
965 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
968 interrupt-controller;
969 #interrupt-cells = <2>;
970 clocks = <&pioA_clk>;
973 pioB: gpio@fffff400 {
974 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
975 reg = <0xfffff400 0x100>;
976 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
979 interrupt-controller;
980 #interrupt-cells = <2>;
981 clocks = <&pioB_clk>;
984 pioC: gpio@fffff600 {
985 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
986 reg = <0xfffff600 0x100>;
987 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
990 interrupt-controller;
991 #interrupt-cells = <2>;
992 clocks = <&pioC_clk>;
995 pioD: gpio@fffff800 {
996 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
997 reg = <0xfffff800 0x100>;
998 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
1001 interrupt-controller;
1002 #interrupt-cells = <2>;
1003 clocks = <&pioD_clk>;
1006 pioE: gpio@fffffa00 {
1007 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
1008 reg = <0xfffffa00 0x100>;
1009 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
1012 interrupt-controller;
1013 #interrupt-cells = <2>;
1014 clocks = <&pioE_clk>;
1019 compatible = "atmel,sama5d3-pmc", "syscon";
1020 reg = <0xfffffc00 0x120>;
1021 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1022 interrupt-controller;
1023 #address-cells = <1>;
1025 #interrupt-cells = <1>;
1027 main_rc_osc: main_rc_osc {
1028 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
1030 interrupt-parent = <&pmc>;
1031 interrupts = <AT91_PMC_MOSCRCS>;
1032 clock-frequency = <12000000>;
1033 clock-accuracy = <50000000>;
1036 main_osc: main_osc {
1037 compatible = "atmel,at91rm9200-clk-main-osc";
1039 interrupt-parent = <&pmc>;
1040 interrupts = <AT91_PMC_MOSCS>;
1041 clocks = <&main_xtal>;
1045 compatible = "atmel,at91sam9x5-clk-main";
1047 interrupt-parent = <&pmc>;
1048 interrupts = <AT91_PMC_MOSCSELS>;
1049 clocks = <&main_rc_osc &main_osc>;
1053 compatible = "atmel,sama5d3-clk-pll";
1055 interrupt-parent = <&pmc>;
1056 interrupts = <AT91_PMC_LOCKA>;
1059 atmel,clk-input-range = <8000000 50000000>;
1060 #atmel,pll-clk-output-range-cells = <4>;
1061 atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
1064 plladiv: plladivck {
1065 compatible = "atmel,at91sam9x5-clk-plldiv";
1071 compatible = "atmel,at91sam9x5-clk-utmi";
1073 interrupt-parent = <&pmc>;
1074 interrupts = <AT91_PMC_LOCKU>;
1079 compatible = "atmel,at91sam9x5-clk-master";
1081 interrupt-parent = <&pmc>;
1082 interrupts = <AT91_PMC_MCKRDY>;
1083 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
1084 atmel,clk-output-range = <0 166000000>;
1085 atmel,clk-divisors = <1 2 4 3>;
1089 compatible = "atmel,at91sam9x5-clk-usb";
1091 clocks = <&plladiv>, <&utmi>;
1095 compatible = "atmel,at91sam9x5-clk-programmable";
1096 #address-cells = <1>;
1098 interrupt-parent = <&pmc>;
1099 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
1104 interrupts = <AT91_PMC_PCKRDY(0)>;
1110 interrupts = <AT91_PMC_PCKRDY(1)>;
1116 interrupts = <AT91_PMC_PCKRDY(2)>;
1121 compatible = "atmel,at91sam9x5-clk-smd";
1123 clocks = <&plladiv>, <&utmi>;
1127 compatible = "atmel,at91rm9200-clk-system";
1128 #address-cells = <1>;
1175 compatible = "atmel,at91sam9x5-clk-peripheral";
1176 #address-cells = <1>;
1180 dbgu_clk: dbgu_clk {
1185 hsmc_clk: hsmc_clk {
1190 pioA_clk: pioA_clk {
1195 pioB_clk: pioB_clk {
1200 pioC_clk: pioC_clk {
1205 pioD_clk: pioD_clk {
1210 pioE_clk: pioE_clk {
1215 usart0_clk: usart0_clk {
1218 atmel,clk-output-range = <0 83000000>;
1221 usart1_clk: usart1_clk {
1224 atmel,clk-output-range = <0 83000000>;
1227 usart2_clk: usart2_clk {
1230 atmel,clk-output-range = <0 83000000>;
1233 usart3_clk: usart3_clk {
1236 atmel,clk-output-range = <0 83000000>;
1239 uart0_clk: uart0_clk {
1242 atmel,clk-output-range = <0 83000000>;
1245 twi0_clk: twi0_clk {
1248 atmel,clk-output-range = <0 41500000>;
1251 twi1_clk: twi1_clk {
1254 atmel,clk-output-range = <0 41500000>;
1257 twi2_clk: twi2_clk {
1260 atmel,clk-output-range = <0 41500000>;
1263 mci0_clk: mci0_clk {
1268 mci1_clk: mci1_clk {
1273 spi0_clk: spi0_clk {
1276 atmel,clk-output-range = <0 166000000>;
1279 spi1_clk: spi1_clk {
1282 atmel,clk-output-range = <0 166000000>;
1285 tcb0_clk: tcb0_clk {
1288 atmel,clk-output-range = <0 166000000>;
1299 atmel,clk-output-range = <0 83000000>;
1302 dma0_clk: dma0_clk {
1307 dma1_clk: dma1_clk {
1312 uhphs_clk: uhphs_clk {
1317 udphs_clk: udphs_clk {
1327 ssc0_clk: ssc0_clk {
1330 atmel,clk-output-range = <0 83000000>;
1333 ssc1_clk: ssc1_clk {
1336 atmel,clk-output-range = <0 83000000>;
1349 tdes_clk: tdes_clk {
1354 trng_clk: trng_clk {
1359 fuse_clk: fuse_clk {
1364 mpddr_clk: mpddr_clk {
1371 reset_controller: rstc@fffffe00 {
1372 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1373 reg = <0xfffffe00 0x10>;
1377 shutdown_controller: shutdown-controller@fffffe10 {
1378 compatible = "atmel,at91sam9x5-shdwc";
1379 reg = <0xfffffe10 0x10>;
1383 pit: timer@fffffe30 {
1384 compatible = "atmel,at91sam9260-pit";
1385 reg = <0xfffffe30 0xf>;
1386 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1390 watchdog: watchdog@fffffe40 {
1391 compatible = "atmel,at91sam9260-wdt";
1392 reg = <0xfffffe40 0x10>;
1393 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1395 atmel,watchdog-type = "hardware";
1396 atmel,reset-type = "all";
1398 status = "disabled";
1401 clk32k: sckc@fffffe50 {
1402 compatible = "atmel,sama5d3-sckc";
1403 reg = <0xfffffe50 0x4>;
1404 clocks = <&slow_xtal>;
1409 compatible = "atmel,at91rm9200-rtc";
1410 reg = <0xfffffeb0 0x30>;
1411 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1416 nfc_sram: sram@200000 {
1417 compatible = "mmio-sram";
1419 reg = <0x200000 0x2400>;
1422 usb0: gadget@500000 {
1423 #address-cells = <1>;
1425 compatible = "atmel,sama5d3-udc";
1426 reg = <0x00500000 0x100000
1428 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1429 clocks = <&udphs_clk>, <&utmi>;
1430 clock-names = "pclk", "hclk";
1431 status = "disabled";
1435 atmel,fifo-size = <64>;
1436 atmel,nb-banks = <1>;
1441 atmel,fifo-size = <1024>;
1442 atmel,nb-banks = <3>;
1449 atmel,fifo-size = <1024>;
1450 atmel,nb-banks = <3>;
1457 atmel,fifo-size = <1024>;
1458 atmel,nb-banks = <2>;
1464 atmel,fifo-size = <1024>;
1465 atmel,nb-banks = <2>;
1471 atmel,fifo-size = <1024>;
1472 atmel,nb-banks = <2>;
1478 atmel,fifo-size = <1024>;
1479 atmel,nb-banks = <2>;
1485 atmel,fifo-size = <1024>;
1486 atmel,nb-banks = <2>;
1492 atmel,fifo-size = <1024>;
1493 atmel,nb-banks = <2>;
1498 atmel,fifo-size = <1024>;
1499 atmel,nb-banks = <2>;
1504 atmel,fifo-size = <1024>;
1505 atmel,nb-banks = <2>;
1510 atmel,fifo-size = <1024>;
1511 atmel,nb-banks = <2>;
1516 atmel,fifo-size = <1024>;
1517 atmel,nb-banks = <2>;
1522 atmel,fifo-size = <1024>;
1523 atmel,nb-banks = <2>;
1528 atmel,fifo-size = <1024>;
1529 atmel,nb-banks = <2>;
1534 atmel,fifo-size = <1024>;
1535 atmel,nb-banks = <2>;
1540 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1541 reg = <0x00600000 0x100000>;
1542 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1543 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1544 clock-names = "ohci_clk", "hclk", "uhpck";
1545 status = "disabled";
1549 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1550 reg = <0x00700000 0x100000>;
1551 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1552 clocks = <&utmi>, <&uhphs_clk>;
1553 clock-names = "usb_clk", "ehci_clk";
1554 status = "disabled";
1558 compatible = "atmel,sama5d3-ebi";
1559 #address-cells = <2>;
1561 atmel,smc = <&hsmc>;
1562 reg = <0x10000000 0x10000000
1563 0x40000000 0x30000000>;
1564 ranges = <0x0 0x0 0x10000000 0x10000000
1565 0x1 0x0 0x40000000 0x10000000
1566 0x2 0x0 0x50000000 0x10000000
1567 0x3 0x0 0x60000000 0x10000000>;
1569 status = "disabled";
1571 nand_controller: nand-controller {
1572 compatible = "atmel,sama5d3-nand-controller";
1573 atmel,nfc-sram = <&nfc_sram>;
1574 atmel,nfc-io = <&nfc_io>;
1575 ecc-engine = <&pmecc>;
1576 #address-cells = <2>;
1579 status = "disabled";
1583 nfc_io: nfc-io@70000000 {
1584 compatible = "atmel,sama5d3-nfc-io", "syscon";
1585 reg = <0x70000000 0x8000000>;